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Change subject: drv/i2c/pi608gp: Fix types
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS5:
> I’d prefer two patches.
Split into this and CB:75806
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Hello Angel Pons, Felix Singer, Mario Scheithauer, Werner Zeh, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75500?usp=email
to look at the new patch set (#6).
The following approvals got outdated and were removed:
Code-Review+1 by Felix Singer, Verified+1 by build bot (Jenkins)
Change subject: drv/i2c/pi608gp: Fix types
......................................................................
drv/i2c/pi608gp: Fix types
In commit e59f18bf29a8 ("drivers/i2c: Add PI7C9X2G608GP PCIe switch
driver (pi608gp)"), there were some suggestions after it's been already
merged.
This patch addresses the points regarding the number types - fix of the
printk format strings, inclusion of 'stdint.h' and marking the set of
allowed values as constant.
BUG=none
TEST=Build OK, no behavioral changes in the pi608gp driver, console logs
without changes.
Change-Id: I34c664f6a8a257b260facdbf9043825ff4a4c932
Signed-off-by: Jan Samek <jan.samek(a)siemens.com>
---
M src/drivers/i2c/pi608gp/pi608gp.c
M src/drivers/i2c/pi608gp/pi608gp.h
2 files changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/75500/6
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Change subject: soc/intel/xeon_sp: Fix HEST table length
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS1:
> I'm sorry but what is 'ubsan'?
Sorry, that's the 'Undefined Behavior Sanitizer'. It's something you can compile
into coreboot (should be in Kconfig somewhere) and it would tell you if the code
does something undefined.
In this case, I guess the void-pointer arithmetic would count as undefined. But
that's not to worry about because we know what GCC does with it. The code could
probably be written without the void pointers, maybe even without the variables.
But that's out of scope of this change.
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Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/xeon_sp/spr/romstage.c:
https://review.coreboot.org/c/coreboot/+/75740/comment/86b5779f_2ef0234f :
PS1, Line 277: * Persistent Memory 300 Series mapped as memory) per Socket
> @Nico: '3DS' here refers to '3D stacking‘ which is a memory packaging technology I guess, it increases the memory density. And yes, 6TiB is the sum of max. DRAM and max. Optane Mem possible.
Thanks. So 3DS isn't part of the calculation, I guess. Can one have max. DRAM
and max. Optane at once? If not, isn't it like `MAX(MAX_DRAM, MAX_OPTANE)`?
So 4GiB?
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Change subject: mb/google/nissa/var/joxer: Remove fw_config probe for storage devices
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: soc/intel/spr-sp: Remove HWP related settings
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75741/comment/3ef24a76_586bed0c :
PS1, Line 11:
> coreboot tries to be as much as independent from FSP as possible. […]
Because this step runs after FSP-S exit, so it overwrites what has been set in FSP
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Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/xeon_sp/spr/romstage.c:
https://review.coreboot.org/c/coreboot/+/75740/comment/d1c917aa_2c07ce9c :
PS1, Line 277: * Persistent Memory 300 Series mapped as memory) per Socket
> @Nico: '3DS' here refers to '3D stacking‘ which is a memory packaging technology I guess, it increas […]
Then give it a meaning macro name instead 6 would be better. Like max_support_unit or something.
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Change subject: soc/intel/spr-sp: Remove HWP related settings
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75741/comment/3b224de4_7716dcfc :
PS1, Line 2: wanghao11
> Please use your full name and not the user name: […]
Done
https://review.coreboot.org/c/coreboot/+/75741/comment/23fd61a8_696ff821 :
PS1, Line 13: wanghao11
> Ditto.
Done
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