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Change subject: mb/google/brya/var/gothrax: Generate RAM IDs for new memory parts
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75834/comment/e6f2ec9b_4b5b996f :
PS2, Line 7: brya
> nit:nissa
But our project directory is: "src/mainboard/google/brya/variants/gothrax"
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Change subject: mb/google/nissa/var/joxer: Disable storage devices based on fw_config
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/google/brya/variants/joxer/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/75743/comment/5cdae6b0_fb87ee76 :
PS5, Line 7: ramstage-$(CONFIG_FW_CONFIG) += variant.c
> Oh, nice catch.
Hi all,
Joxer has different wifi sar tables, we will use fw_config to distinguish them in the future, thanks.
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Change subject: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function to weak
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I've got your thoughts now. […]
we can create 5 byte mask 0xffffffffff and &serial[4], I think there is no number will contain all 0 in the next 5 bytes. Is that work?
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Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel,
I'd like you to reexamine a change. Please visit
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Change subject: soc/amd/common/iommu.c: Make sure iommu is enabled
......................................................................
soc/amd/common/iommu.c: Make sure iommu is enabled
Don't rely on vendorcode to set enable bit on IOMMU.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Signed-off-by: Naresh Solanki <Naresh.Solanki(a)9elements.com>
Change-Id: I1805a20656b7fb3915f8cc93c618ee074461840f
---
M src/soc/amd/common/block/iommu/iommu.c
1 file changed, 12 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/75829/3
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Change subject: soc/intel/apollolake: Fix FSP SATA speed limit configuraion
......................................................................
Patch Set 5:
(2 comments)
Patchset:
PS5:
> why not ask FSP to fix
I'm afraid Intel will not fix anything for Apollo Lake anymore unless it's security relevant.
File src/soc/intel/apollolake/include/soc/ahci.h:
https://review.coreboot.org/c/coreboot/+/75820/comment/ed98c446_dd39ba4c :
PS5, Line 12:
> extra space
It's a bit field inside AHCI_CAP register, so most other header files mark this with an extra space.
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I'd like you to reexamine a change. Please visit
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Change subject: soc/amd/common/iommu.c: Make sure iommu is enabled
......................................................................
soc/amd/common/iommu.c: Make sure iommu is enabled
Don't rely on vendorcode to set enable bit on IOMMU.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
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---
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git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/75829/2
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Change subject: lib/fw_config: Make fw_config_is_provisioned() always available
......................................................................
Patch Set 2:
(1 comment)
File src/lib/fw_config.c:
https://review.coreboot.org/c/coreboot/+/75835/comment/5eae2cc7_0face690 :
PS1, Line 100: return fw_config_get() != UNDEFINED_FW_CONFIG;
> OK, so I moved `fw_config_is_provisioned()` implementation to the header file. […]
Acknowledged
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Change subject: lib/fw_config: Make fw_config_is_provisioned() always available
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Patch Set 2: Code-Review+1
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Change subject: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function to weak
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
> So you want to support the 9 byte serial number right?
Yes, as most server dimms show a 9 byte serial number on their label.
PS1:
> You need change here to support 9 byte serial number https://source.chromium. […]
I've got your thoughts now. But I don't have a good idea about how to change the codes more reasonable to fit all products because it seems that to judge a dimm use 4 bytes or 9 bytes is difficult. Here is a sample sn from Bytes 512~520: 802C0F213931867E57. Its Bytes 517~520 is not 0.
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