Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75815?usp=email )
Change subject: soc/mediatek: Add a prompt string for MEDIATEK_DRAM_SCRAMBLE
......................................................................
soc/mediatek: Add a prompt string for MEDIATEK_DRAM_SCRAMBLE
Make the default MEDIATEK_DRAM_SCRAMBLE value overridable by adding a
prompt string.
BUG=b:285474337
TEST=build pass and check scramble feature is disabled on serial build
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Change-Id: I703ac9aa3ccc4dd9d0fef9949c6b0d49449971a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75815
Reviewed-by: Yidi Lin <yidilin(a)google.com>
Reviewed-by: Yu-Ping Wu <yupingso(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/mediatek/common/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Yu-Ping Wu: Looks good to me, approved
Yidi Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/common/Kconfig b/src/soc/mediatek/common/Kconfig
index d44b4d1..8092aa7 100644
--- a/src/soc/mediatek/common/Kconfig
+++ b/src/soc/mediatek/common/Kconfig
@@ -31,7 +31,7 @@
open-source policy.
config MEDIATEK_DRAM_SCRAMBLE
- bool
+ bool "Enable DRAM scramble feature"
default n
help
This option enables DRAM data scramble, which can prevent DRAM data from
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75911?usp=email )
Change subject: mb/google/rex: Fix PLD for USB type-A port
......................................................................
mb/google/rex: Fix PLD for USB type-A port
USB type-A port with same PLD.token information as USB type-C port,
causes conflict while generating ACPI code for the EC CONN device.
Use a different PLD.token number for type-A port to fix the issue.
BUG=b:286328285
TEST=check ACPI can have right USB port in EC CON.
before patch:
Package (0x02)
{
"usb2-port",
\_SB.PCI0.XHCI.RHUB.HS01
},
Package (0x02)
{
"usb3-port",
\_SB.PCI0.TXHC.RHUB.SS01
},
after patch:
Package (0x02)
{
"usb2-port",
\_SB.PCI0.XHCI.RHUB.HS01
},
Package (0x02)
{
"usb3-port",
\_SB.PCI0.TXHC.RHUB.SS03
},
Signed-off-by: Kapil Porwal <kapilporwal(a)google.com>
Change-Id: If3e76c11dd6808eee4c9c2f3f71604a60379b5a5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75911
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-by: Tarun Tuli <taruntuli(a)google.com>
---
M src/mainboard/google/rex/variants/rex0/overridetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)
Approvals:
Subrata Banik: Looks good to me, approved
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
Tarun Tuli: Looks good to me, approved
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index 5cfda3a..4f74ea4 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -386,7 +386,7 @@
register "desc" = ""USB2 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -399,7 +399,7 @@
register "desc" = ""USB3 Type-A Port A0 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
- register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
device ref usb3_port1 on end
end
chip drivers/usb/acpi
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Change subject: ACPI,SMBIOS : Provide ACPI and SMBIOS supports for RISC-V
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Just a heads up, there's some SMBIOS effort in CB:75886.
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Change subject: acpi: Move ECAM resource below PNP0C02 device in a common place
......................................................................
Patch Set 8: Code-Review+1
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Change subject: arch/x86,lib: Migrate SMBIOS implementation to common code
......................................................................
Patch Set 3: Code-Review+1
(1 comment)
File src/include/smbios.h:
https://review.coreboot.org/c/coreboot/+/75886/comment/78b9909d_778a62cc :
PS3, Line 15: } while (0)
NB. The one call in x86 code seems quite ugly. Maybe we could refactor
this later so the macro stays private to the common `smbios.c`.
Random thought about this, I'd probably make it a simpler function,
`size_t update_max(size_t *max_len, size_t len)`. So that the code
can be written more obvious, e.g.
```
len += update_max(&max_struct_size, smbios_write...
```
Nothing to do right now.
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Change subject: arch/x86,lib: Migrate SMBIOS implementation to common code
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75886/comment/95fd7b01_2b9a18b5 :
PS3, Line 11: code define
> nit: sounds confusing to me. […]
I don't see where. Where would you place one?
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Change subject: acpi: Move ECAM resource below PNP0C02 device in a common place
......................................................................
Patch Set 8:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75729/comment/841038ca_f995255f :
PS6, Line 25: platforms
> typo: platform
Done
https://review.coreboot.org/c/coreboot/+/75729/comment/72fdc901_69b3007d :
PS6, Line 27: so that Linux in such a way that it prevents
> I would just drop the first "so that Linux", it seems to be the […]
Done
File src/acpi/dsdt_top.asl:
https://review.coreboot.org/c/coreboot/+/75729/comment/2b25fb82_a5bca039 :
PS6, Line 60: Method
> `iasl` complains about the return value. But I don't think it needs a method. […]
Done
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Change subject: acpi: Move ECAM resource below PNP0C02 device in a common place
......................................................................
Patch Set 8:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75729/comment/ce4adc8a_53e129f4 :
PS6, Line 25: platforms
> typo: platform
Done
https://review.coreboot.org/c/coreboot/+/75729/comment/6431e6b4_80908a48 :
PS6, Line 27: so that Linux in such a way that it prevents
> I would just drop the first "so that Linux", it seems to be the […]
Done
File src/acpi/dsdt_top.asl:
https://review.coreboot.org/c/coreboot/+/75729/comment/0a9084e1_80ecdc43 :
PS6, Line 60: Method
> `iasl` complains about the return value. But I don't think it needs a method. […]
Done
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