coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

1 participants
5387 discussions

[S] Change in coreboot[master]: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions()
by Nico Huber (Code Review) 23 Jun '23

23 Jun '23

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76092?usp=email ) Change subject: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions() ...................................................................... [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions() Change-Id: Iad15af08c39d0ddb477216bc3e93bc799899bb0e Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/acpi/acpigen.c 1 file changed, 20 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/76092/1 diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c index fb92b89..051bc67 100644 --- a/src/acpi/acpigen.c +++ b/src/acpi/acpigen.c @@ -1670,13 +1670,18 @@ acpigen_emit_byte(dst_op); } +static void acpigen_start_byte_buffer(size_t size) +{ + acpigen_emit_byte(BUFFER_OP); + acpigen_write_len_f(); + acpigen_write_integer(size); +} + void acpigen_write_byte_buffer(uint8_t *arr, size_t size) { size_t i; - acpigen_emit_byte(BUFFER_OP); - acpigen_write_len_f(); - acpigen_write_integer(size); + acpigen_start_byte_buffer(size); for (i = 0; i < size; i++) acpigen_emit_byte(arr[i]); @@ -1767,28 +1772,33 @@ static void acpigen_dsm_uuid_enum_functions(const struct dsm_uuid *id) { const size_t bytes = DIV_ROUND_UP(id->count, BITS_PER_BYTE); - uint8_t *buffer = alloca(bytes); - bool set = false; size_t cb_idx = 0; + bool set = false; - memset(buffer, 0, bytes); + acpigen_emit_byte(RETURN_OP); + acpigen_start_byte_buffer(bytes); + + /* Keep byte0 location for later patching. */ + uint8_t *const byte0 = (uint8_t *)acpigen_get_current(); for (size_t i = 0; i < bytes; i++) { + uint8_t byte = 0; for (size_t j = 0; j < BITS_PER_BYTE; j++) { if (cb_idx >= id->count) break; if (id->callbacks[cb_idx++]) { set = true; - buffer[i] |= BIT(j); + byte |= BIT(j); } } + acpigen_emit_byte(byte); } - if (set) - buffer[0] |= BIT(0); + /* Patch bit0 */ + *byte0 |= set; - acpigen_write_return_byte_buffer(buffer, bytes); + acpigen_pop_len(); } static void acpigen_write_dsm_uuid(struct dsm_uuid *id) -- To view, visit https://review.coreboot.org/c/coreboot/+/76092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad15af08c39d0ddb477216bc3e93bc799899bb0e Gerrit-Change-Number: 76092 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

1 0

[L] Change in coreboot[master]: soc/intel/alderlake: Add support for Raptor Lake S CPUs
by Tim Crawford (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Bora Guvendik, Michał Żygowski, Michał Żygowski, Name of user not set #1004406, Subrata Banik. Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69798?usp=email ) Change subject: soc/intel/alderlake: Add support for Raptor Lake S CPUs ...................................................................... Patch Set 11: (1 comment) File src/soc/intel/alderlake/Kconfig: https://review.coreboot.org/c/coreboot/+/69798/comment/9ad8728d_46fd0745 : PS11, Line 159: default 32 > Please mention this in the commit message. This will be dropped when rebased (done in CB:73514). -- To view, visit https://review.coreboot.org/c/coreboot/+/69798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I767dd08a169a6af59188d9ecd73520b916f69155 Gerrit-Change-Number: 69798 Gerrit-PatchSet: 11 Gerrit-Owner: Name of user not set #1004406 Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Name of user not set #1004406 Gerrit-Attention: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Comment-Date: Fri, 23 Jun 2023 13:00:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: acpi: Swap XSDT and RSDT in acpi_add_table()
by Kyösti Mälkki (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Lance Zhao, Tim Wawrzynczak. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76000?usp=email ) Change subject: acpi: Swap XSDT and RSDT in acpi_add_table() ...................................................................... Patch Set 5: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/76000/comment/351733fc_15ec7756 : PS5, Line 16: never happens with x86 platforms. While we may fill XSDT, our S3 resume path ignores it. So this should not yet claim ACPI pointers above 4G as dealt. File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/76000/comment/598111a4_72d0bbf0 : PS5, Line 2166: void *acpi_find_wakeup_vector(void) My first impression is this could move to acpi_s3.c. https://review.coreboot.org/c/coreboot/+/76000/comment/70d77b68_05f326b3 : PS5, Line 2195: rsdt = (acpi_rsdt_t *)(uintptr_t)rsdp->rsdt_address; Switch over to XSDT since we always fill it? https://review.coreboot.org/c/coreboot/+/76000/comment/127f5616_75a7bf0b : PS5, Line 2214: facs = (acpi_facs_t *)(uintptr_t)fadt->firmware_ctrl; x_firmware_ctl_l/h, could be follow-up https://review.coreboot.org/c/coreboot/+/76000/comment/767fc172_8392b9d0 : PS5, Line 2223: wake_vec = (void *)(uintptr_t)facs->firmware_waking_vector; x_firmware_waking_vector_l/h, could be follow-up -- To view, visit https://review.coreboot.org/c/coreboot/+/76000?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6588676186faa896b6076f871d7f8f633db21e70 Gerrit-Change-Number: 76000 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 23 Jun 2023 12:58:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: acpi/acpigen.c: Ignore compiler warning about stack overflowing
by Nico Huber (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Lance Zhao, Paul Menzel, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76007?usp=email ) Change subject: acpi/acpigen.c: Ignore compiler warning about stack overflowing ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Looks like we are using __builtin_alloca() (commonlib). GCC manual states that stack will be used and a simple variable-length array would be preferred. I've looked into callers, at most 9 callbacks/bits are used, so it seems safe either way. -- To view, visit https://review.coreboot.org/c/coreboot/+/76007?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d445d151db5e6cc7b6e13bf74ce81007d819f1d Gerrit-Change-Number: 76007 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 23 Jun 2023 12:41:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: mb/qemu-aarch64: Move probing dram to read_resources
by Nico Huber (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Arthur Heymans, David Milosevic, Maximilian Brune. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76004?usp=email ) Change subject: mb/qemu-aarch64: Move probing dram to read_resources ...................................................................... Patch Set 1: Code-Review+1 (1 comment) File src/mainboard/emulation/qemu-aarch64/mainboard.c: https://review.coreboot.org/c/coreboot/+/76004/comment/8003092c_0e8c1dca : PS1, Line 47: ram_resource_kb(dev, index++, (uintptr_t)_dram / KiB, ram_size_mb * KiB); Could update this to not do the KiB dance, while we are at it. -- To view, visit https://review.coreboot.org/c/coreboot/+/76004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaee41aec7806287ef1881372ec8ec47a4cd57d9 Gerrit-Change-Number: 76004 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Comment-Date: Fri, 23 Jun 2023 12:19:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: acpi: Swap XSDT and RSDT in acpi_add_table()
by Nico Huber (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Lance Zhao, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76000?usp=email ) Change subject: acpi: Swap XSDT and RSDT in acpi_add_table() ...................................................................... Patch Set 5: (9 comments) Patchset: PS5: Quite a few comments, but only minor things. File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/76000/comment/fd595bee_24c73331 : PS5, Line 60: RSDT Please mention why, e.g. "The 32-bit RSDT may not exist if tables live above 4G.". https://review.coreboot.org/c/coreboot/+/76000/comment/53074fbb_8174319a : PS5, Line 62: xsdt = (acpi_xsdt_t *)((uintptr_t)rsdp->xsdt_address); Please align usage of parentheses. I'd prefer the version with less. https://review.coreboot.org/c/coreboot/+/76000/comment/55ad99b7_2596312a : PS5, Line 81: R another `R` https://review.coreboot.org/c/coreboot/+/76000/comment/79084f5c_524780d8 : PS5, Line 94: rsdt->entry[i] = (u32)(uintptr_t)table; Only set `if ((uintptr_t)table <= UINT32_MAX)`? https://review.coreboot.org/c/coreboot/+/76000/comment/35e37f83_9fb40143 : PS5, Line 97: rsdt->header.length = sizeof(acpi_header_t) + : (sizeof(u32) * (i + 1)); : : /* Re-calculate checksum. */ : rsdt->header.checksum = 0; : rsdt->header.checksum = acpi_checksum((u8 *)rsdt, : rsdt->header.length); Please drop early line breaks if we change the lines anyway. https://review.coreboot.org/c/coreboot/+/76000/comment/02c2d114_c1184a62 : PS5, Line 1962: /* We need at least an RSDP and an RSDT Table */ Comment needs an update, RSDP/RSDT for ACPI 1.0 compat, otherwise XSDT. https://review.coreboot.org/c/coreboot/+/76000/comment/d748f016_7837e9f6 : PS5, Line 1967: if (current < UINT32_MAX) { While I couldn't find it specified, I'd assume the whole RSDT should fit 32-bit space, i.e. `current + sizeof(acpi_rsdt_t) - 1 <= UINT32_MAX`. https://review.coreboot.org/c/coreboot/+/76000/comment/449076c2_965d078a : PS5, Line 1971: } `else printk(BIOS_INFO, "Not adding RSDP because tables reside above 4G.");`? -- To view, visit https://review.coreboot.org/c/coreboot/+/76000?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6588676186faa896b6076f871d7f8f633db21e70 Gerrit-Change-Number: 76000 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 23 Jun 2023 12:01:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[L] Change in coreboot[master]: mb/{skl,kbl}: Use true/false keywords for non-array dt options
by Jonathon Hall (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Angel Pons, Erik van den Bogaert, Felix Singer, Frans Hendriks, Jeremy Soller, Michael Niewöhner, Michał Żygowski, Nico Huber, Piotr Król, Sean Rhodes, Tim Crawford. Jonathon Hall has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75888?usp=email ) Change subject: mb/{skl,kbl}: Use true/false keywords for non-array dt options ...................................................................... Patch Set 5: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75888?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff063c37a093e597c6b73a583903ce5e4f698856 Gerrit-Change-Number: 75888 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Fri, 23 Jun 2023 11:59:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: Makefile.inc: don't add fmap_config.h dependency twice
by Fred Reitberger (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Erik van den Bogaert, Felix Held, Frans Hendriks, Jason Glenesk, Julius Werner, Martin L Roth, Matt DeVillier, Raul Rangel, Yu-Ping Wu. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76002?usp=email ) Change subject: Makefile.inc: don't add fmap_config.h dependency twice ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/76002?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b62917f32ae9f51f079b243a606e5db07ca9099 Gerrit-Change-Number: 76002 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 23 Jun 2023 11:59:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/amd/common/acpi/ivrs: add HID argument to ivhd_describe_f0_device
by Fred Reitberger (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Felix Held, Matt DeVillier, Raul Rangel. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76073?usp=email ) Change subject: soc/amd/common/acpi/ivrs: add HID argument to ivhd_describe_f0_device ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76073?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I830f1fbbd535b100c88997ece10142a5d553950f Gerrit-Change-Number: 76073 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 23 Jun 2023 11:51:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: mb/google/rex: Enable GPIO for BT I2S offload for soundwire config
by Subrata Banik (Code Review) 23 Jun '23

23 Jun '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Tarun Tuli, Uday Bhat. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76003?usp=email ) Change subject: mb/google/rex: Enable GPIO for BT I2S offload for soundwire config ...................................................................... Patch Set 3: (2 comments) File src/mainboard/google/rex/variants/rex0/fw_config.c: https://review.coreboot.org/c/coreboot/+/76003/comment/b5cb034a_7990c045 : PS3, Line 94: BT I2S offload > Will merge this CL and will change the print to "Configure GPIOs for BT offload mode" > > As there is already a print related to "Configure GPIOs for SoundWire audio" above BT offload configuration - explicit mentioning of SNDW may not be required sure. SG https://review.coreboot.org/c/coreboot/+/76003/comment/0e5adc96_dedde646 : PS3, Line 99: printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); > As there is already a print related to "Configure GPIOs for I2S audio" above BT offload configuration - explicit mentioning of I2S audio in the print may not be required for BT offload. > > Hence, dropping this CL - hope its ok understood -- To view, visit https://review.coreboot.org/c/coreboot/+/76003?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65eae8839d72b266f5239a694c7e57cec856eedf Gerrit-Change-Number: 76003 Gerrit-PatchSet: 3 Gerrit-Owner: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Comment-Date: Fri, 23 Jun 2023 11:46:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2023