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Change subject: acpi/acpigen: Add print-like function for debug string
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Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/73113/comment/ec552162_81626326
PS7, Line 7: acpi: Add print-like function for debug string
> It's just the naming in the commit summary
like this?
acpi/acpigen and print/printf: Add print-like function for debug string
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Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73380 )
Change subject: soc/intel/common/block/pcie/rtd3: Add root port mutex support
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Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/73380/comment/59807dab_edb59cc5
PS2, Line 23: BRANCH=firmware-brya-14505.B
> Is there a corresponding bug that goes with this?
There is no direct bug, but the need of this mutex was observed while I was working on 241850118, where one case is doing WWAN reset and S0ix.
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Change subject: soc/intel/cmn/pcie: Add ability for SoC to overwrite snoop/no-snoop latency
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Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74141/comment/f6807816_f65a2d23
PS3, Line 7: common/pcie
> soc/intel/cmn/pcie
Done
https://review.coreboot.org/c/coreboot/+/74141/comment/63854143_2b0c9f27
PS3, Line 13: Boot to OS and check if able to overwrite values.
> which platform and how to check the overridden value ?
Done
Patchset:
PS3:
> please mention the default value here? […]
PCIe was not power gated and blocked S0ix entry
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Change subject: mb/google/myst: Enable eSPI SCI events
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Patch Set 7:
(1 comment)
File src/mainboard/google/myst/ec.c:
https://review.coreboot.org/c/coreboot/+/74101/comment/af3092f5_0e124306
PS6, Line 14: GEVENT_3
> > It does come from that sheet. […]
We use a #define on guybrush to make it easier to understand: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
Normally you can pick any GEVENT as long as it's not used. GEVENTs 0-23(?) can be mapped to GPIOs if desired, 24-31 are internal only GEVENTs. So we generally use 24+. For xhci we use 31: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
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Change subject: mb/google/myst: Enable eSPI SCI events
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Patch Set 7:
(1 comment)
File src/mainboard/google/myst/ec.c:
https://review.coreboot.org/c/coreboot/+/74101/comment/bc5e43ad_ab978e49
PS6, Line 14: GEVENT_3
> It does come from that sheet.
I'm probably missing it; can you point out where?
> This was errantly left in from Skyrim. There isn't an event associated with the interrupt line on Myst. I'm not sure if that's problematic.
Raul would probably know best, but I think we need this for the linux kernel to assign wake events to SCIs that come in (and make sure the correct wake counts are incremented, etc.). I'm not sure what's involved with getting one assigned though.
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Change subject: mb/google/myst: Build for chromeOS
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Patch Set 5: Code-Review+1
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Change subject: cpu/x86/64bit/Makefile: use all_x86 make target
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Patch Set 2: Code-Review+2
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Change subject: cpu/x86/64bit/Makefile: use verstage_x86 make target
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