coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[S] Change in coreboot[master]: mb/google/brya/var/omnigul: Adjust I2Cs CLK to be around 400 kHz
by Jamie Chen (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Derek Huang, Kyle Lin, Nick Vaccaro. Jamie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74393 ) Change subject: mb/google/brya/var/omnigul: Adjust I2Cs CLK to be around 400 kHz ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/74393 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c4fdf0e003318a69b870b487a60accefbc0ffed Gerrit-Change-Number: 74393 Gerrit-PatchSet: 2 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kyle Lin <kylelinck(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Thu, 13 Apr 2023 07:29:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: cpu/intel/speedstep: Separate single SSDT CPU entry
by build bot (Jenkins) (Code Review) 13 Apr '23

13 Apr '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74400 ) Change subject: cpu/intel/speedstep: Separate single SSDT CPU entry ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/speedstep/acpi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174098): https://review.coreboot.org/c/coreboot/+/74400/comment/7143e3ee_fdeb8b2c PS1, Line 73: static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) line length of 101 exceeds 100 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/74400 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe5d84c8fbff79cc73b01eee0980cbed71ceb506 Gerrit-Change-Number: 74400 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Apr 2023 07:27:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Separate single SSDT CPU entry
by build bot (Jenkins) (Code Review) 13 Apr '23

13 Apr '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74399 ) Change subject: cpu,soc/intel: Separate single SSDT CPU entry ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/haswell/acpi.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174097): https://review.coreboot.org/c/coreboot/+/74399/comment/b776764b_2b8528ff PS1, Line 328: static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) line length of 101 exceeds 100 columns -- To view, visit https://review.coreboot.org/c/coreboot/+/74399 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Gerrit-Change-Number: 74399 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Apr 2023 07:26:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: cpu/intel/speedstep: Separate single SSDT CPU entry
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74400 ) Change subject: cpu/intel/speedstep: Separate single SSDT CPU entry ...................................................................... cpu/intel/speedstep: Separate single SSDT CPU entry Change-Id: Ibe5d84c8fbff79cc73b01eee0980cbed71ceb506 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/speedstep/acpi.c 1 file changed, 52 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/74400/1 diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index 0d2cc87..5e16795 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -70,53 +70,60 @@ return SW_ANY; } +static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) +{ + int pcontrol_blk = PMB0_BASE, plen = 6; + + static struct { + uint8_t coordination; + int num_cstates; + const acpi_cstate_t *cstates; + sst_table_t pstates; + } s; + + if (!s.once) { + s.once = 1; + s.coordination = get_p_state_coordination(); + s.num_cstates = get_cst_entries(&s.cstates); + s.speedstep_gen_pstates(&s.pstates); + } + + if (core > 0) { + pcontrol_blk = 0; + plen = 0; + } + + /* Generate processor \_SB.CPUx. */ + acpigen_write_processor(cpu * cores_per_package + core, pcontrol_blk, plen); + + /* Generate p-state entries. */ + gen_pstate_entries(&s.pstates, cpu, cores_per_package, s.coordination); + + /* Generate c-state entries. */ + if (s.num_cstates > 0) + acpigen_write_CST_package(s.cstates, s.num_cstates); + + acpigen_pop_len(); +} + /** * @brief Generate ACPI entries for Speedstep for each cpu */ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; int totalcores = dev_count_cpu(); - int cores_per_package = (cpuid_ebx(1)>>16) & 0xff; - int numcpus = totalcores/cores_per_package; /* This assumes that all - CPUs share the same - layout. */ + int cores_per_package = (cpuid_ebx(1) >> 16) & 0xff; - int num_cstates; - const acpi_cstate_t *cstates; - sst_table_t pstates; - uint8_t coordination = get_p_state_coordination(); + /* This assumes that all CPUs share the same layout. */ + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - num_cstates = get_cst_entries(&cstates); - speedstep_gen_pstates(&pstates); + for (int cpu_id = 0; cpu_id < numcpus; ++cpu_id) + for (int core_id = 0; core_id < cores_per_package; core_id++) + generate_cpu_entry(device, cpu_id, core_id, cores_per_package); - for (cpuID = 0; cpuID < numcpus; ++cpuID) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { - if (coreID > 1) { - pcontrol_blk = 0; - plen = 0; - } - - /* Generate processor \_SB.CPUx. */ - acpigen_write_processor( - cpuID * cores_per_package + coreID - 1, - pcontrol_blk, plen); - - /* Generate p-state entries. */ - gen_pstate_entries(&pstates, cpuID, - cores_per_package, coordination); - - /* Generate c-state entries. */ - if (num_cstates > 0) - acpigen_write_CST_package( - cstates, num_cstates); - - acpigen_pop_len(); - } - } /* PPKG is usually used for thermal management of the first and only package. */ acpigen_write_processor_package("PPKG", 0, cores_per_package); -- To view, visit https://review.coreboot.org/c/coreboot/+/74400 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe5d84c8fbff79cc73b01eee0980cbed71ceb506 Gerrit-Change-Number: 74400 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Separate single SSDT CPU entry
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74399 ) Change subject: cpu,soc/intel: Separate single SSDT CPU entry ...................................................................... cpu,soc/intel: Separate single SSDT CPU entry Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/common/block/acpi/acpi.c 6 files changed, 129 insertions(+), 98 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/74399/1 diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 66d58ad..3727d8a 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -325,6 +325,23 @@ acpigen_pop_len(); } +static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) +{ + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(cpu * cores_per_package + core); + + /* Generate P-state tables */ + generate_P_state_entries(core, cores_per_package); + + /* Generate C-state tables */ + generate_C_state_entries(device); + + /* Generate T-state tables */ + generate_T_state_entries(cpu, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int totalcores = dev_count_cpu(); @@ -334,23 +351,9 @@ printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { - for (int core_id = 0; core_id < cores_per_package; core_id++) { - /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device(cpu_id * cores_per_package + core_id); - - /* Generate P-state tables */ - generate_P_state_entries(core_id, cores_per_package); - - /* Generate C-state tables */ - generate_C_state_entries(device); - - /* Generate T-state tables */ - generate_T_state_entries(cpu_id, cores_per_package); - - acpigen_write_processor_device_end(); - } - } + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) + for (int core_id = 0; core_id < cores_per_package; core_id++) + generate_cpu_entry(device, cpu_id, core_id, cores_per_package); /* PPKG is usually used for thermal management of the first and only package. */ diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 370ea96..d8fef62 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -203,6 +203,23 @@ acpigen_pop_len(); } +static void generate_cpu_entry(int cpu, int core, int cores_per_package) +{ + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(cpu * cores_per_package + core); + + /* Generate P-state tables */ + generate_P_state_entries(cpu, cores_per_package); + + /* Generate C-state tables */ + generate_C_state_entries(); + + /* Generate T-state tables */ + generate_T_state_entries(cpu, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int totalcores = dev_count_cpu(); @@ -212,23 +229,9 @@ printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { - for (int core_id = 0; core_id < cores_per_package; core_id++) { - /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device(cpu_id * cores_per_package + core_id); - - /* Generate P-state tables */ - generate_P_state_entries(cpu_id, cores_per_package); - - /* Generate C-state tables */ - generate_C_state_entries(); - - /* Generate T-state tables */ - generate_T_state_entries(cpu_id, cores_per_package); - - acpigen_write_processor_device_end(); - } - } + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) + for (int core_id = 0; core_id < cores_per_package; core_id++) + generate_cpu_entry(cpu_id, core_id, cores_per_package); /* PPKG is usually used for thermal management of the first and only package. */ diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index a10f8dc..994f3bb 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -294,6 +294,23 @@ acpigen_pop_len(); } +static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) +{ + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(cpu * cores_per_package + core); + + /* Generate P-state tables */ + generate_P_state_entries(cpu, cores_per_package); + + /* Generate C-state tables */ + generate_C_state_entries(device); + + /* Generate T-state tables */ + generate_T_state_entries(cpu, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int totalcores = dev_count_cpu(); @@ -303,23 +320,9 @@ printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { - for (int core_id = 0; core_id < cores_per_package; core_id++) { - /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device(cpu_id * cores_per_package + core_id); - - /* Generate P-state tables */ - generate_P_state_entries(cpu_id, cores_per_package); - - /* Generate C-state tables */ - generate_C_state_entries(device); - - /* Generate T-state tables */ - generate_T_state_entries(cpu_id, cores_per_package); - - acpigen_write_processor_device_end(); - } - } + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) + for (int core_id = 0; core_id < cores_per_package; core_id++) + generate_cpu_entry(device, cpu_id, core_id, cores_per_package); /* PPKG is usually used for thermal management of the first and only package. */ diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 42e4b26..e1e92f0 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -145,7 +145,7 @@ return (int)power; } -static void generate_p_state_entries(int core, int cores_per_package) +static void generate_p_state_entries(int core) { int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; @@ -260,26 +260,30 @@ acpigen_pop_len(); } +static void generate_cpu_entry(int core, int cores_per_package) +{ + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(core); + + /* Generate P-state tables */ + generate_p_state_entries(core); + + /* Generate C-state tables */ + acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map)); + + /* Generate T-state tables */ + generate_t_state_entries(core, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int core; const struct pattrs *pattrs = pattrs_get(); - for (core = 0; core < pattrs->num_cpus; core++) { - /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device(core); - - /* Generate P-state tables */ - generate_p_state_entries(core, pattrs->num_cpus); - - /* Generate C-state tables */ - acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map)); - - /* Generate T-state tables */ - generate_t_state_entries(core, pattrs->num_cpus); - - acpigen_write_processor_device_end(); - } + for (core = 0; core < pattrs->num_cpus; core++) + generate_cpu_entry(core, pattrs->num_cpus); /* PPKG is usually used for thermal management of the first and only package. */ diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 9ef7a75..5898ad1 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -161,7 +161,7 @@ return (int)power; } -static void generate_p_state_entries(int core, int cores_per_package) +static void generate_p_state_entries(int core) { int ratio_min, ratio_max, ratio_turbo, ratio_step, ratio_range_2; int coord_type, power_max, power_unit, num_entries; @@ -276,26 +276,30 @@ acpigen_pop_len(); } +static void generate_cpu_entry(int core, int cores_per_package) +{ + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(core); + + /* Generate P-state tables */ + generate_p_state_entries(core); + + /* Generate C-state tables */ + acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map)); + + /* Generate T-state tables */ + generate_t_state_entries(core, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int core; const struct pattrs *pattrs = pattrs_get(); - for (core = 0; core < pattrs->num_cpus; core++) { - /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device(core); - - /* Generate P-state tables */ - generate_p_state_entries(core, pattrs->num_cpus); - - /* Generate C-state tables */ - acpigen_write_CST_package(cstate_map, ARRAY_SIZE(cstate_map)); - - /* Generate T-state tables */ - generate_t_state_entries(core, pattrs->num_cpus); - - acpigen_write_processor_device_end(); - } + for (core = 0; core < pattrs->num_cpus; core++) + generate_cpu_entry(core, pattrs->num_cpus); /* PPKG is usually used for thermal management of the first and only package. */ diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 4139054..0e2fb38 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -387,6 +387,22 @@ { } +static void generate_cpu_entry(const struct device *device, int cpu, int core, int cores_per_package) +{ + /* Generate processor \_SB.CPUx */ + acpigen_write_processor_device(cpu * cores_per_package + core); + + /* Generate C-state tables */ + generate_c_state_entries(); + + generate_cppc_entries(core); + + /* Soc specific power states generation */ + soc_power_states_generation(core, cores_per_package); + + acpigen_write_processor_device_end(); +} + void generate_cpu_entries(const struct device *device) { int core_id, cpu_id; @@ -401,22 +417,10 @@ printk(BIOS_DEBUG, "Found %d CPU(s) with %d/%d physical/logical core(s) each.\n", numcpus, num_phys, num_virt); - for (cpu_id = 0; cpu_id < numcpus; cpu_id++) { - for (core_id = 0; core_id < num_virt; core_id++) { - /* Generate processor \_SB.CPUx */ - acpigen_write_processor_device(cpu_id * num_virt + core_id); + for (cpu_id = 0; cpu_id < numcpus; cpu_id++) + for (core_id = 0; core_id < num_virt; core_id++) + generate_cpu_entry(device, cpu_id, core_id, num_virt); - /* Generate C-state tables */ - generate_c_state_entries(); - - generate_cppc_entries(core_id); - - /* Soc specific power states generation */ - soc_power_states_generation(core_id, num_virt); - - acpigen_write_processor_device_end(); - } - } /* PPKG is usually used for thermal management of the first and only package. */ acpigen_write_processor_package("PPKG", 0, num_virt); -- To view, visit https://review.coreboot.org/c/coreboot/+/74399 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic75e8907de9730c6fdb06dbe799a7644fa90f904 Gerrit-Change-Number: 74399 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: cpu/intel/speedstep: Refactor P-state coordination
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74398 ) Change subject: cpu/intel/speedstep: Refactor P-state coordination ...................................................................... cpu/intel/speedstep: Refactor P-state coordination Change-Id: I12462f271821d3d8fe3324d84a65c2341729591e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/speedstep/acpi.c 1 file changed, 22 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/74398/1 diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index acca77e..0d2cc87 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -60,6 +60,16 @@ acpigen_write_PPC(0); } +static uint8_t get_p_state_coordination(void) +{ + /* For Penryn use HW_ALL. */ + if (((cpuid_eax(1) >> 4) & 0xffff) == 0x1067) + return HW_ALL; + + /* Use SW_ANY as that was the default. */ + return SW_ANY; +} + /** * @brief Generate ACPI entries for Speedstep for each cpu */ @@ -71,22 +81,17 @@ int numcpus = totalcores/cores_per_package; /* This assumes that all CPUs share the same layout. */ + int num_cstates; const acpi_cstate_t *cstates; sst_table_t pstates; - uint8_t coordination; + uint8_t coordination = get_p_state_coordination(); printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); num_cstates = get_cst_entries(&cstates); speedstep_gen_pstates(&pstates); - if (((cpuid_eax(1) >> 4) & 0xffff) == 0x1067) - /* For Penryn use HW_ALL. */ - coordination = HW_ALL; - else - /* Use SW_ANY as that was the default. */ - coordination = SW_ANY; for (cpuID = 0; cpuID < numcpus; ++cpuID) { for (coreID = 1; coreID <= cores_per_package; coreID++) { -- To view, visit https://review.coreboot.org/c/coreboot/+/74398 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12462f271821d3d8fe3324d84a65c2341729591e Gerrit-Change-Number: 74398 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: intel/i82371eb,speedstep: Use dev_count_cpu()
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74397 ) Change subject: intel/i82371eb,speedstep: Use dev_count_cpu() ...................................................................... intel/i82371eb,speedstep: Use dev_count_cpu() Change-Id: I8582d401c72ad44137f117315c5c6869654c3e99 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/speedstep/acpi.c M src/southbridge/intel/i82371eb/acpi_tables.c 2 files changed, 12 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/74397/1 diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index 839fec4..acca77e 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -9,18 +9,6 @@ #include <device/device.h> #include <types.h> -static int determine_total_number_of_cores(void) -{ - struct device *cpu; - int count = 0; - for (cpu = all_devices; cpu; cpu = cpu->next) { - if (!is_enabled_cpu(cpu)) - continue; - count++; - } - return count; -} - static void gen_pstate_entries(const sst_table_t *const pstates, const int cpuID, const int cores_per_package, const uint8_t coordination) @@ -78,7 +66,7 @@ void generate_cpu_entries(const struct device *device) { int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6; - int totalcores = determine_total_number_of_cores(); + int totalcores = dev_count_cpu(); int cores_per_package = (cpuid_ebx(1)>>16) & 0xff; int numcpus = totalcores/cores_per_package; /* This assumes that all CPUs share the same diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index c23c2f6..cd002e8 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -6,22 +6,10 @@ #include <device/device.h> #include "i82371eb.h" -static int determine_total_number_of_cores(void) -{ - struct device *cpu; - int count = 0; - for (cpu = all_devices; cpu; cpu = cpu->next) { - if (!is_enabled_cpu(cpu)) - continue; - count++; - } - return count; -} - void generate_cpu_entries(const struct device *device) { int cpu, pcontrol_blk=DEFAULT_PMBASE+PCNTRL, plen=6; - int numcpus = determine_total_number_of_cores(); + int numcpus = dev_count_cpu(); printk(BIOS_DEBUG, "Found %d CPU(s).\n", numcpus); /* without the outer scope, further ssdt addition will end up -- To view, visit https://review.coreboot.org/c/coreboot/+/74397 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8582d401c72ad44137f117315c5c6869654c3e99 Gerrit-Change-Number: 74397 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Sync ACPI CPU object implementations
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74396 ) Change subject: cpu,soc/intel: Sync ACPI CPU object implementations ...................................................................... cpu,soc/intel: Sync ACPI CPU object implementations Take variable names from soc/intel and adjust counter to start from zero. Change-Id: I14e1120e74e1bd92acd782a53104fabfb266c3b5 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c 3 files changed, 32 insertions(+), 31 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/74396/1 diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 1e1c724..66d58ad 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -327,30 +327,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_logical_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device( - (cpuID - 1) * cores_per_package+coreID - 1); + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - coreID - 1, cores_per_package); + generate_P_state_entries(core_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(device); /* Generate T-state tables */ - generate_T_state_entries( - cpuID - 1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 834a3bb..370ea96 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -205,30 +205,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { /* Generate Scope(\_SB) { Device(CPUx */ - acpigen_write_processor_device( - (cpuID-1)*cores_per_package+coreID-1); + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - cpuID-1, cores_per_package); + generate_P_state_entries(cpu_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(); /* Generate T-state tables */ - generate_T_state_entries( - cpuID-1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index d7c048d..a10f8dc 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -296,30 +296,26 @@ void generate_cpu_entries(const struct device *device) { - int coreID, cpuID; int totalcores = dev_count_cpu(); int cores_per_package = get_logical_cores_per_package(); - int numcpus = totalcores/cores_per_package; + int numcpus = totalcores / cores_per_package; printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package); - for (cpuID = 1; cpuID <= numcpus; cpuID++) { - for (coreID = 1; coreID <= cores_per_package; coreID++) { - /* Generate Scope(\_SB) { Device(CPU */ - acpigen_write_processor_device( - (cpuID-1)*cores_per_package+coreID-1); + for (int cpu_id = 0; cpu_id < numcpus; cpu_id++) { + for (int core_id = 0; core_id < cores_per_package; core_id++) { + /* Generate Scope(\_SB) { Device(CPUx */ + acpigen_write_processor_device(cpu_id * cores_per_package + core_id); /* Generate P-state tables */ - generate_P_state_entries( - cpuID-1, cores_per_package); + generate_P_state_entries(cpu_id, cores_per_package); /* Generate C-state tables */ generate_C_state_entries(device); /* Generate T-state tables */ - generate_T_state_entries( - cpuID-1, cores_per_package); + generate_T_state_entries(cpu_id, cores_per_package); acpigen_write_processor_device_end(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/74396 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14e1120e74e1bd92acd782a53104fabfb266c3b5 Gerrit-Change-Number: 74396 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: soc/intel/common: Fix acpigen use for processor Device
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74395 ) Change subject: soc/intel/common: Fix acpigen use for processor Device ...................................................................... soc/intel/common: Fix acpigen use for processor Device Change-Id: Ib4e21732ac31076a1a97a774e03c8466d17c5f29 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/common/block/acpi/acpi.c 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/74395/1 diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 4b790b7..4139054 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -414,7 +414,7 @@ /* Soc specific power states generation */ soc_power_states_generation(core_id, num_virt); - acpigen_pop_len(); + acpigen_write_processor_device_end(); } } /* PPKG is usually used for thermal management -- To view, visit https://review.coreboot.org/c/coreboot/+/74395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4e21732ac31076a1a97a774e03c8466d17c5f29 Gerrit-Change-Number: 74395 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: cpu,soc/intel: Use acpigen_write_processor_device()
by Kyösti Mälkki (Code Review) 13 Apr '23

13 Apr '23

Attention is currently required from: Subrata Banik, Angel Pons, Kyösti Mälkki, Elyes Haouas. Kyösti Mälkki has uploaded a new patch set (#8) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/72488 ) Change subject: cpu,soc/intel: Use acpigen_write_processor_device() ...................................................................... cpu,soc/intel: Use acpigen_write_processor_device() Use acpigen_write_processor_device() instead of deprecated acpigen_write_processor(). Change-Id: I1448e0a8845b3a1beee0a3ed744358944faf66d8 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/intel/haswell/acpi.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c 5 files changed, 32 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/72488/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/72488 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1448e0a8845b3a1beee0a3ed744358944faf66d8 Gerrit-Change-Number: 72488 Gerrit-PatchSet: 8 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023