coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[M] Change in coreboot[master]: src/cpu/power9: move part of scom.h to scom.c
by Michał Kopeć (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Michał Żygowski, Krystian Hebel, Sergii Dmytruk, Felix Held. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67055 ) Change subject: src/cpu/power9: move part of scom.h to scom.c ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/67055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff4e98ae52c7099954f0c20fcb639eb87af15534 Gerrit-Change-Number: 67055 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 17 Apr 2023 10:27:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/cmn/cse: Make `cse_get_fpt_partition_info()` function static
by Subrata Banik (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Tarun Tuli, SRIDHAR SIRICILLA, Kapil Porwal, Dinesh Gehlot, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74388 ) Change subject: soc/intel/cmn/cse: Make `cse_get_fpt_partition_info()` function static ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/74388/comment/778f0c85_ba5b0cb1 PS6, Line 1219: vboot_recovery_mode_enabled > This seems to be redundant considering the execution path starting from store_ish_version() yeah, i will drop that over an incremental cl. hope that is good. -- To view, visit https://review.coreboot.org/c/coreboot/+/74388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie50453946c8abe55c29e9001263f0264a73c8fac Gerrit-Change-Number: 74388 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Mon, 17 Apr 2023 09:36:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/meteoerlake: set power limits dynamically
by Sumeet R Pawnikar (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Eric Lai. Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74380 ) Change subject: soc/intel/meteoerlake: set power limits dynamically ...................................................................... Patch Set 2: (10 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74380/comment/2f9c4f49_63b5d7b2 PS1, Line 14: Rex board > Rex can only validate 15W SKU hence, other values are untested I'll update this accordingly. Thanks. Patchset: PS1: > > I think Intel can add other 45W/28W but with clear message like only verified 15W on Rex. […] This above discussion makes more sense on not to add 28W/45W code at this stage. Let's add in future when it requires. File src/soc/intel/meteorlake/chip.h: https://review.coreboot.org/c/coreboot/+/74380/comment/1dafa6a5_0962738c PS1, Line 23: MTL_P_682_45W_CORE, > this is not POR for us, I would avoid adding it now to avoid the maintenance Ack https://review.coreboot.org/c/coreboot/+/74380/comment/a497ab5d_cd5a22ce PS1, Line 26: MTL_P_682_28W_CORE, > same Done https://review.coreboot.org/c/coreboot/+/74380/comment/e1128a51_d134a9b0 PS1, Line 33: TDP_28W = 28, > same Done https://review.coreboot.org/c/coreboot/+/74380/comment/ed6b16f8_e6e080ef PS1, Line 34: TDP_45W = 45 > same Done https://review.coreboot.org/c/coreboot/+/74380/comment/9e1e6fe3_a355dce1 PS1, Line 43: { PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_45W_CORE, TDP_45W }, > same Done https://review.coreboot.org/c/coreboot/+/74380/comment/5dec9192_17f6d829 PS1, Line 45: { PCI_DID_INTEL_MTL_P_ID_3, MTL_P_482_CORE, TDP_28W }, : { PCI_DID_INTEL_MTL_P_ID_4, MTL_P_682_28W_CORE, TDP_28W }, > same Done File src/soc/intel/meteorlake/chipset.cb: https://review.coreboot.org/c/coreboot/+/74380/comment/f1896880_02cc6db6 PS1, Line 12: register "power_limits_config[MTL_P_682_45W_CORE]" = "{ : .tdp_pl1_override = 45, : .tdp_pl2_override = 115, : .tdp_pl4 = 197, : }" > i don't even know if anyone is/will be using 45W part. […] Ack File src/soc/intel/meteorlake/systemagent.c: https://review.coreboot.org/c/coreboot/+/74380/comment/be01841b_1e7186ad PS1, Line 174: for (i = 0; i < ARRAY_SIZE(cpuid_to_mtl); i++) { > https://source.chromium. […] We have plan to make this in common code later, already added in our TODO list. -- To view, visit https://review.coreboot.org/c/coreboot/+/74380 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20c9bc21dfa79696b07c460dbcedb4fa51838bdb Gerrit-Change-Number: 74380 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 17 Apr 2023 09:35:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/meteoerlake: set power limits dynamically
by Sumeet R Pawnikar (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Tarun Tuli, Sumeet R Pawnikar, Eric Lai. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74380 to look at the new patch set (#2). Change subject: soc/intel/meteoerlake: set power limits dynamically ...................................................................... soc/intel/meteoerlake: set power limits dynamically Set power limit values dynamically based on Meteor Lake CPU TDP and PCI ID of SKU. BRANCH=None BUG=b:270664854 TEST=Built and verified power limit values for 15W SKU on Rex board Change-Id: I20c9bc21dfa79696b07c460dbcedb4fa51838bdb Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/chipset.cb M src/soc/intel/meteorlake/systemagent.c 3 files changed, 56 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/74380/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74380 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20c9bc21dfa79696b07c460dbcedb4fa51838bdb Gerrit-Change-Number: 74380 Gerrit-PatchSet: 2 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: soc/intel/alderlake: Rename SOC_INTEL_ALDERLAKE_S3 to D3COLD_SUPPORT
by Lean Sheng Tan (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Felix Singer, Sean Rhodes, Tarun Tuli, Subrata Banik, Christian Walter, Angel Pons, Michael Niewöhner. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74403 ) Change subject: soc/intel/alderlake: Rename SOC_INTEL_ALDERLAKE_S3 to D3COLD_SUPPORT ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc3f19912ac7ee55be8ec7a491598140f9532675 Gerrit-Change-Number: 74403 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Mon, 17 Apr 2023 09:06:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/cmn/cse: Make `cse_get_fpt_partition_info()` function static
by Sridhar Siricilla (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Tarun Tuli, SRIDHAR SIRICILLA, Subrata Banik, Kapil Porwal, Dinesh Gehlot. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74388 ) Change subject: soc/intel/cmn/cse: Make `cse_get_fpt_partition_info()` function static ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/74388/comment/dd526839_6304efca PS6, Line 1219: vboot_recovery_mode_enabled This seems to be redundant considering the execution path starting from store_ish_version() -- To view, visit https://review.coreboot.org/c/coreboot/+/74388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie50453946c8abe55c29e9001263f0264a73c8fac Gerrit-Change-Number: 74388 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: SRIDHAR SIRICILLA Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Mon, 17 Apr 2023 08:59:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/brya/var/crota: select SOC_INTEL_RAPTORLAKE
by build bot (Jenkins) (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Tarun Tuli. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74494 ) Change subject: mb/google/brya/var/crota: select SOC_INTEL_RAPTORLAKE ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/Kconfig.name: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174265): https://review.coreboot.org/c/coreboot/+/74494/comment/0bf03515_58196f8c PS1, Line 223: select SOC_INTEL_RAPTORLAKE trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/74494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I448c58f93fddc44904c1f5ef3f8939618eff536f Gerrit-Change-Number: 74494 Gerrit-PatchSet: 1 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Mon, 17 Apr 2023 08:56:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/brya/var/crota: select SOC_INTEL_RAPTORLAKE
by Terry Chen (Code Review) 17 Apr '23

17 Apr '23

Terry Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74494 ) Change subject: mb/google/brya/var/crota: select SOC_INTEL_RAPTORLAKE ...................................................................... mb/google/brya/var/crota: select SOC_INTEL_RAPTORLAKE Select SOC_INTEL_RAPTORLAKE to force coreboot to use the RPL FSP headers for FSP as crota is using a converged firmware image. BUG=b:267249674 BRANCH=firmware-brya-14505.B TEST="FW_NAME=crota emerge-brya coreboot-private-files-baseboard-brya coreboot chromeos-bootimage" Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Change-Id: I448c58f93fddc44904c1f5ef3f8939618eff536f --- M src/mainboard/google/brya/Kconfig.name 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/74494/1 diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 6775590..fa3e86a 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -220,6 +220,7 @@ select DRIVERS_GENESYSLOGIC_GL9750 select DRIVERS_I2C_CS42L42 select HAVE_WWAN_POWER_SEQUENCE + select SOC_INTEL_RAPTORLAKE config BOARD_GOOGLE_MOLI bool "-> Moli" -- To view, visit https://review.coreboot.org/c/coreboot/+/74494 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I448c58f93fddc44904c1f5ef3f8939618eff536f Gerrit-Change-Number: 74494 Gerrit-PatchSet: 1 Gerrit-Owner: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: soc/intel: Introduce ioapic_get_sci_pin()
by Kyösti Mälkki (Code Review) 17 Apr '23

17 Apr '23

Attention is currently required from: Lance Zhao, Tim Wawrzynczak, Werner Zeh. Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74326 to look at the new patch set (#4). Change subject: soc/intel: Introduce ioapic_get_sci_pin() ...................................................................... soc/intel: Introduce ioapic_get_sci_pin() According to ACPI Release 6.5 systems supporting PIC (i8259) interrupt mechanism need to report IRQ vector for the SCI_INT field. In PIC mode only IRQ0..15 are allowed hardware vectors. This change should cover section 5.2.9 to not pass SCI_INT larger than IRQ15. Section 5.2.15.5 needs follow-up work. Care should be taken that ioapic_get_sci_pin() is called after platform code has potentially changed the routing from the default. It appears touched all platforms except siemens/mc_aplX currently program SCI as IRQ9. Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/acpi.c M src/arch/x86/include/arch/ioapic.h M src/include/acpi/acpi.h M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/fadt.c M src/soc/intel/baytrail/include/soc/acpi.h M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/fadt.c M src/soc/intel/braswell/include/soc/acpi.h M src/soc/intel/common/block/acpi/acpi.c 10 files changed, 127 insertions(+), 92 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/74326/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/74326 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee Gerrit-Change-Number: 74326 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: asus/p2b: Remove MADT LAPIC
by Kyösti Mälkki (Code Review) 17 Apr '23

17 Apr '23

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74472 to look at the new patch set (#3). Change subject: asus/p2b: Remove MADT LAPIC ...................................................................... asus/p2b: Remove MADT LAPIC Fix after 'commit 69a13964ea6c ("sb,soc/amd,intel: Add and use ACPI_COMMON_MADT_LAPIC")' broke interrupt delivery in kernel. Apparently combination of LAPIC without IOAPIC is too rare to be well supported. Change-Id: I5e2fbf358cf644665b897afb0a9404abb5ca1df2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/emulation/qemu-i440fx/Kconfig M src/southbridge/intel/i82371eb/Kconfig 2 files changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/74472/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e2fbf358cf644665b897afb0a9404abb5ca1df2 Gerrit-Change-Number: 74472 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023