coreboot-gerrit April 2023

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[M] Change in coreboot[master]: src/cpu/power9: move part of scom.h to scom.c
by Felix Held (Code Review) 18 Apr '23

18 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67055 ) Change subject: src/cpu/power9: move part of scom.h to scom.c ...................................................................... src/cpu/power9: move part of scom.h to scom.c Reset function, constants and include are not used outside of scom.c and not going to be. Change-Id: Iff4e98ae52c7099954f0c20fcb639eb87af15534 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67055 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M src/cpu/power9/scom.c M src/include/cpu/power/scom.h 2 files changed, 34 insertions(+), 21 deletions(-) Approvals: build bot (Jenkins): Verified Michał Kopeć: Looks good to me, approved diff --git a/src/cpu/power9/scom.c b/src/cpu/power9/scom.c index e55d149b..3e973e5 100644 --- a/src/cpu/power9/scom.c +++ b/src/cpu/power9/scom.c @@ -4,6 +4,9 @@ #include <cpu/power/spr.h> // HMER #include <console/console.h> +#define XSCOM_ADDR_IND_ADDR PPC_BITMASK(11, 31) +#define XSCOM_ADDR_IND_DATA PPC_BITMASK(48, 63) + #define XSCOM_DATA_IND_READ PPC_BIT(0) #define XSCOM_DATA_IND_COMPLETE PPC_BIT(32) #define XSCOM_DATA_IND_ERR PPC_BITMASK(33, 35) @@ -15,6 +18,21 @@ #define XSCOM_LOG_REG 0x00090012 #define XSCOM_ERR_REG 0x00090013 +static void reset_scom_engine(void) +{ + /* + * With cross-CPU SCOM accesses, first register should be cleared on the + * executing CPU, the other two on target CPU. In that case it may be + * necessary to do the remote writes in assembly directly to skip checking + * HMER and possibly end in a loop. + */ + write_scom_direct(XSCOM_RCVED_STAT_REG, 0); + write_scom_direct(XSCOM_LOG_REG, 0); + write_scom_direct(XSCOM_ERR_REG, 0); + clear_hmer(); + eieio(); +} + uint64_t read_scom_direct(uint64_t reg_address) { uint64_t val; @@ -117,19 +135,3 @@ return data & XSCOM_DATA_IND_DATA; } - -/* This function should be rarely called, don't make it inlined */ -void reset_scom_engine(void) -{ - /* - * With cross-CPU SCOM accesses, first register should be cleared on the - * executing CPU, the other two on target CPU. In that case it may be - * necessary to do the remote writes in assembly directly to skip checking - * HMER and possibly end in a loop. - */ - write_scom_direct(XSCOM_RCVED_STAT_REG, 0); - write_scom_direct(XSCOM_LOG_REG, 0); - write_scom_direct(XSCOM_ERR_REG, 0); - clear_hmer(); - eieio(); -} diff --git a/src/include/cpu/power/scom.h b/src/include/cpu/power/scom.h index f5354c8..42eacc6 100644 --- a/src/include/cpu/power/scom.h +++ b/src/include/cpu/power/scom.h @@ -30,13 +30,10 @@ // Higher bits specify indirect address #define XSCOM_ADDR_IND_FLAG PPC_BIT(0) -#define XSCOM_ADDR_IND_ADDR PPC_BITMASK(11, 31) -#define XSCOM_ADDR_IND_DATA PPC_BITMASK(48, 63) #ifndef __ASSEMBLER__ #include <types.h> #include <arch/io.h> -#include <cpu/power/spr.h> // TODO: these are probably specific to POWER9 typedef enum { @@ -88,8 +85,6 @@ EC23_CHIPLET_ID = 0x37 ///< Core23 chiplet (Quad5, EX11, C1) } chiplet_id_t; -void reset_scom_engine(void); - uint64_t read_scom_direct(uint64_t reg_address); void write_scom_direct(uint64_t reg_address, uint64_t data); -- To view, visit https://review.coreboot.org/c/coreboot/+/67055 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iff4e98ae52c7099954f0c20fcb639eb87af15534 Gerrit-Change-Number: 67055 Gerrit-PatchSet: 4 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/omnigul: Adjust I2Cs CLK to be around 400 kHz
by Felix Held (Code Review) 18 Apr '23

18 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74393 ) Change subject: mb/google/brya/var/omnigul: Adjust I2Cs CLK to be around 400 kHz ...................................................................... mb/google/brya/var/omnigul: Adjust I2Cs CLK to be around 400 kHz Need to tune I2C bus 0/1/3/5 clock frequency under the 400kHz for audio, TPM, touchscreen, and touchpad. Tuning i2c frequency for omnigul I2C0 - Audio CLK : 293.7khz I2C1 - TPM CLK : 388.8khz I2C3 - Touch Screen CLK : 294.8khz I2C5 - Touch Pad CLK : 389.2khz BUG=b:275061994 BRANCH=firmware-brya-14505.B TEST=emerge-brya coreboot, and measure i2c clock. Change-Id: I7c4fdf0e003318a69b870b487a60accefbc0ffed Signed-off-by: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74393 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/omnigul/overridetree.cb 1 file changed, 39 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/omnigul/overridetree.cb b/src/mainboard/google/brya/variants/omnigul/overridetree.cb index 6ba5ba0..760ee82 100644 --- a/src/mainboard/google/brya/variants/omnigul/overridetree.cb +++ b/src/mainboard/google/brya/variants/omnigul/overridetree.cb @@ -24,16 +24,28 @@ register "common_soc_config" = "{ .i2c[0] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 650, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, .i2c[1] = { .early_init = 1, .speed = I2C_SPEED_FAST, + .rise_time_ns = 600, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, .i2c[3] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 600, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, .i2c[5] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 650, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, }" -- To view, visit https://review.coreboot.org/c/coreboot/+/74393 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c4fdf0e003318a69b870b487a60accefbc0ffed Gerrit-Change-Number: 74393 Gerrit-PatchSet: 3 Gerrit-Owner: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyle Lin <kylelinck(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: arch/arm64: Add aarch64 target linker arguments
by Arthur Heymans (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Julius Werner. Hello build bot (Jenkins), Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74500 to look at the new patch set (#2). Change subject: arch/arm64: Add aarch64 target linker arguments ...................................................................... arch/arm64: Add aarch64 target linker arguments This fixes building aarch64 with clang. Change-Id: I6ee4c0c34e2aa52e4f6c72338880a5cf9cc7009b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm64/armv8/Makefile.inc 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/74500/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ee4c0c34e2aa52e4f6c72338880a5cf9cc7009b Gerrit-Change-Number: 74500 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: arch/arm64: Add Clang as supported target
by Arthur Heymans (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Julius Werner, Arthur Heymans. Hello build bot (Jenkins), Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74501 to look at the new patch set (#2). Change subject: arch/arm64: Add Clang as supported target ...................................................................... arch/arm64: Add Clang as supported target QEMU aarch64 boots to payload when compiled with clang. Change-Id: I940a1ccf5cc4ec7bed5b6c8be92fc47922e1e747 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm64/Kconfig 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/74501/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I940a1ccf5cc4ec7bed5b6c8be92fc47922e1e747 Gerrit-Change-Number: 74501 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/meteorlake: Enable Key Locker
by Subrata Banik (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Tarun Tuli, Pratikkumar Prajapati, Kapil Porwal, Pratikkumar V Prajapati. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71120 ) Change subject: soc/intel/meteorlake: Enable Key Locker ...................................................................... Patch Set 21: (1 comment) Patchset: PS21: 20ms boot time regression seen. -- To view, visit https://review.coreboot.org/c/coreboot/+/71120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9919f44623972d7bbae4a9b886e1da4ac7879c98 Gerrit-Change-Number: 71120 Gerrit-PatchSet: 21 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 11:26:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util: Use common ARRAY_SIZE define
by Grzegorz Bernacki (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Konrad Adamczyk, Robert Zieba, Jakub Czapiga, Christian Walter, Felix Held. Grzegorz Bernacki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74474 ) Change subject: util: Use common ARRAY_SIZE define ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29b776586b4f0548d4026b2ac77095791fc9f3a3 Gerrit-Change-Number: 74474 Gerrit-PatchSet: 2 Gerrit-Owner: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Grzegorz Bernacki Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Apr 2023 11:25:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: Allow to build romstage sources inside the bootblock
by Arthur Heymans (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Raul Rangel, Jakub Czapiga, ron minnich, Paul Menzel, Stefan Reinauer, Julius Werner, Angel Pons, Keith Hui, Patrick Rudolph, Branden Waldner, Martin L Roth, Christian Walter, Felix Held. Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Philipp Hug, Jakub Czapiga, Frans Hendriks, ron minnich, Stefan Reinauer, Subrata Banik, Julius Werner, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Piotr Król, Erik van den Bogaert, Jason Glenesk, Michał Żygowski, Martin L Roth, Marshall Dawson, Christian Walter, Yu-Ping Wu, ron minnich, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55068 to look at the new patch set (#35). Change subject: Allow to build romstage sources inside the bootblock ...................................................................... Allow to build romstage sources inside the bootblock Having a separate romstage is only desirable: - with advanced setups like vboot or normal/fallback - boot medium is slow at startup (some ARM SOCs) - bootblock is limited in size (Intel APL 32K) When this is not the case there is no need for the extra complexity that romstage brings. Including the romstage sources inside the bootblock substantially reduces the total code footprint. Often the resulting code is 10-20k smaller. This is controlled via a Kconfig option. TESTED: works on qemu x86, arm and aarch64 with and without VBOOT. Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/Kconfig M src/arch/arm64/romstage.c M src/arch/x86/Makefile.inc M src/arch/x86/assembly_entry.S M src/arch/x86/car.ld M src/arch/x86/memcpy.c M src/arch/x86/memlayout.ld M src/arch/x86/memmove_32.c M src/arch/x86/memset.c M src/commonlib/storage/sdhci.c M src/console/Kconfig M src/console/console.c M src/console/init.c M src/cpu/x86/cache/cache.c M src/drivers/net/ne2k.c M src/drivers/siemens/nc_fpga/nc_fpga_early.c M src/drivers/usb/ehci_debug.c M src/drivers/vpd/vpd.c M src/include/cbmem.h M src/include/console/cbmem_console.h M src/include/console/console.h M src/include/console/ne2k.h M src/include/console/qemu_debugcon.h M src/include/console/spkmodem.h M src/include/console/system76_ec.h M src/include/console/uart.h M src/include/console/usb.h M src/include/memlayout.h M src/include/rules.h M src/include/symbols.h M src/include/timestamp.h M src/lib/asan.c M src/lib/cbfs.c M src/lib/prog_loaders.c M src/mainboard/emulation/qemu-armv7/romstage.c M src/mainboard/emulation/qemu-riscv/memlayout.ld M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/daisy/romstage.c M src/mainboard/google/peach_pit/romstage.c M src/mainboard/google/poppy/variants/nautilus/sku.c M src/mainboard/google/rambi/chromeos.c M src/mainboard/google/veyron/romstage.c M src/mainboard/google/veyron_mickey/romstage.c M src/mainboard/google/veyron_rialto/romstage.c M src/mainboard/ti/beaglebone/romstage.c M src/security/vboot/Kconfig M src/security/vboot/Makefile.inc M src/security/vboot/common.c M src/security/vboot/misc.h M src/security/vboot/vboot_common.c M src/soc/intel/common/block/pmc/pmclib.c M src/soc/intel/common/block/systemagent/memmap.c M src/vendorcode/eltan/security/verified_boot/vboot_check.c M tests/lib/imd_cbmem-test.c 55 files changed, 157 insertions(+), 97 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/55068/35 -- To view, visit https://review.coreboot.org/c/coreboot/+/55068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284 Gerrit-Change-Number: 55068 Gerrit-PatchSet: 35 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)chromium.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Branden Waldner <scruffy99(a)gmail.com> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: ron minnich <rminnich(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Branden Waldner <scruffy99(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: arch/arm64: Add Clang as supported target
by Arthur Heymans (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Julius Werner. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74501 ) Change subject: arch/arm64: Add Clang as supported target ...................................................................... arch/arm64: Add Clang as supported target QEMU aarch64 boots to payload when compiled with clang. Change-Id: I940a1ccf5cc4ec7bed5b6c8be92fc47922e1e747 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm64/Kconfig 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/74501/1 diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 588e8ce..61ebbf3 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -1,5 +1,6 @@ config ARCH_ARM64 bool + select ARCH_SUPPORTS_CLANG config ARCH_BOOTBLOCK_ARM64 bool -- To view, visit https://review.coreboot.org/c/coreboot/+/74501 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I940a1ccf5cc4ec7bed5b6c8be92fc47922e1e747 Gerrit-Change-Number: 74501 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/arm64: Add aarch64 target linker arguments
by Arthur Heymans (Code Review) 18 Apr '23

18 Apr '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74500 ) Change subject: arch/arm64: Add aarch64 target linker arguments ...................................................................... arch/arm64: Add aarch64 target linker arguments This fixes building aarch64 with clang. Change-Id: I6ee4c0c34e2aa52e4f6c72338880a5cf9cc7009b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm64/armv8/Makefile.inc 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/74500/1 diff --git a/src/arch/arm64/armv8/Makefile.inc b/src/arch/arm64/armv8/Makefile.inc index 15d80e6..c52c7f9 100644 --- a/src/arch/arm64/armv8/Makefile.inc +++ b/src/arch/arm64/armv8/Makefile.inc @@ -26,6 +26,14 @@ decompressor-y += mmu.c bootblock-y += mmu.c +ifneq ($(CONFIG_COMPILER_GCC),y) +bootblock-ld-ccopts += -target aarch64-eabi +verstage-ld-ccopts += -target aarch64-eabi +romstage-ld-ccopts += -target aarch64-eabi +ramstage-ld-ccopts += -target aarch64-eabi +rmodule_arm-ld-ccopts += -target aarch64-eabi +endif + bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c decompressor-generic-ccopts += $(armv8_flags) -- To view, visit https://review.coreboot.org/c/coreboot/+/74500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ee4c0c34e2aa52e4f6c72338880a5cf9cc7009b Gerrit-Change-Number: 74500 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: Kconfig: Set better defaults for building romstage
by Paul Menzel (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Frans Hendriks, Arthur Heymans, Andrey Petrov. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63419 ) Change subject: Kconfig: Set better defaults for building romstage ...................................................................... Patch Set 36: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63419/comment/91726fd6_7b95374d PS36, Line 7: Set better Improve https://review.coreboot.org/c/coreboot/+/63419/comment/6500028c_acad3bc0 PS36, Line 11: Could you please explain/mention the ARCH_X86_64_PGTBL_LOC changes? -- To view, visit https://review.coreboot.org/c/coreboot/+/63419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c53b6fa7a3e66415c5b1c539918a6c1cd8defa1 Gerrit-Change-Number: 63419 Gerrit-PatchSet: 36 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 10:56:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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