coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mb/google/myst: Add eSPI configuration
by Jon Murphy (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74110 ) Change subject: mb/google/myst: Add eSPI configuration ...................................................................... Patch Set 30: (1 comment) File src/mainboard/google/myst/bootblock.c: https://review.coreboot.org/c/coreboot/+/74110/comment/d2803d63_5a786b0a PS30, Line 14: } > +1. Thanks for catching that. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74110 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b40adec78d4e0b596596fa6e2951c79bd3bd8c7 Gerrit-Change-Number: 74110 Gerrit-PatchSet: 30 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Mark Hasemeyer <markhas(a)google.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 17:39:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable AP <-> GSC communication
by Jon Murphy (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74111 ) Change subject: mb/google/myst: Enable AP <-> GSC communication ...................................................................... Patch Set 32: (2 comments) File src/mainboard/google/myst/Kconfig: https://review.coreboot.org/c/coreboot/+/74111/comment/69aee0d6_d6e8eec5 PS32, Line 23: SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP > This requires PSP support to assume ownership of the bus. […] Done File src/mainboard/google/myst/mainboard.c: https://review.coreboot.org/c/coreboot/+/74111/comment/1c3bdb63_a3a4a216 PS32, Line 54: static void configure_psp_tpm_gpio(void) > This needs to wait until PSP assumes ownership of the bus. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74111 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e235356b252a7b68a42da128ffd3189a829f117 Gerrit-Change-Number: 74111 Gerrit-PatchSet: 32 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 17:39:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Felix Held (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 36: (1 comment) File src/mainboard/google/myst/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/74112/comment/dfc8bca0_e315d7fc PS36, Line 12: .start_logical_lane = 13, : .end_logical_lane = 13, > @Felix: I believe the corresponding logical lane is 1 based on the mapping here - https://chromium. […] from my understanding, the lane numbers that need to be put into the descriptor are the lane numbers from the schematic. this is probably due to a change in phoennix compared to mendocino. at least for the fp8 phoenix 1 on the birman board this seems to be true -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 36 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 17:35:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree
by Jon Murphy (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Raul Rangel, Martin L Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 ) Change subject: mb/google/myst: Enable PCIe devices in devicetree ...................................................................... Patch Set 36: (2 comments) File src/mainboard/google/myst/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/74112/comment/39aba317_39063020 PS36, Line 9: { /* WWAN */ > Good for the first pass. […] Ack https://review.coreboot.org/c/coreboot/+/74112/comment/884c2bef_57f702cc PS36, Line 12: .start_logical_lane = 13, : .end_logical_lane = 13, > @Felix: I believe the corresponding logical lane is 1 based on the mapping here - https://chromium. […] Shared by Felix: https://review.coreboot.org/c/coreboot/+/74223 "seems that you should be using the lane numbers form the schematic on phoenix and newer" -- To view, visit https://review.coreboot.org/c/coreboot/+/74112 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icdad785bcb90de036095bcc4219c15f55f4277fe Gerrit-Change-Number: 74112 Gerrit-PatchSet: 36 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Mark Hasemeyer <markhas(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Apr 2023 17:30:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/amd/birman/ec.c: Update EC configuration
by Felix Held (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Jason Glenesk, Paul Menzel, Martin Roth, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73971 ) Change subject: mb/amd/birman/ec.c: Update EC configuration ...................................................................... Patch Set 9: (14 comments) Patchset: PS9: i'm finally done with the ec code review File src/mainboard/amd/birman/Kconfig: https://review.coreboot.org/c/coreboot/+/73971/comment/36d8e53c_9dd48d0d PS9, Line 94: IO i'd say PCIe and not IO here https://review.coreboot.org/c/coreboot/+/73971/comment/e6dcf884_4c63366f PS9, Line 94: Ether probably a typo https://review.coreboot.org/c/coreboot/+/73971/comment/daa2eb7f_71f2a8b2 PS9, Line 117: bool "Only WLAN Enabled" maybe add that it'll use 2 lanes in this case? https://review.coreboot.org/c/coreboot/+/73971/comment/c7875f44_b27672c4 PS9, Line 120: bool "Only WWAN Enabled" same here File src/mainboard/amd/birman/ec.c: https://review.coreboot.org/c/coreboot/+/73971/comment/0e89495e_b9de94ca PS9, Line 57: ECC_TAD_BUF_EN ECC_T*P*AD_BUF_EN https://review.coreboot.org/c/coreboot/+/73971/comment/4eda3934_60edb34b PS9, Line 64: #define ECD_FPR_RSVD BIT(4) i'd drop this reserved bit' it's also an input and not an output like the rest https://review.coreboot.org/c/coreboot/+/73971/comment/9a496137_7aca90cb PS9, Line 122: tmp |= EC3_DT_RST_AUX | EC3_LOM_RST_AUX; EC3_EVAL_RST_AUX probably should be set. not sure if conditionally on CONFIG(ENABLE_EVAL_CARD) or in any case https://review.coreboot.org/c/coreboot/+/73971/comment/0346b0e4_dfb47bbc PS9, Line 143: tmp |= EC9_CAM0_PWR_EN | EC9_CAM1_PWR_EN | EC9_WWAN_RST; should EC9_TPM_PWR_EN be set too or not? i don't think that we'll be using the tpm module; not sure if there's some reason to not enable it https://review.coreboot.org/c/coreboot/+/73971/comment/f0412524_a3aa78ca PS9, Line 151: i'd write the config we want to EC_GPIO_A_ADDR so that we can be sure that the i2c devices will show up on the expected bus. since we'll need to specify all bits, it's not needed to read the previous state here https://review.coreboot.org/c/coreboot/+/73971/comment/441bc735_2c99f511 PS9, Line 151: even though they're enabled by default, i'd set ECC_NFC_BUF_EN, ECC_TPAD_BUF_EN and ECC_TPNL_BUF_EN in EC_GPIO_C_ADDR https://review.coreboot.org/c/coreboot/+/73971/comment/6841b315_414d6cb4 PS9, Line 153: tmp |= ECD_TPNL_PWR_EN | ECD_TPNL_EN; i'd set ECD_TPAD_DISABLE_N here https://review.coreboot.org/c/coreboot/+/73971/comment/fb25a3ff_f31a1cfd PS9, Line 162: tmp = ec_read(EC_GPIO_E_ADDR); i'd clear ECE_BT_N_TPNL_SEL to make sure that the bluetooth module gets connected to usb so that it'll work https://review.coreboot.org/c/coreboot/+/73971/comment/45e2fa17_c21ef64c PS9, Line 179: CONFIG(WLAN0_WWAN0) || CONFIG(WWAN01) this is equivalent to !CONFIG(WLAN01); not sure which one is better. in the CONFIG(WLAN01) case, i'd drop the ! and swap the branches. feel free to just ack this one if you prefer the way it is set up at the moment. same in line 184 -- To view, visit https://review.coreboot.org/c/coreboot/+/73971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd9df120f555eb06f920f6263a8d2ab45c05baec Gerrit-Change-Number: 73971 Gerrit-PatchSet: 9 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 17:24:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add RTD3 support for SSD
by John Zhao (Code Review) 18 Apr '23

18 Apr '23

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74531 ) Change subject: mb/google/rex: Add RTD3 support for SSD ...................................................................... mb/google/rex: Add RTD3 support for SSD PCIe root port 9 has the configuration for SSD. This change adds RTD3 support for SSD. BUG=None TEST=Booted to kernel and verified that PCIe RP09 has RTD3 scope with ON and OFF methods. Change-Id: I680f980cfdf5bfd433a7602e1a488af3d6a6f537 Signed-off-by: zhaojohn <john.zhao(a)intel.com> --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/74531/1 diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index ebe1428..9a1e225 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -267,6 +267,12 @@ .clk_req = 4, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A19)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A20)" + register "srcclk_pin" = "4" + device generic 0 on end + end end #PCIE9 SSD card device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp2 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/74531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f980cfdf5bfd433a7602e1a488af3d6a6f537 Gerrit-Change-Number: 74531 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: util/crossgcc: Update binutils from 2.37 to 2.40
by Nick Vaccaro (Code Review) 18 Apr '23

18 Apr '23

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66920 ) Change subject: util/crossgcc: Update binutils from 2.37 to 2.40 ...................................................................... Patch Set 27: (1 comment) Patchset: PS27: > Hi Nick! Not a specific bug I am aware of. […] Thanks for the info, Felix. -- To view, visit https://review.coreboot.org/c/coreboot/+/66920 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34a20a999f7ea624c1add4750fcd116166953dd8 Gerrit-Change-Number: 66920 Gerrit-PatchSet: 27 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 18 Apr 2023 16:32:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/mendocino: Print content of manifest file
by Karthik Ramasubramanian (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Jakub Czapiga, Matt DeVillier, Paul Menzel, Grzegorz Bernacki, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74269 ) Change subject: soc/amd/mendocino: Print content of manifest file ...................................................................... Patch Set 3: (3 comments) File src/soc/amd/mendocino/manifest.c: https://review.coreboot.org/c/coreboot/+/74269/comment/4faefbd4_1b9dd37f PS3, Line 12: { Nit: Open brace not required for single statement if block. https://review.coreboot.org/c/coreboot/+/74269/comment/953d1879_ae3e96d4 PS3, Line 16: Blobs Nit: AMDFW Blobs version https://review.coreboot.org/c/coreboot/+/74269/comment/de9fd4d3_7168166c PS3, Line 22: BS_PAYLOAD_LOAD I am fine with dumping at this boot state. This will ensure that the table gets dumped only during boot even when we support S3. I am not sure if others have any opinions. @Felix, @Martin. -- To view, visit https://review.coreboot.org/c/coreboot/+/74269 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8df54b74cd987b4a3be635932d38ea178d0b0311 Gerrit-Change-Number: 74269 Gerrit-PatchSet: 3 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Apr 2023 16:26:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/mendocino: Add Kconfig option to generate manifest
by Karthik Ramasubramanian (Code Review) 18 Apr '23

18 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Jakub Czapiga, Matt DeVillier, Paul Menzel, Grzegorz Bernacki, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74267 ) Change subject: soc/amd/mendocino: Add Kconfig option to generate manifest ...................................................................... Patch Set 3: (4 comments) File src/soc/amd/mendocino/Kconfig: https://review.coreboot.org/c/coreboot/+/74267/comment/07cd50f7_687f54d5 PS3, Line 492: ersion specific blobs Nit: blob specific version or blob version https://review.coreboot.org/c/coreboot/+/74267/comment/25db6b55_52a140ea PS3, Line 494: both from binary and at the runtime Nit: from the binary at the runtime. File src/soc/amd/mendocino/Makefile.inc: https://review.coreboot.org/c/coreboot/+/74267/comment/9a548aa6_c64e34fc PS3, Line 219: manifest Nit: amdfw_manifest https://review.coreboot.org/c/coreboot/+/74267/comment/99344f2b_3b09205d PS3, Line 265: $(OPT_MANIFEST) \ Move it under AMDFW_COMMON_ARGS. That will it will be applicable to all 3 amdfw[_a|b].rom -- To view, visit https://review.coreboot.org/c/coreboot/+/74267 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13c9d322735e0979484b120c665fb100cf187eab Gerrit-Change-Number: 74267 Gerrit-PatchSet: 3 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Apr 2023 16:15:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib: Perform early initialization of FW config in ramstage
by build bot (Jenkins) (Code Review) 18 Apr '23

18 Apr '23

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74530 ) Change subject: lib: Perform early initialization of FW config in ramstage ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174334): https://review.coreboot.org/c/coreboot/+/74530/comment/2ec77f98_5ed09ba3 PS1, Line 6: Possible long commit subject (prefer a maximum 65 characters) -- To view, visit https://review.coreboot.org/c/coreboot/+/74530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If36e7c7d2edc74a2b7fcc192690af73651e87183 Gerrit-Change-Number: 74530 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 18 Apr 2023 16:14:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2023