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Change subject: mb/google/myst: Enable AP <-> GSC communication
......................................................................
Patch Set 33:
(1 comment)
File src/mainboard/google/myst/mainboard.c:
https://review.coreboot.org/c/coreboot/+/74111/comment/5433e166_2e5e683d
PS33, Line 5: #include <amdblocks/psp.h>
Do we need the header file in this CL?
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Change subject: mb/google/myst: Add eSPI configuration
......................................................................
Patch Set 31: Code-Review+2
(1 comment)
File src/mainboard/google/myst/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/74110/comment/a306c93e_d23bbe87
PS31, Line 205: __weak void variant_espi_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
Will those pads would change? if not, maybe no need the weak since no override will happen.
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Change subject: mb/google/skyrim: Fix eMMC reset GPIO
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74512/comment/95aaa29c_dd7c7c26
PS3, Line 14: None
Can you please confirm that this boots & suspend/resume fine on eMMC SKUs
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Change subject: mb/google/myst: Enable PCIe devices in devicetree
......................................................................
Patch Set 37:
(1 comment)
File src/mainboard/google/myst/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/74112/comment/73913b4b_b5c3cc5b
PS36, Line 44: { /* SSD TODO(b/277815815): Enable PCIe GEN4 when supported */
> Also can you please check whether NVME <-> eMMC bridge is used and if so which engine and how many l […]
We do use the bridge, our option is BH799BB. go/bayhub-reference. It uses a single lane and should use the PCIE_ENGINE. I'm not sure if I have a good way to detect if it's present like what was used on Markarth and Whiterun, do we need to add a fw_config field?
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Change subject: mb/google/skyrim: Fix eMMC reset GPIO
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Patch Set 3: Code-Review+1
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Change subject: mb/amd/birman: Update DXIO descriptors per schematic
......................................................................
Patch Set 17:
(2 comments)
File src/mainboard/amd/birman/port_descriptors_phoenix.c:
https://review.coreboot.org/c/coreboot/+/69705/comment/59df6fe9_a29ad962
PS16, Line 113: .start_logical_lane = 15, \
: .end_logical_lane = CONFIG(WLAN01) ? 14 : 15, \
can the start lane be greater than the end lane? might be a good idea to try if the dxio logic will dislike this or check with the reference code
File src/mainboard/amd/birman/port_descriptors_phoenix.c:
https://review.coreboot.org/c/coreboot/+/69705/comment/2bd6a83b_5f61ab06
PS17, Line 65: CLK_REQ4
CLK_REQ1?
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Change subject: mb/amd/birman/ec.c: Update EC configuration
......................................................................
Patch Set 11: Code-Review+2
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Change subject: mb/amd/birman/ec.c: Update EC configuration
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/amd/birman/Kconfig:
https://review.coreboot.org/c/coreboot/+/73971/comment/7bd61733_ba6f42ba
PS10, Line 120: WWAN
> wlan
Done
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Hello build bot (Jenkins), Jason Glenesk, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/73971
to look at the new patch set (#11).
Change subject: mb/amd/birman/ec.c: Update EC configuration
......................................................................
mb/amd/birman/ec.c: Update EC configuration
Update the EC GPIO values for Birman, per schematic # 105-D67000-00B
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: Icd9df120f555eb06f920f6263a8d2ab45c05baec
---
M src/mainboard/amd/birman/Kconfig
M src/mainboard/amd/birman/ec.c
2 files changed, 228 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/73971/11
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Change subject: mb/amd/birman/ec.c: Update EC configuration
......................................................................
Patch Set 10: Code-Review+1
(1 comment)
Patchset:
PS10:
the rest looks good to me
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