coreboot-gerrit April 2023

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[M] Change in coreboot[master]: mb/google/corsola: Report SKU and panel ID for unprovisioned devices
by Ruihai Zhou (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin, cong yang. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74135 ) Change subject: mb/google/corsola: Report SKU and panel ID for unprovisioned devices ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/corsola/boardid.c: https://review.coreboot.org/c/coreboot/+/74135/comment/e00292ef_91944103 PS8, Line 116: STARMIE > Done CB:74654 -- To view, visit https://review.coreboot.org/c/coreboot/+/74135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6339dc3c177fb8982f77fb3bd32dc00da735fce4 Gerrit-Change-Number: 74135 Gerrit-PatchSet: 9 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 07:58:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Add RTD3 support for SSD
by Kapil Porwal (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, John Zhao. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74531 ) Change subject: mb/google/rex: Add RTD3 support for SSD ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I680f980cfdf5bfd433a7602e1a488af3d6a6f537 Gerrit-Change-Number: 74531 Gerrit-PatchSet: 2 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 07:57:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/corsola: Rename common config from `STARMIE` to `STARYU`
by cong yang (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Hung-Te Lin, Ruihai Zhou, Yu-Ping Wu, Yidi Lin. cong yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74654 ) Change subject: mb/google/corsola: Rename common config from `STARMIE` to `STARYU` ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74654 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If75e94e86420b0a216fe7a1a9dee9cb42bbd985c Gerrit-Change-Number: 74654 Gerrit-PatchSet: 1 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 07:51:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/corsola: Report SKU and panel ID for unprovisioned devices
by Ruihai Zhou (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin, cong yang. Ruihai Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74135 ) Change subject: mb/google/corsola: Report SKU and panel ID for unprovisioned devices ...................................................................... Patch Set 9: (4 comments) File src/mainboard/google/corsola/boardid.c: https://review.coreboot.org/c/coreboot/+/74135/comment/9bcd2a09_96bf7788 PS8, Line 73: > Remove blank line. Done https://review.coreboot.org/c/coreboot/+/74135/comment/1fa7b958_36060823 PS8, Line 116: STARMIE > Can you upload another patch to rename this to `STARYU`? Done https://review.coreboot.org/c/coreboot/+/74135/comment/7447b45f_d018b9a9 PS8, Line 118: cached_sku_code > Align with `cached_sku_code` in the previous line. Done https://review.coreboot.org/c/coreboot/+/74135/comment/5395c3e9_2ef0b0c5 PS8, Line 128: get_adc_index > Align Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6339dc3c177fb8982f77fb3bd32dc00da735fce4 Gerrit-Change-Number: 74135 Gerrit-PatchSet: 9 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 07:49:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating
by Frank Chu (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli, Eric Lai. Frank Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74627 ) Change subject: mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74627/comment/ef2d7646_788eff6b PS4, Line 11: Please refer Intel doc#723158 for more information. > no need warp line. maybe (prefer a maximum 72 chars per line), try build bot -- To view, visit https://review.coreboot.org/c/coreboot/+/74627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a5199be768fc59e2f053f8c50a49247145e7e72 Gerrit-Change-Number: 74627 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 07:49:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/corsola: Rename common config from `STARMIE` to `STARYU`
by Ruihai Zhou (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu, Yidi Lin. Ruihai Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74654 ) Change subject: mb/google/corsola: Rename common config from `STARMIE` to `STARYU` ...................................................................... mb/google/corsola: Rename common config from `STARMIE` to `STARYU` The STARYU is the mt8186 detachable reference design, and the STARMIE is a variant of STARYU. Let's rename the common config from STARMIE to STARYU, and we can select the STARYU config for the follow up mt8186 detachable variant. BRANCH=corsola BUG=b:275470328 TEST=./utils/abuild/abuild -t google/corsola -a Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Change-Id: If75e94e86420b0a216fe7a1a9dee9cb42bbd985c --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 22 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/74654/1 diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 3bb43bc..6e8c81e 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -12,7 +12,7 @@ def_bool n select BOARD_GOOGLE_CORSOLA_COMMON -config BOARD_GOOGLE_STARMIE_COMMON +config BOARD_GOOGLE_STARYU_COMMON def_bool n select BOARD_GOOGLE_CORSOLA_COMMON diff --git a/src/mainboard/google/corsola/Kconfig.name b/src/mainboard/google/corsola/Kconfig.name index 90f3b48..5d6021d 100644 --- a/src/mainboard/google/corsola/Kconfig.name +++ b/src/mainboard/google/corsola/Kconfig.name @@ -26,8 +26,8 @@ bool "-> Magikarp" select BOARD_GOOGLE_KRABBY_COMMON -comment "Starmie" +comment "Staryu" config BOARD_GOOGLE_STARMIE bool "-> Starmie" - select BOARD_GOOGLE_STARMIE_COMMON + select BOARD_GOOGLE_STARYU_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/74654 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If75e94e86420b0a216fe7a1a9dee9cb42bbd985c Gerrit-Change-Number: 74654 Gerrit-PatchSet: 1 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/corsola: Report SKU and panel ID for unprovisioned devices
by Ruihai Zhou (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Hung-Te Lin, Ruihai Zhou, Yidi Lin, cong yang. Hello Hung-Te Lin, build bot (Jenkins), Yidi Lin, Yu-Ping Wu, cong yang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74135 to look at the new patch set (#9). Change subject: mb/google/corsola: Report SKU and panel ID for unprovisioned devices ...................................................................... mb/google/corsola: Report SKU and panel ID for unprovisioned devices The MIPI panels will be used on the detachable variant starmie, and there will be different MIPI panels used on starmie. In order to make the different panels functional on unprovisioned devices, it needs to pass the SKU ID and panel ID to the payload to load the matched device tree for kernel. From the schematic, the starmie variant will read the LCM ID from ADC channel 5. BRANCH=corsola BUG=b:275470328 TEST=boot starmie and see FW screen display Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Change-Id: I6339dc3c177fb8982f77fb3bd32dc00da735fce4 --- M src/mainboard/google/corsola/boardid.c M src/mainboard/google/corsola/display.h 2 files changed, 84 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/74135/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/74135 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6339dc3c177fb8982f77fb3bd32dc00da735fce4 Gerrit-Change-Number: 74135 Gerrit-PatchSet: 9 Gerrit-Owner: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating
by Frank Chu (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, Eric Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74627 to look at the new patch set (#5). Change subject: mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating ...................................................................... mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating The patch disables PCH USB2 PHY power gating to prevent possible display flicker issue.Please refer Intel doc#723158 for more information. BUG=b:279117758 BRANCH=firmware-brya-14505.B TEST=Verify the build for marasov board Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I5a5199be768fc59e2f053f8c50a49247145e7e72 --- M src/mainboard/google/brya/variants/marasov/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/74627/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/74627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a5199be768fc59e2f053f8c50a49247145e7e72 Gerrit-Change-Number: 74627 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/siemens/mc_ehl4: Enable SD-Card
by Mario Scheithauer (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Werner Zeh. Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74653 ) Change subject: mb/siemens/mc_ehl4: Enable SD-Card ...................................................................... mb/siemens/mc_ehl4: Enable SD-Card This mainboard has SD slot available and therefore it should be enabled. Use the same SD-Card configuration as for mc_ehl2 mainboard. Change-Id: Icd9b25301311679cf93b05ba83a24e551261a020 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb A src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c 3 files changed, 62 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/74653/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc index 2b78a7a..d9050f0 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc @@ -3,5 +3,6 @@ bootblock-y += gpio.c romstage-y += memory.c ramstage-y += gpio.c +ramstage-y += mainboard.c all-$(CONFIG_NC_FPGA_POST_CODE) += post.c diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb index 75fa42d..d5da80c 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb @@ -89,6 +89,8 @@ register "ScsEmmcHs400Enabled" = "0" register "ScsEmmcDdr50Enabled" = "1" register "SdCardPowerEnableActiveHigh" = "1" + # GPIO for SD card detect + register "sdcard_cd_gpio" = "GPP_G5" # LPSS Serial IO (I2C/UART/GSPI) related UPDs register "SerialIoI2cMode" = "{ @@ -170,6 +172,7 @@ device pci 19.2 on end # UART2 device pci 1a.0 on end # eMMC + device pci 1a.1 on end # SD device pci 1c.0 on end # RP1 (pcie0 single VC) device pci 1c.1 on end # RP2 (pcie0 single VC) diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c new file mode 100644 index 0000000..da5c200 --- /dev/null +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/variants.h> +#include <bootstate.h> +#include <device/pci_ids.h> +#include <gpio.h> +#include <intelblocks/pcr.h> +#include <soc/pci_devs.h> +#include <soc/pcr_ids.h> + +#define HOSTCTRL2 0x3E +#define HOSTCTRL2_PRESET (1 << 15) +#define SD_CAP_BYP 0x810 +#define SD_CAP_BYP_EN 0x5A +#define SD_CAP_BYP_REG1 0x814 +#define SD_CAP_BYP_SDR50 (1 << 13) +#define SD_CAP_BYP_SDR104 (1 << 14) +#define SD_CAP_BYP_DDR50 (1 << 15) + +void variant_mainboard_final(void) +{ + struct device *dev; + + /* Limit SD-Card speed to DDR50 mode to avoid SDR104/SDR50 modes due to + layout limitations. */ + dev = pcidev_path_on_root(PCH_DEVFN_SDCARD); + if (dev) { + uint32_t reg; + uint16_t reg16; + struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); + if (!res) + return; + write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN); + reg = read32(res2mmio(res, SD_CAP_BYP_REG1, 0)); + /* Disable SDR104 and SDR50 mode while keeping DDR50 mode enabled. */ + reg &= ~(SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50); + reg |= SD_CAP_BYP_DDR50; + write32(res2mmio(res, SD_CAP_BYP_REG1, 0), reg); + + /* Use preset driver strength from preset value registers. */ + reg16 = read16(res2mmio(res, HOSTCTRL2, 0)); + reg16 |= HOSTCTRL2_PRESET; + write16(res2mmio(res, HOSTCTRL2, 0), reg16); + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd9b25301311679cf93b05ba83a24e551261a020 Gerrit-Change-Number: 74653 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/siemens/mc_ehl4: Switch RTC type and connection
by Mario Scheithauer (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Werner Zeh. Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74652 ) Change subject: mb/siemens/mc_ehl4: Switch RTC type and connection ...................................................................... mb/siemens/mc_ehl4: Switch RTC type and connection This mainboard has the RTC RV-3028-C7 connected to the I2C1. TEST: - Console Log shows no errors for RV-3028-C7 during I2C1 init - Finalize device for I2C 00:52 shows correct date and time Change-Id: I1b4115d7844a0c218fdf92cb1af2da5a95eb4337 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb 2 files changed, 32 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/74652/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig index 21789d7..8a40072 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Kconfig @@ -2,7 +2,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select DRIVERS_I2C_RX6110SA + select DRIVERS_I2C_RV3028C7 select DRIVER_INTEL_I210 select INTEL_LPSS_UART_FOR_CONSOLE select NC_FPGA_POST_CODE diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb index e61a6e8..75fa42d 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb @@ -148,7 +148,20 @@ device pci 14.0 on end # USB3.1 xHCI device pci 15.0 off end # I2C0 - device pci 15.1 on end # I2C1 + device pci 15.1 on # I2C1 + # Enable external RTC chip + chip drivers/i2c/rv3028c7 + register "bus_speed" = "I2C_SPEED_STANDARD" + register "set_user_date" = "1" + register "user_year" = "04" + register "user_month" = "07" + register "user_day" = "01" + register "user_weekday" = "4" + register "bckup_sw_mode" = "BACKUP_SW_LEVEL" + register "cap_charge" = "CHARGE_OFF" + device i2c 0x52 on end # RTC RV3028-C7 + end + end device pci 16.0 hidden end # Management Engine Interface 1 @@ -167,25 +180,9 @@ device pci 1e.0 on end # UART0 device pci 1e.1 on end # UART1 - device pci 1f.0 on end # eSPI Interface device pci 1f.2 hidden end # Power Management Controller - device pci 1f.4 on # SMBus - # Enable external RTC chip - chip drivers/i2c/rx6110sa - register "bus_speed" = "I2C_SPEED_STANDARD" - register "pmon_sampling" = "PMON_SAMPL_256_MS" - register "bks_on" = "0" - register "bks_off" = "1" - register "iocut_en" = "1" - register "set_user_date" = "1" - register "user_year" = "04" - register "user_month" = "07" - register "user_day" = "01" - register "user_weekday" = "4" - device i2c 0x32 on end # RTC RX6110 SA - end - end + device pci 1f.4 on end # SMBus device pci 1f.5 on end # PCH SPI (flash & TPM) end end -- To view, visit https://review.coreboot.org/c/coreboot/+/74652 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b4115d7844a0c218fdf92cb1af2da5a95eb4337 Gerrit-Change-Number: 74652 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newchange

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