coreboot-gerrit April 2023

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[M] Change in coreboot[master]: mb/amd/mayan: Update DXIO descriptors per schematics
by Felix Held (Code Review) 26 Apr '23

26 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74191 ) Change subject: mb/amd/mayan: Update DXIO descriptors per schematics ...................................................................... mb/amd/mayan: Update DXIO descriptors per schematics Change-Id: I8b536f8a1ff4eab06f37aec0f25704525dc1b64e Signed-off-by: Anand Vaikar <a.vaikar2021(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74191 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/amd/mayan/port_descriptors.c 1 file changed, 84 insertions(+), 33 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/mayan/port_descriptors.c b/src/mainboard/amd/mayan/port_descriptors.c index f52abcd..6654806 100644 --- a/src/mainboard/amd/mayan/port_descriptors.c +++ b/src/mainboard/amd/mayan/port_descriptors.c @@ -6,48 +6,86 @@ #include <soc/platform_descriptors.h> #include <types.h> -/* TODO: Update for mayan */ + static const fsp_dxio_descriptor mayan_dxio_descriptors[] = { { + // MXM .engine_type = PCIE_ENGINE, .port_present = true, .start_logical_lane = 0, - .end_logical_lane = 0, - .device_number = 2, - .function_number = 1, - .link_speed_capability = GEN3, - .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .clk_req = CLK_REQ3, - }, - { - .engine_type = PCIE_ENGINE, - .port_present = true, - .start_logical_lane = 1, - .end_logical_lane = 1, - .device_number = 2, - .function_number = 2, - .link_speed_capability = GEN3, - .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .clk_req = CLK_REQ1, - }, - { - .engine_type = PCIE_ENGINE, - .port_present = true, - .start_logical_lane = 2, .end_logical_lane = 3, - .device_number = 2, - .function_number = 3, - .link_speed_capability = GEN3, + .device_number = 1, + .function_number = 1, + .link_speed_capability = GEN_MAX, .turn_off_unused_lanes = true, - .link_aspm = 2, - .link_hotplug = 3, - .gpio_group_id = GPIO_27, + .link_aspm = ASPM_L1, + .link_aspm_L1_1 = true, + .link_aspm_L1_2 = true, + .link_hotplug = false, + .gpio_group_id = 4, + .clk_pm_support = true, .clk_req = CLK_REQ0, + .eq_preset = 3, + .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} + }, + { + // M2 SSD0-NVME + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 16, + .end_logical_lane = 19, + .device_number = 2, + .function_number = 4, + .link_speed_capability = GEN_MAX, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_aspm_L1_1 = true, + .link_aspm_L1_2 = true, + .link_hotplug = false, + .gpio_group_id = 27, + .clk_pm_support = true, + .clk_req = CLK_REQ4, + .eq_preset = 3, + .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} + }, + { + // X1 + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 12, + .end_logical_lane = 12, + .device_number = 1, + .function_number = 3, + .link_speed_capability = GEN_MAX, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_aspm_L1_1 = true, + .link_aspm_L1_2 = true, + .link_hotplug = false, + .clk_pm_support = true, + .clk_req = CLK_REQ2, + .eq_preset = 3, + .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} + }, + { + // DT + .engine_type = PCIE_ENGINE, + .port_present = true, + .start_logical_lane = 8, + .end_logical_lane = 9, + .device_number = 1, + .function_number = 2, + .link_speed_capability = GEN_MAX, + .turn_off_unused_lanes = true, + .link_aspm = ASPM_L1, + .link_aspm_L1_1 = true, + .link_aspm_L1_2 = true, + .link_hotplug = false, + .clk_pm_support = true, + .clk_req = CLK_REQ1, + .eq_preset = 3, + .port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} }, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/74191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8b536f8a1ff4eab06f37aec0f25704525dc1b64e Gerrit-Change-Number: 74191 Gerrit-PatchSet: 6 Gerrit-Owner: Anand Vaikar <a.vaikar2021(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: acpi: Add missing cbfs_unmap()
by Tim Van Patten (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Lance Zhao, Konrad Adamczyk, Jakub Czapiga, Tim Wawrzynczak, Grzegorz Bernacki, Karthik Ramasubramanian. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74715 ) Change subject: acpi: Add missing cbfs_unmap() ...................................................................... Patch Set 3: (1 comment) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/74715/comment/a9fb534a_724b2b5e PS2, Line 1934: cbfs_unmap(dsdt_file); > As long as you don't overflow your heap, there aren't any problems with this approach. I think the expectation is that being a good citizen and freeing your memory actually results in the memory being freed. Then, if we run out of memory, the first step is seeing who allocated without a corresponding free, and cleaning that up. However, the (hidden) gotcha is that freeing is only part of the fix, we also need to free in the correct order. We aren't hitting the memory limit today, but not being able to free memory due to order of operations issues could potentially cause that in the future, and would be a pain to debug and fix, since memory lifetime issues can be tricky without being familiar with how the overall system operates. It may be the case that a more complex allocator is still simpler to maintain than juggling when to free memory to make sure we don't hit the limit. All that being said, I agree with you and I don't think we need to fix the allocator yet, since we still have plenty of room and things are working fine. However, it would be good to track this somehow, or at least make the memory freeing requirements more visible somehow, so we don't need to rediscover what we've learned here again if/when we do run out of space in the future. -- To view, visit https://review.coreboot.org/c/coreboot/+/74715 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf7ba6842f42404ad8bb415f8e7fda10403cbe2e Gerrit-Change-Number: 74715 Gerrit-PatchSet: 3 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 19:54:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: device/pci_rom: Add simple pci_rom_free()
by Karthik Ramasubramanian (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Konrad Adamczyk, Jakub Czapiga, Paul Menzel, Grzegorz Bernacki, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74778 ) Change subject: device/pci_rom: Add simple pci_rom_free() ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc9aad34b6bf101a3a0c06b92ed2dc6f2d7b9b33 Gerrit-Change-Number: 74778 Gerrit-PatchSet: 1 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 26 Apr 2023 19:40:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/common/block/graphics: Add missing cbfs_unmap()
by Karthik Ramasubramanian (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Konrad Adamczyk, Raul Rangel, Jakub Czapiga, Matt DeVillier, Paul Menzel, Grzegorz Bernacki, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74779 ) Change subject: soc/amd/common/block/graphics: Add missing cbfs_unmap() ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74779 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6fbbfd36f0974551befef4d08423a8148e151e7 Gerrit-Change-Number: 74779 Gerrit-PatchSet: 1 Gerrit-Owner: Grzegorz Bernacki Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Grzegorz Bernacki Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 26 Apr 2023 19:40:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/mainboard/rex: Perform CSE FW update in RAMSTAGE
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74764 ) Change subject: src/mainboard/rex: Perform CSE FW update in RAMSTAGE ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74764/comment/2bac0a9a_037da1f3 PS2, Line 9: Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> should be at the end ? -- To view, visit https://review.coreboot.org/c/coreboot/+/74764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Gerrit-Change-Number: 74764 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-CC: Rizwan Qureshi <riz.pro(a)gmail.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 19:24:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/mainboard/rex: Perform CSE FW update in RAMSTAGE
by Subrata Banik (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74764 ) Change subject: src/mainboard/rex: Perform CSE FW update in RAMSTAGE ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: LGTM, i will test this -- To view, visit https://review.coreboot.org/c/coreboot/+/74764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Gerrit-Change-Number: 74764 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-CC: Rizwan Qureshi <riz.pro(a)gmail.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Wed, 26 Apr 2023 19:23:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/mainboard/rex: Perform CSE FW update in RAMSTAGE
by Anil Kumar K (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Sridhar Siricilla, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74764 to look at the new patch set (#2). Change subject: src/mainboard/rex: Perform CSE FW update in RAMSTAGE ...................................................................... src/mainboard/rex: Perform CSE FW update in RAMSTAGE Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> TEST=Build and boot google/rex board. Check CSE FW update is successful. BRANCH=None BUG=b:273207144 Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa --- M src/mainboard/google/rex/Kconfig 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/74764/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74764 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e59b0c61e852d5c3b7357292039211fcdbb0aa Gerrit-Change-Number: 74764 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-CC: Rizwan Qureshi <riz.pro(a)gmail.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/meteorlake: Add config option to choose CSE FW sync in ROMS...
by Anil Kumar K (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla. Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74763 to look at the new patch set (#3). Change subject: soc/intel/meteorlake: Add config option to choose CSE FW sync in ROMSTAGE ...................................................................... soc/intel/meteorlake: Add config option to choose CSE FW sync in ROMSTAGE the change 'commit:248dbe0908f1b: ("Trigger cse_fw_sync before DRAM Init")' added change to enable CSE FW sync in ROMSTAGE i.e. before DRAM initialization. This patch adds CONFIG flag to choose CSE FW sync in ROMSTAGE, allowing platforms to disable this option when they choose to perform CSE FW sync in RAMSTAGE instead. Change-Id: I0a5922f40e719e1bc4e6dc58559d820172550dee Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> BUG=b:273207144 BRANCH=none Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 --- M src/soc/intel/meteorlake/romstage/romstage.c 1 file changed, 25 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74763/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 Gerrit-Change-Number: 74763 Gerrit-PatchSet: 3 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jeremy Compostella <jeremy.compostella(a)gmail.com> Gerrit-CC: Rizwan Qureshi <riz.pro(a)gmail.com> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/cmn/cse: Remove dependency on ME_RW compression for CSE FW ...
by Anil Kumar K (Code Review) 26 Apr '23

26 Apr '23

Anil Kumar K has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/74796 ) Change subject: soc/intel/cmn/cse: Remove dependency on ME_RW compression for CSE FW sync ...................................................................... soc/intel/cmn/cse: Remove dependency on ME_RW compression for CSE FW sync The change 'commit:Iac37aaa5ede5e1cd: ("Add Kconfigs to indicate when CSE FW sync is performed")' adds support to choose CSE FW update to be performed in ROMSTAGE or RAMSTAGE. The patch also introduced a dependency on ME_RW firmware compression. This patch removed the dependency between CSE FW sync in RAMSTAGE and ME_RW firmware compression as these two are not related and should be decoupled to support CSE FW sync in RAMSTAGE without the requirement to compress ME_FW. Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> Change-Id: I5ca4e4a993e4c4cc98b8829cbefff00b28e31549 --- M src/soc/intel/common/block/cse/Kconfig 1 file changed, 21 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/74796/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/74796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ca4e4a993e4c4cc98b8829cbefff00b28e31549 Gerrit-Change-Number: 74796 Gerrit-PatchSet: 4 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: crossgcc: Upgrade GCC from 11.3.0 to 13.1.0
by Elyes Haouas (Code Review) 26 Apr '23

26 Apr '23

Attention is currently required from: Felix Singer, Nico Huber, Martin L Roth. Hello Felix Singer, build bot (Jenkins), Nico Huber, Martin L Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70771 to look at the new patch set (#11). Change subject: crossgcc: Upgrade GCC from 11.3.0 to 13.1.0 ...................................................................... crossgcc: Upgrade GCC from 11.3.0 to 13.1.0 Change-Id: I4f2ed4de4811abaa13528906de71eee29a8f2910 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc D util/crossgcc/patches/gcc-11.3.0_gnat.patch R util/crossgcc/patches/gcc-13.1.0_ada-musl_workaround.patch R util/crossgcc/patches/gcc-13.1.0_asan_shadow_offset_callback.patch A util/crossgcc/patches/gcc-13.1.0_gnat.patch R util/crossgcc/patches/gcc-13.1.0_libcpp.patch R util/crossgcc/patches/gcc-13.1.0_libgcc.patch D util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum A util/crossgcc/sum/gcc-13.1.0.tar.xz.cksum 9 files changed, 57 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/70771/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/70771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f2ed4de4811abaa13528906de71eee29a8f2910 Gerrit-Change-Number: 70771 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2023