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Change subject: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/blobs/+/73339/comment/3082906a_fc5bee9d
PS3, Line 9: cramble config switch
scramble switch
https://review.coreboot.org/c/blobs/+/73339/comment/db834b34_c8a70af0
PS3, Line 10: it fixes
and also fixes
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Change subject: soc/amd/mendocino: Add new 'STT_ALPHA_APU' parameter for DPTC support
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/mendocino/chip.h:
https://review.coreboot.org/c/coreboot/+/73123/comment/7285b51b_78fd496d
PS1, Line 80: uint16_t stt_alpha_apu_tablet;
> Frostflow will need to update stt_alpha_apu in tablet mode. […]
Done
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Change subject: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
The three patches in the topic "8188_scramble" should be merged together, or at least, dramk and dpm binary should be merged together.
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Hello johnson wang, Yu-Ping Wu, Yidi Lin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/blobs/+/73339
to look at the new patch set (#3).
Change subject: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit
......................................................................
soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit
This version adds scramble config switch to support both production
build and serial build, and it fixes fast-k single rank wrong register
bit.
BUG=b:269049451/b:267590318
TEST=Single rank DRAM suspend/resume pass, enable/disable scramble pass
Signed-off-by: Xi Chen <xixi.chen(a)mediatek.corp-partner.google.com>
Change-Id: I7bf751e19d6df32bbd40b9dacad16fb99253d2ae
---
M soc/mediatek/mt8188/dram.elf
M soc/mediatek/mt8188/dram.elf.md5
M soc/mediatek/mt8188/dram_release_notes.txt
3 files changed, 30 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/blobs refs/changes/39/73339/3
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Change subject: soc/amd/mendocino: Add new 'STT_ALPHA_APU' parameter for DPTC support
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/mendocino/chip.h:
https://review.coreboot.org/c/coreboot/+/73123/comment/472634b3_8ca742f7
PS1, Line 80: uint16_t stt_alpha_apu_tablet;
> Frostflow will need to update stt_alpha_apu in tablet mode. […]
I think it is done?
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Change subject: spd/lp5: Modify Hynix LPDDR5X memory Speed
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/skyrim/var/markarth: Update RAM ID table
......................................................................
Patch Set 2: Code-Review+2
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Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73247 )
Change subject: mb/google/brask/var/constitution: Enable Fast VMode for constitution
......................................................................
mb/google/brask/var/constitution: Enable Fast VMode for constitution
Fast VMode makes the SoC throttle when the current exceeds the I_TRIP
threshold.
TEST=FW_NAME=constitution emerge-brask coreboot
Change-Id: I1e68f708b7740567e24f8a3ddb9832aeec7ee6b5
Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73247
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---
M src/mainboard/google/brya/variants/constitution/overridetree.cb
1 file changed, 24 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
David Wu: Looks good to me, approved
Eric Lai: Looks good to me, approved
Pablo Ceballos: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/constitution/overridetree.cb b/src/mainboard/google/brya/variants/constitution/overridetree.cb
index 0844c83..8ed61c0 100644
--- a/src/mainboard/google/brya/variants/constitution/overridetree.cb
+++ b/src/mainboard/google/brya/variants/constitution/overridetree.cb
@@ -1,4 +1,8 @@
chip soc/intel/alderlake
+ register "domain_vr_config[VR_DOMAIN_IA]" = "{
+ .enable_fast_vmode = 1,
+ }"
+
register "sagv" = "SaGv_Enabled"
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # HDMI-IN
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Change subject: mb/google/brask/var/constitution: Enable Fast VMode for constitution
......................................................................
Patch Set 2: Code-Review+2
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Change subject: spd/lp5: Modify Hynix LPDDR5X memory Speed
......................................................................
Patch Set 3: Code-Review+2
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