coreboot-gerrit November 2023

coreboot-gerrit@coreboot.org

1 participants
3037 discussions

[XS] Change in coreboot[main]: nb/intel/sandybridge: Fix unitialized variable issue
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79093?usp=email ) Change subject: nb/intel/sandybridge: Fix unitialized variable issue ...................................................................... nb/intel/sandybridge: Fix unitialized variable issue commit 1e9601c5ef80 ("nb/intel/sandybridge: Standardize MRC vs. native SPD mapping API") introduced an uninitialized variable issue. Change-Id: I41b081dc4c961acc04423067e29e0eabe5f17539 Found-by: Coverity CID 1524317 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79093 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/northbridge/intel/sandybridge/raminit_mrc.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved Felix Held: Looks good to me, approved diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index a1805a2..68b02b8 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -315,7 +315,7 @@ static void spd_fill_pei_data(struct pei_data *pei_data) { struct spd_info spdi = {0}; - unsigned int i, have_memory_down; + unsigned int i, have_memory_down = 0; mb_get_spd_map(&spdi); -- To view, visit https://review.coreboot.org/c/coreboot/+/79093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41b081dc4c961acc04423067e29e0eabe5f17539 Gerrit-Change-Number: 79093 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

[XS] Change in coreboot[main]: nb/intel/sandybridge: Fix unitialized variable issue
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Attention is currently required from: Angel Pons, Jérémy Compostella, Keith Hui, Martin L Roth, Martin Roth, Paul Menzel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79093?usp=email ) Change subject: nb/intel/sandybridge: Fix unitialized variable issue ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41b081dc4c961acc04423067e29e0eabe5f17539 Gerrit-Change-Number: 79093 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Mon, 20 Nov 2023 14:35:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: Update vboot submodule to upstream main
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78865?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: Update vboot submodule to upstream main ...................................................................... Update vboot submodule to upstream main Updating from commit id c59794a6: 2023-11-02 Nicholas Bishop sign_uefi: Support signing via pkcs11 to commit id f2b01bf0: 2023-10-27 Julius Werner firmware: Undeprecate VB2_RECOVERY_FW_GET_FW_BODY This brings in 66 new commits: c59794a6 sign_uefi: Support signing via pkcs11 68d4aa4b sign_uefi: Skip private key check if it's a pkcs11 URI 6b9d624b sign_uefi: Pass each key path separately 483f65e4 sign_official_build.sh: properly show errors on loem issues 516ee7bc sign_uefi: Use named args instead of positional 0eec8e25 vboot_reference-sys: Switch from Command to bindgen::Builder 46f5aab8 image_signing: support multiple release names f13af139 sign_official_build: Sudo invocation within bits of android signing 3f165374 futility: updater: Add optional serial number argument to --ccd 64379cc6 sign_official_build: add --debug flag 7160bf9f 2lib: Fix relocation issue when compiling locally with musl libc 0e27cdff vboot_reference-sys: Add vboot_host.h 2c82e73c Override use_apksigner FLAGS b43469c7 futility/cmd_show: Support --publickey FW_VBLOCK 0eb4da96 tests/futility: Update kern_preamble.bin as kernel_part.bin 68a03355 tests/futility: Move test_show_vs_verify.sh into test_show_and_verify.sh 8daf1474 tests/futility: Move 'futility show' tests to a separate file 34190e3d futility: Exit with error when metadata hash verification not supported 967aa462 firmware/2lib: Fix function comment for vb2api_get_firmware_size() f2b01bf0 firmware: Undeprecate VB2_RECOVERY_FW_GET_FW_BODY ef6d02df futility/vb2_helper: Add missing newline for error messages 886d13d7 PRESUBMIT: switch to cros format ac2e1a75 host/lib: Decouple openssl headers from HOSTLIB 86ec05f7 futility: updater: Add help info for --quirks 2850244e futility: updater: Abort if the unlock_csme_* is used on a locked device f1b5c88d devkeys: delete old unused firmware_bmpfv.bin 4444c5fe crossystem: Fix tpm_fwver for fwid < 12935 98ef339f 2lib: Prevent overwriting the value of fw_vboot2 c7517eb4 make_dev_ssd: support ChromeOS Kdump 8e3462cc tlcl: Increase the TPM_BUFFER_SIZE 740a2966 vboot_reference: Drop 'host' usage for 'internal' in flashrom.h 57877a44 vboot: Remove comments about physical dev switch 3401d16c 2lib: Fix typos, comments and formats fdf52d45 scripts/: Drop deprecated {g,s}et_gbb_flags.sh scripts bf76e9ee 2lib: Output the correct kernel_version 1ac4663e make_dev_firmware.sh: update pattern for matching wp status c57ab9f7 2lib: Add recovery reason VB2_RECOVERY_WIDEVINE_PREPARE e094ba31 tlcl: Reduce the variants of TPM2B b047600d sign_official_build: support key config for pkcs11 f8712b73 vboot: support signing with pkcs11 private key 17fe786f strip_boot_from_image.sh: sfill fast 6c856cd3 futility/updater: Fix EC software write protection logic 1dc5a421 futility: update: Deprecate --unlock_me by --quirk unlock_csme_nissa f0d88587 futility: update: Refactor the 'unlock ME' quirk(s) 81429ee9 futility: update: Do not update RO when the AP RO is locked a3beb737 futility: update: Revise the ordering or quirks 2c1844fa futility: update: Remove unused quirk 'unlock_wilco_me_for_update' 75530d32 tests/futility: Test with new signer_config.csv based firmware updater cba649fa 2lib: Expose 2hmac ab015448 2lib: Refactor hmac to vb2_hmac_calculate 3545f8b4 Revert "sign_uefi: Remove exception catching" 55f625a9 dump_fmap: Add offset and size to flash_ec format output a27ee336 keygeneration: add shellcheck source statements to help linting 055f9aa2 keygeneration: replace_recovery_key.sh: make minios key optional 6cb8ab60 scripts: delete unused values kernel command line 1f76c38b vboot: Drop phone recovery support ccf6b037 scripts: Legacy fix for set_gbb_flags.sh 8f03069e futility: Add basic README.md 88963df8 utility: Query platform wp status with futility 6c3817d2 utility: Drop cros_alias technical debt in dev_debug_vboot df85f512 scripts: Drop cros_alias technical debt in make_dev_firmware.sh 7395cd68 futility/updater_utils.c: Match on EC path to prepare for split 52518415 crossystem: Recover corrupted RW_NVRAM on flash writes 81f9ddaf futility/cmd_gbb_utility.md: Add basic GBB subcmd doc c4995268 futility/: Fix define confusion 69dab5a6 crossystem: Avoid writing duplicate entries to RW_NVRAM 6c37b520 Revert "crossystem: stop supporting legacy chromeos_acpi driver" Change-Id: Ic7ecdabcdd26df349b8abf1c5a77c806facfe1d8 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78865 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M 3rdparty/vboot 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved diff --git a/3rdparty/vboot b/3rdparty/vboot index 24cb127..c59794a 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit 24cb127a5e83a713131ab75cc39b11336019443c +Subproject commit c59794a6e939af42f36086d5fd656ee7496eb4b6 -- To view, visit https://review.coreboot.org/c/coreboot/+/78865?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7ecdabcdd26df349b8abf1c5a77c806facfe1d8 Gerrit-Change-Number: 78865 Gerrit-PatchSet: 4 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[main]: mb/goog/brya/var/brya0/skolas: Disable HPS GPIOs if HPS_ABSENT
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79123?usp=email ) Change subject: mb/goog/brya/var/brya0/skolas: Disable HPS GPIOs if HPS_ABSENT ...................................................................... mb/goog/brya/var/brya0/skolas: Disable HPS GPIOs if HPS_ABSENT Check FW_CONFIG and disable gpios for HPS if HPS_ABSENT for skolas and brya0 variants. BUG=b:311740746 BRANCH=firmware-brya-14505.B TEST=`emerge-brya coreboot chromeos-bootimage`, flash and boot skolas to kernel and verify via "cbmem -c | grep HPS". Change-Id: I8cbe4f40c41f1d06e8f511c3e88c05984566d441 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79123 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/brya0/fw_config.c M src/mainboard/google/brya/variants/skolas/fw_config.c 2 files changed, 28 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/brya0/fw_config.c b/src/mainboard/google/brya/variants/brya0/fw_config.c index e50c5e4..cd595ac 100644 --- a/src/mainboard/google/brya/variants/brya0/fw_config.c +++ b/src/mainboard/google/brya/variants/brya0/fw_config.c @@ -123,6 +123,15 @@ PAD_NC(GPD11, NONE), }; +static const struct pad_config hps_disable_pads[] = { + /* E3 : PROC_GP0 ==> HPS_INT_ODL */ + PAD_NC(GPP_E3, NONE), + /* E7 : PROC_GP1 ==> EN_HPS_PWR */ + PAD_NC(GPP_E7, NONE), + /* F20 : EXT_PWR_GATE# ==> HPS_RST_R */ + PAD_NC(GPP_F20, NONE), +}; + static void enable_i2s(void) { gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads)); @@ -183,5 +192,10 @@ printk(BIOS_INFO, "Disable LTE related GPIO pins.\n"); gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); } + + if (fw_config_probe(FW_CONFIG(HPS, HPS_ABSENT))) { + printk(BIOS_INFO, "Disable HPS related GPIO pins.\n"); + gpio_configure_pads(hps_disable_pads, ARRAY_SIZE(hps_disable_pads)); + } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/brya/variants/skolas/fw_config.c b/src/mainboard/google/brya/variants/skolas/fw_config.c index e50c5e4..86246db 100644 --- a/src/mainboard/google/brya/variants/skolas/fw_config.c +++ b/src/mainboard/google/brya/variants/skolas/fw_config.c @@ -100,6 +100,15 @@ PAD_NC(GPP_VGPIO_37, NONE), }; +static const struct pad_config hps_disable_pads[] = { + /* E3 : PROC_GP0 ==> HPS_INT_ODL */ + PAD_NC(GPP_E3, NONE), + /* E7 : PROC_GP1 ==> EN_HPS_PWR */ + PAD_NC(GPP_E7, NONE), + /* F20 : EXT_PWR_GATE# ==> HPS_RST_R */ + PAD_NC(GPP_F20, NONE), +}; + static const struct pad_config lte_disable_pads[] = { /* A7 : WWAN_PCIE_WAKE_ODL */ PAD_NC(GPP_A7, NONE), @@ -183,5 +192,10 @@ printk(BIOS_INFO, "Disable LTE related GPIO pins.\n"); gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); } + + if (fw_config_probe(FW_CONFIG(HPS, HPS_ABSENT))) { + printk(BIOS_INFO, "Disable HPS related GPIO pins.\n"); + gpio_configure_pads(hps_disable_pads, ARRAY_SIZE(hps_disable_pads)); + } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/79123?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8cbe4f40c41f1d06e8f511c3e88c05984566d441 Gerrit-Change-Number: 79123 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[M] Change in coreboot[main]: mb/goog/brya/var/brya0/skolas: Disable LTE GPIOs if LTE_ABSENT
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79122?usp=email ) Change subject: mb/goog/brya/var/brya0/skolas: Disable LTE GPIOs if LTE_ABSENT ...................................................................... mb/goog/brya/var/brya0/skolas: Disable LTE GPIOs if LTE_ABSENT Check FW_CONFIG and disable gpios for LTE if LTE_ABSENT for skolas and brya0 variants. BUG=b:311459627 BRANCH=firmware-brya-14505.B TEST=`emerge-brya coreboot chromeos-bootimage`, flash and boot skolas to kernel and verify LTE gpios are disabled via "cbmem -c | grep LTE". Change-Id: I3f3bc2b536babf71cc484cce02f96f47707f729c Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79122 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/brya0/fw_config.c M src/mainboard/google/brya/variants/skolas/fw_config.c 2 files changed, 56 insertions(+), 0 deletions(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/brya0/fw_config.c b/src/mainboard/google/brya/variants/brya0/fw_config.c index 9ff3481..e50c5e4 100644 --- a/src/mainboard/google/brya/variants/brya0/fw_config.c +++ b/src/mainboard/google/brya/variants/brya0/fw_config.c @@ -100,6 +100,29 @@ PAD_NC(GPP_VGPIO_37, NONE), }; +static const struct pad_config lte_disable_pads[] = { + /* A7 : WWAN_PCIE_WAKE_ODL */ + PAD_NC(GPP_A7, NONE), + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_NC(GPP_A8, NONE), + /* D5 : SRCCLKREQ0# ==> WWAN_DPR_SAR_ODL */ + PAD_NC(GPP_D5, NONE), + /* E0 : SATAXPCIE0 ==> WWAN_PERST_L */ + PAD_NC(GPP_E0, NONE), + /* E10 : THC0_SPI1_CS# ==> WWAN_CONFIG0 */ + PAD_NC_LOCK(GPP_E10, NONE, LOCK_CONFIG), + /* E16 : WWAN_RST_L */ + PAD_NC(GPP_E16, NONE), + /* E17 : THC0_SPI1_INT# ==> WWAN_CONFIG3 */ + PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG), + /* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L */ + PAD_NC(GPP_F21, NONE), + /* H23 : SRCCLKREQ5# ==> WWAN_CLKREQ_ODL */ + PAD_NC(GPP_H23, NONE), + /* GPD11 : LANPHYC ==> WWAN_CONFIG1 */ + PAD_NC(GPD11, NONE), +}; + static void enable_i2s(void) { gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads)); @@ -155,5 +178,10 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NAU8318_NAU88L25B_I2S))) gpio_configure_pads(nau8318_enable_pads, ARRAY_SIZE(nau8318_enable_pads)); } + + if (fw_config_probe(FW_CONFIG(DB_LTE, LTE_ABSENT))) { + printk(BIOS_INFO, "Disable LTE related GPIO pins.\n"); + gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); + } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/brya/variants/skolas/fw_config.c b/src/mainboard/google/brya/variants/skolas/fw_config.c index 9ff3481..e50c5e4 100644 --- a/src/mainboard/google/brya/variants/skolas/fw_config.c +++ b/src/mainboard/google/brya/variants/skolas/fw_config.c @@ -100,6 +100,29 @@ PAD_NC(GPP_VGPIO_37, NONE), }; +static const struct pad_config lte_disable_pads[] = { + /* A7 : WWAN_PCIE_WAKE_ODL */ + PAD_NC(GPP_A7, NONE), + /* A8 : WWAN_RF_DISABLE_ODL */ + PAD_NC(GPP_A8, NONE), + /* D5 : SRCCLKREQ0# ==> WWAN_DPR_SAR_ODL */ + PAD_NC(GPP_D5, NONE), + /* E0 : SATAXPCIE0 ==> WWAN_PERST_L */ + PAD_NC(GPP_E0, NONE), + /* E10 : THC0_SPI1_CS# ==> WWAN_CONFIG0 */ + PAD_NC_LOCK(GPP_E10, NONE, LOCK_CONFIG), + /* E16 : WWAN_RST_L */ + PAD_NC(GPP_E16, NONE), + /* E17 : THC0_SPI1_INT# ==> WWAN_CONFIG3 */ + PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG), + /* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L */ + PAD_NC(GPP_F21, NONE), + /* H23 : SRCCLKREQ5# ==> WWAN_CLKREQ_ODL */ + PAD_NC(GPP_H23, NONE), + /* GPD11 : LANPHYC ==> WWAN_CONFIG1 */ + PAD_NC(GPD11, NONE), +}; + static void enable_i2s(void) { gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads)); @@ -155,5 +178,10 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NAU8318_NAU88L25B_I2S))) gpio_configure_pads(nau8318_enable_pads, ARRAY_SIZE(nau8318_enable_pads)); } + + if (fw_config_probe(FW_CONFIG(DB_LTE, LTE_ABSENT))) { + printk(BIOS_INFO, "Disable LTE related GPIO pins.\n"); + gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); + } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/79122?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3f3bc2b536babf71cc484cce02f96f47707f729c Gerrit-Change-Number: 79122 Gerrit-PatchSet: 3 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[M] Change in coreboot[main]: mb/goog/brya/var/skolas: sync slolas overridetree with brya0
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79121?usp=email ) Change subject: mb/goog/brya/var/skolas: sync slolas overridetree with brya0 ...................................................................... mb/goog/brya/var/skolas: sync slolas overridetree with brya0 Skolas uses brya0 schematic, so override tree should be almost the same for brya0 and skolas. This change sync's the skolas overridetree.cb with brya0's overridetree.cb. BUG=b:311722825 BRANCH=firmware-brya-14505.B TEST=`emerge-brya coreboot chromeos-bootimage`, flash and boot skolas to kernel. Change-Id: I14a2ed803a8ffb8614018af587c66034fb724b38 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79121 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/skolas/overridetree.cb 1 file changed, 81 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/skolas/overridetree.cb b/src/mainboard/google/brya/variants/skolas/overridetree.cb index 388ea4f..bb6d1ea 100644 --- a/src/mainboard/google/brya/variants/skolas/overridetree.cb +++ b/src/mainboard/google/brya/variants/skolas/overridetree.cb @@ -132,7 +132,7 @@ # TCP1 (DP-2) for port C1 register "device[3].name" = ""DD03"" register "device[3].use_pld" = "true" - register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" # TCP2 (DP-3) for port C2 register "device[4].name" = ""DD04"" register "device[4].use_pld" = "true" @@ -548,7 +548,9 @@ register "link_freq[1]" = "180 * MHz" # 180 MHz register "remote_name" = ""IPU0"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" register "has_power_resource" = "1" + #Controls register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ" @@ -582,9 +584,23 @@ register "chip_name" = ""DW9768 VCM"" register "device_type" = "INTEL_ACPI_CAMERA_VCM" - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" register "vcm_compat" = ""dongwoon,dw9768"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0" + + register "has_power_resource" = "1" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + device i2c 0C on probe WFC WFC_MIPI_OVTI8856 end @@ -595,7 +611,6 @@ register "chip_name" = ""AT24 EEPROM"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" register "nvm_compat" = ""atmel,24c1024"" register "nvm_size" = "0x2800" @@ -603,6 +618,21 @@ register "nvm_readonly" = "0x01" register "nvm_width" = "0x10" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0" + + register "has_power_resource" = "1" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + device i2c 58 on probe WFC WFC_MIPI_OVTI8856 end @@ -623,6 +653,8 @@ register "link_freq[1]" = "180 * MHz" # 180 MHz register "remote_name" = ""IPU0"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" + register "has_power_resource" = "1" #Controls register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" @@ -657,9 +689,23 @@ register "chip_name" = ""DW AF DAC"" register "device_type" = "INTEL_ACPI_CAMERA_VCM" - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" register "vcm_compat" = ""dongwoon,dw9714"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0" + + register "has_power_resource" = "1" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + device i2c 0C on probe WFC WFC_MIPI_KBAE350 end @@ -670,7 +716,6 @@ register "chip_name" = ""GT24C08"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" register "nvm_compat" = ""atmel,24c08"" register "nvm_size" = "0x2000" @@ -678,6 +723,21 @@ register "nvm_readonly" = "0x01" register "nvm_width" = "0x10" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0" + + register "has_power_resource" = "1" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + device i2c 50 on probe WFC WFC_MIPI_KBAE350 end @@ -800,6 +860,7 @@ register "link_freq[0]" = "384 * MHz" # 384 MHz register "link_freq[1]" = "96 * MHz" # 96 MHz register "remote_name" = ""IPU0"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" register "has_power_resource" = "1" #Controls @@ -834,7 +895,6 @@ register "chip_name" = ""GT24C16S"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM1.PRIC"" register "nvm_compat" = ""atmel,24c1024"" register "nvm_size" = "0x800" @@ -842,6 +902,21 @@ register "nvm_readonly" = "0x01" register "nvm_width" = "0x08" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D0" + + register "has_power_resource" = "1" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_C3" #PP3300_FCAM_X + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 0)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + device i2c 50 on probe UFC UFC_MIPI_IMX208 end -- To view, visit https://review.coreboot.org/c/coreboot/+/79121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14a2ed803a8ffb8614018af587c66034fb724b38 Gerrit-Change-Number: 79121 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[XS] Change in coreboot[main]: sbom/Makefile.inc: Change GOPATH
by Felix Held (Code Review) 20 Nov '23

20 Nov '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/77780?usp=email ) Change subject: sbom/Makefile.inc: Change GOPATH ...................................................................... sbom/Makefile.inc: Change GOPATH This changes the path where go installs its packages. Now the packages are not installed in the users home directory anymore. This solution is not perfect though, since offline build are still not possible, because go will fetch the packages at build time. -modcacherw will create the go files with rw permissions, otherwise coreboot is not able to delete the files afterwards (make distclean). Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I2a35369628454057ea4758cd1225e57f07cb71c8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77780 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M src/sbom/Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Martin L Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/sbom/Makefile.inc b/src/sbom/Makefile.inc index 21e2fa4..7783f09 100644 --- a/src/sbom/Makefile.inc +++ b/src/sbom/Makefile.inc @@ -99,7 +99,7 @@ $(build-dir)/goswid: | $(build-dir) echo " SBOM building goswid tool" cd util/goswid; \ - GO111MODULE=on go build -o $(abspath $@) ./cmd/goswid + GOPATH=$(abspath build/go) GO111MODULE=on go build -modcacherw -o $(abspath $@) ./cmd/goswid ## Generate all .json files -- To view, visit https://review.coreboot.org/c/coreboot/+/77780?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a35369628454057ea4758cd1225e57f07cb71c8 Gerrit-Change-Number: 77780 Gerrit-PatchSet: 4 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

1 0

[XL] Change in coreboot[main]: util: add smmstoretool for editing SMMSTORE
by Sergii Dmytruk (Code Review) 20 Nov '23

20 Nov '23

Attention is currently required from: Michał Kopeć, Michał Żygowski. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79080?usp=email ) Change subject: util: add smmstoretool for editing SMMSTORE ...................................................................... Patch Set 4: (2 comments) File util/smmstoretool/guids.c: https://review.coreboot.org/c/coreboot/+/79080/comment/195dcc0b_8b9d2f6f : PS4, Line 53: return strdup(known_guids->alias); > Typo? This should be `known_guid->alias`, otherwise the `coreboot` guid is always returned here Definitely, thank you. Updated these functions before uploading and introduced bugs. https://review.coreboot.org/c/coreboot/+/79080/comment/5c3260df_fe7e43af : PS4, Line 73: *guid = known_guids->guid; > As above, I think this should be `known_guid->alias` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1c06f1d0c39c13b5be76a3070f09b715aca6e0 Gerrit-Change-Number: 79080 Gerrit-PatchSet: 4 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Comment-Date: Mon, 20 Nov 2023 14:10:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: comment

1 0

[XL] Change in coreboot[main]: util: add smmstoretool for editing SMMSTORE
by Sergii Dmytruk (Code Review) 20 Nov '23

20 Nov '23

Attention is currently required from: Michał Żygowski, Sergii Dmytruk. Hello Michał Kopeć, Michał Żygowski, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79080?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: util: add smmstoretool for editing SMMSTORE ...................................................................... util: add smmstoretool for editing SMMSTORE Offline SMMSTORE variable modification tool. Can be used to pre-configure ROM image or debug EFI state stored in a dump. Change-Id: I6c1c06f1d0c39c13b5be76a3070f09b715aca6e0 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M Documentation/util.md A Documentation/util/smmstoretool/index.md M util/README.md A util/smmstoretool/.gitignore A util/smmstoretool/Makefile A util/smmstoretool/data.c A util/smmstoretool/data.h A util/smmstoretool/description.md A util/smmstoretool/fv.c A util/smmstoretool/fv.h A util/smmstoretool/guids.c A util/smmstoretool/guids.h A util/smmstoretool/main.c A util/smmstoretool/storage.c A util/smmstoretool/storage.h A util/smmstoretool/utils.c A util/smmstoretool/utils.h A util/smmstoretool/vs.c A util/smmstoretool/vs.h M util/util_readme/post_util.md 20 files changed, 1,621 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/79080/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/79080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1c06f1d0c39c13b5be76a3070f09b715aca6e0 Gerrit-Change-Number: 79080 Gerrit-PatchSet: 5 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[main]: google/*: Clean up Kconfg board selection for Google MTK boards
by Yidi Lin (Code Review) 20 Nov '23

20 Nov '23

Attention is currently required from: Felix Singer, Hung-Te Lin, Julius Werner, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79063?usp=email ) Change subject: google/*: Clean up Kconfg board selection for Google MTK boards ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/corsola/Kconfig: https://review.coreboot.org/c/coreboot/+/79063/comment/f16551d5_86ea6fae : PS1, Line 22: select DRIVER_ANALOGIX_ANX7625 if BOARD_GOOGLE_CHINCHOU > > Hmm... […] I prefer Yu-Ping's idea in the first comment. ``` config CORSOLA_HAS_MIPI_PANEL def_bool BOARD_GOOGLE_STARYU_COMMON config DRIVER_ANALOGIX_ANX7625 def_bool BOARD_GOOGLE_KINGLER_COMMON || BOARD_GOOGLE_CHINCHOU || ... depends on !CORSOLA_HAS_MIPI_PANEL config DRIVER_PARADE_PS8640 def_bool !DRIVER_ANALOGIX_ANX7625 || BOARD_GOOGLE_STEELIX depends on !CORSOLA_HAS_MIPI_PANEL ``` Make the MIPI/DP bridge driver options mutually exclusive by driver config, but make the expectations by board config. -- To view, visit https://review.coreboot.org/c/coreboot/+/79063?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40880e7609ba703d0053ad01da742871e54d4e7a Gerrit-Change-Number: 79063 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 20 Nov 2023 13:27:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2023