coreboot-gerrit April 2022

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Change in coreboot[master]: mb/google/guybrush: Remove elog_gsmi_cb_mainboard_log_wake_source
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63280 ) Change subject: mb/google/guybrush: Remove elog_gsmi_cb_mainboard_log_wake_source ...................................................................... mb/google/guybrush: Remove elog_gsmi_cb_mainboard_log_wake_source elog_gsmi_cb_mainboard_log_wake_source is called from SMI and causes eSPI transactions. If the SMI interrupts an ongoing eSPI transaction from the OS it will conflict and cause failures. Removing this call to avoid conflicts. This can be re-enabled after refactoring google_chromeec_get_mask to use ACPI MMIO. BUG=b:227163985 BRANCH=gubyrush TEST=No 164 errors detected during suspend_stress_test /sys/firmware/log output after resume before change: SMI# #1 ELOG: Event(B0) added with size 9 at 2022-03-31 19:52:51 UTC GPIO Control Switch: 0xcf000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000 ELOG: Event(9F) added with size 14 at 2022-03-31 19:52:51 UTC Chrome EC: clear events_b mask to 0x0000000000000000 after change: SMI# #6 ELOG: Event(B0) added with size 9 at 2022-03-31 19:50:19 UTC GPIO Control Switch: 0xcf000000, Wake Stat 0: 0x00000000, Wake Stat 1: 0x00000000 ELOG: Event(9F) added with size 14 at 2022-03-31 19:50:19 UTC Change-Id: I3320e3fb8bd9e9e0db84332e1d147a0af25f7601 Signed-off-by: Rob Barnes <robbarnes(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63280 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/guybrush/smihandler.c 1 file changed, 0 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/smihandler.c b/src/mainboard/google/guybrush/smihandler.c index f67ff31..1adc1a2 100644 --- a/src/mainboard/google/guybrush/smihandler.c +++ b/src/mainboard/google/guybrush/smihandler.c @@ -31,8 +31,3 @@ return 0; } - -void elog_gsmi_cb_mainboard_log_wake_source(void) -{ - google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS); -} -- To view, visit https://review.coreboot.org/c/coreboot/+/63280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3320e3fb8bd9e9e0db84332e1d147a0af25f7601 Gerrit-Change-Number: 63280 Gerrit-PatchSet: 3 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/starlabs/laptop: Enable rtd3 for SSD on TGL
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63254 ) Change subject: mb/starlabs/laptop: Enable rtd3 for SSD on TGL ...................................................................... mb/starlabs/laptop: Enable rtd3 for SSD on TGL Enabling rtd3 reduces power consumption when the SSD is idle. Tested and verified on the StarBook Mk V (TGL), using PowerTop on Manjaro 21.2.5 GNOME at 20% Brightness. Signed-off-by: Stephen Edworthy <stephen(a)starlabs.systems> Change-Id: I0d8aa185a322bb8d1aba51ccaab03c521cec2770 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63254 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Sean Rhodes: Looks good to me, approved diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb index 66b8e86..6264257 100644 --- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb @@ -182,6 +182,12 @@ register "PcieClkSrcClkReq[3]" = "3" register "PcieRpSlotImplemented[8]" = "1" smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + register "srcclk_pin" = "3" + device generic 0 on end + end end device pci 1d.1 off end # PCI Express Port 10 device pci 1d.2 off end # PCI Express Port 11 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63254 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d8aa185a322bb8d1aba51ccaab03c521cec2770 Gerrit-Change-Number: 63254 Gerrit-PatchSet: 4 Gerrit-Owner: Stephen Edworthy <stephen(a)starlabs.org.uk> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stephen Edworthy <stephen(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/nereid: Add separate VBT for HDMI
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63239 ) Change subject: mb/google/brya/var/nereid: Add separate VBT for HDMI ...................................................................... mb/google/brya/var/nereid: Add separate VBT for HDMI BUG=b:226848617 TEST=HDMI works on nereid Cq-Depend: chrome-internal:4650256 Signed-off-by: Reka Norman <rekanorman(a)google.com> Change-Id: I6a90d3d86b32f73ec0130e582539d1c5b045da62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63239 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> --- M src/mainboard/google/brya/variants/nereid/Makefile.inc A src/mainboard/google/brya/variants/nereid/variant.c 2 files changed, 13 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/nereid/Makefile.inc b/src/mainboard/google/brya/variants/nereid/Makefile.inc index defb592..2e8157e 100644 --- a/src/mainboard/google/brya/variants/nereid/Makefile.inc +++ b/src/mainboard/google/brya/variants/nereid/Makefile.inc @@ -5,3 +5,4 @@ romstage-y += memory.c ramstage-y += gpio.c +ramstage-y += variant.c diff --git a/src/mainboard/google/brya/variants/nereid/variant.c b/src/mainboard/google/brya/variants/nereid/variant.c new file mode 100644 index 0000000..967fc9a --- /dev/null +++ b/src/mainboard/google/brya/variants/nereid/variant.c @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <drivers/intel/gma/opregion.h> +#include <fw_config.h> + +const char *mainboard_vbt_filename(void) +{ + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_HDMI))) + return "vbt-nereid_hdmi.bin"; + + return "vbt.bin"; +} 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63239 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a90d3d86b32f73ec0130e582539d1c5b045da62 Gerrit-Change-Number: 63239 Gerrit-PatchSet: 4 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/nereid: Disable C1 PMC mux conn for HDMI
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63238 ) Change subject: mb/google/brya/var/nereid: Disable C1 PMC mux conn for HDMI ...................................................................... mb/google/brya/var/nereid: Disable C1 PMC mux conn for HDMI BUG=b:226848617 TEST=HDMI works on nereid Signed-off-by: Reka Norman <rekanorman(a)google.com> Change-Id: I039c30f95d959dba489b24b6938d08da937c5e03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63238 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> --- M src/mainboard/google/brya/variants/nereid/overridetree.cb 1 file changed, 3 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/nereid/overridetree.cb b/src/mainboard/google/brya/variants/nereid/overridetree.cb index 806c74d..71987ff 100644 --- a/src/mainboard/google/brya/variants/nereid/overridetree.cb +++ b/src/mainboard/google/brya/variants/nereid/overridetree.cb @@ -103,7 +103,9 @@ chip drivers/intel/pmc_mux/conn use usb2_port2 as usb2_port use tcss_usb3_port2 as usb3_port - device generic 1 alias conn1 on end + device generic 1 alias conn1 on + probe DB_USB DB_1C_1A + end end end end 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63238 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I039c30f95d959dba489b24b6938d08da937c5e03 Gerrit-Change-Number: 63238 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common/tcss: Check conn device enabled in tcss_get_port_info
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63237 ) Change subject: soc/intel/common/tcss: Check conn device enabled in tcss_get_port_info ...................................................................... soc/intel/common/tcss: Check conn device enabled in tcss_get_port_info BUG=b:226848617 TEST=With the following change, the nereid C1 PMC mux conn is disabled based on fw_config, allowing HDMI to work. Signed-off-by: Reka Norman <rekanorman(a)google.com> Change-Id: I487f3ca4be4ead0c5dfb46e9eb19de5ae9b9bda9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63237 Reviewed-by: Kangheui Won <khwon(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/common/block/tcss/tcss.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Kangheui Won: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c index 2531ac3..e0ca90d 100644 --- a/src/soc/intel/common/block/tcss/tcss.c +++ b/src/soc/intel/common/block/tcss/tcss.c @@ -394,7 +394,7 @@ ARRAY_SIZE(conn_path)); unsigned int usb2_port, usb3_port; - if (!conn) + if (!is_dev_enabled(conn)) continue; if (CONFIG(DRIVERS_INTEL_PMC) && -- To view, visit https://review.coreboot.org/c/coreboot/+/63237 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I487f3ca4be4ead0c5dfb46e9eb19de5ae9b9bda9 Gerrit-Change-Number: 63237 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/starlabs/labtop: Add CMOS defaults for EC functions
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62792 ) Change subject: mb/starlabs/labtop: Add CMOS defaults for EC functions ...................................................................... mb/starlabs/labtop: Add CMOS defaults for EC functions Set the CMOS defaults for EC related functions: * Function Lock = Enabled * Trackpad = Enabled * Keyboard Backlight Brightness = Off * Keyboard Backlight State = Enabled Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I528c30893d2af87584a09f23b982b5f36b37a873 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62792 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/starlabs/labtop/cmos.default 1 file changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/mainboard/starlabs/labtop/cmos.default b/src/mainboard/starlabs/labtop/cmos.default index 589189f..0b83cb7 100644 --- a/src/mainboard/starlabs/labtop/cmos.default +++ b/src/mainboard/starlabs/labtop/cmos.default @@ -20,3 +20,8 @@ fn_ctrl_swap=Disable # southbridge power_on_after_fail=Disable +# Functions +fn_lock_state=0x1 +trackpad_state=0x1 +kbl_brightness=0x0 +kbl_state=0x1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I528c30893d2af87584a09f23b982b5f36b37a873 Gerrit-Change-Number: 62792 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: device/i2c_bus: Constify i2c_busdev and i2c_link
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63208 ) Change subject: device/i2c_bus: Constify i2c_busdev and i2c_link ...................................................................... device/i2c_bus: Constify i2c_busdev and i2c_link Change-Id: If795087ecdaea24ad7834dcc6d5bf6a72f2aea8f Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63208 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/device/i2c_bus.c M src/include/device/i2c_bus.h 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/device/i2c_bus.c b/src/device/i2c_bus.c index 597a530..a63086c 100644 --- a/src/device/i2c_bus.c +++ b/src/device/i2c_bus.c @@ -6,7 +6,7 @@ #include <device/i2c_bus.h> #include <commonlib/endian.h> -struct bus *i2c_link(struct device *const dev) +struct bus *i2c_link(const struct device *const dev) { if (!dev || !dev->bus) return NULL; diff --git a/src/include/device/i2c_bus.h b/src/include/device/i2c_bus.h index b5e7710..42f461d 100644 --- a/src/include/device/i2c_bus.h +++ b/src/include/device/i2c_bus.h @@ -21,14 +21,14 @@ * `->dev->ops->ops_i2c_bus` or `->dev->ops->ops_smbus_bus` are * not NULL. */ -struct bus *i2c_link(struct device *); +struct bus *i2c_link(const struct device *dev); /* * Shorthand for `i2c_link(dev)->dev`. * * Returns NULL if i2c_link(dev) returns NULL. */ -static inline DEVTREE_CONST struct device *i2c_busdev(struct device *dev) +static inline DEVTREE_CONST struct device *i2c_busdev(const struct device *dev) { struct bus *const link = i2c_link(dev); return link ? link->dev : NULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/63208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If795087ecdaea24ad7834dcc6d5bf6a72f2aea8f Gerrit-Change-Number: 63208 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/skyrim/var/skyrim: Add ELAN trackpad config
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63236 ) Change subject: mb/google/skyrim/var/skyrim: Add ELAN trackpad config ...................................................................... mb/google/skyrim/var/skyrim: Add ELAN trackpad config Add support for ELAN trackpad on I2C0 bus. BUG=None TEST=Build and boot to OS in Skyrim. Perform evtest on Elan trackpad. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: Ia1522af3f35ef131dda74c4aabecc4fa532dfbec Reviewed-on: https://review.coreboot.org/c/coreboot/+/63236 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 1 file changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 54373c4..0b965eb5 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -56,4 +56,14 @@ .early_init = true, }" + device ref i2c_0 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)" + register "wake" = "GEVENT_20" + register "probed" = "1" + device i2c 15 on end + end + end # I2C0 end # chip soc/amd/sabrina 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63236 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1522af3f35ef131dda74c4aabecc4fa532dfbec Gerrit-Change-Number: 63236 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: arch/x86/postcar: Use a separate stack for C execution
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54298 ) Change subject: arch/x86/postcar: Use a separate stack for C execution ...................................................................... arch/x86/postcar: Use a separate stack for C execution Add a stack in .bss for C execution. This will make it easier to move the setup of MTRRs in C code. Change-Id: I67cbc988051036b1a0519cec9ed614acede31fd7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54298 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/arch/x86/exit_car.S M src/drivers/intel/fsp1_1/exit_car.S M src/soc/intel/common/block/cpu/car/exit_car_fsp.S 3 files changed, 16 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Subrata Banik: Looks good to me, but someone else must approve diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S index 9b89ffb..d3954d3 100644 --- a/src/arch/x86/exit_car.S +++ b/src/arch/x86/exit_car.S @@ -35,6 +35,18 @@ .endm #endif +/* Place the stack in the bss section. It's not necessary to define it in the + * the linker script. */ + .section .bss, "aw", @nobits +.global _stack +.global _estack +.global _stack_size + +_stack: +.space CONFIG_STACK_SIZE +_estack: +.set _stack_size, _estack - _stack + .text .global _start _start: @@ -174,8 +186,10 @@ wrmsr #endif /* CONFIG_SOC_SETS_MSRS */ + movl $_estack, %esp /* Align stack to 16 bytes at call instruction. */ andl $0xfffffff0, %esp + /* Call into main for postcar. */ call main /* Should never return. */ diff --git a/src/drivers/intel/fsp1_1/exit_car.S b/src/drivers/intel/fsp1_1/exit_car.S index dbdd3e6..2671de5 100644 --- a/src/drivers/intel/fsp1_1/exit_car.S +++ b/src/drivers/intel/fsp1_1/exit_car.S @@ -7,7 +7,7 @@ pop %ebx /* Move the stack pointer to real RAM */ - movl post_car_stack_top, %esp + movl _estack, %esp /* Align the stack 16 bytes */ andl $0xfffffff0, %esp diff --git a/src/soc/intel/common/block/cpu/car/exit_car_fsp.S b/src/soc/intel/common/block/cpu/car/exit_car_fsp.S index 4b90628..4d35447 100644 --- a/src/soc/intel/common/block/cpu/car/exit_car_fsp.S +++ b/src/soc/intel/common/block/cpu/car/exit_car_fsp.S @@ -17,7 +17,7 @@ chipset_teardown_car: /* Set up new stack. */ - mov post_car_stack_top, %esp + mov _estack, %esp /* Align the stack. */ andl $0xfffffff0, %esp -- To view, visit https://review.coreboot.org/c/coreboot/+/54298 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I67cbc988051036b1a0519cec9ed614acede31fd7 Gerrit-Change-Number: 54298 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Huang Jin Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/amd/majolica/port_descriptors: clean up variable names
by Felix Held (Code Review) 01 Apr '22

01 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63261 ) Change subject: mb/amd/majolica/port_descriptors: clean up variable names ...................................................................... mb/amd/majolica/port_descriptors: clean up variable names Removing unnecessary "czn" in variable name. Majolica is always a cezanne. TEST=Timeless build Change-Id: I490111ecea84c934585d0bbd623486fba76eb7f1 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63261 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/amd/majolica/port_descriptors.c 1 file changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/mainboard/amd/majolica/port_descriptors.c b/src/mainboard/amd/majolica/port_descriptors.c index 4cbccf6..47c9d58 100644 --- a/src/mainboard/amd/majolica/port_descriptors.c +++ b/src/mainboard/amd/majolica/port_descriptors.c @@ -5,7 +5,7 @@ #include <types.h> #include <amdblocks/cpu.h> -static const fsp_dxio_descriptor majolica_czn_dxio_descriptors[] = { +static const fsp_dxio_descriptor majolica_dxio_descriptors[] = { { /* MXM */ .engine_type = PCIE_ENGINE, .port_present = true, @@ -93,7 +93,7 @@ } }; -static fsp_ddi_descriptor majolica_czn_ddi_descriptors[] = { +static fsp_ddi_descriptor majolica_ddi_descriptors[] = { { /* DDI0 - DP */ .connector_type = DDI_DP, .aux_index = DDI_AUX1, @@ -126,10 +126,10 @@ const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) { if ((get_cpu_count() == 4 && get_threads_per_core() == 2) || get_cpu_count() == 2) - majolica_czn_ddi_descriptors[1].connector_type = DDI_UNUSED_TYPE; + majolica_ddi_descriptors[1].connector_type = DDI_UNUSED_TYPE; - *dxio_descs = majolica_czn_dxio_descriptors; - *dxio_num = ARRAY_SIZE(majolica_czn_dxio_descriptors); - *ddi_descs = majolica_czn_ddi_descriptors; - *ddi_num = ARRAY_SIZE(majolica_czn_ddi_descriptors); + *dxio_descs = majolica_dxio_descriptors; + *dxio_num = ARRAY_SIZE(majolica_dxio_descriptors); + *ddi_descs = majolica_ddi_descriptors; + *ddi_num = ARRAY_SIZE(majolica_ddi_descriptors); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63261 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I490111ecea84c934585d0bbd623486fba76eb7f1 Gerrit-Change-Number: 63261 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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