coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

1 participants
5879 discussions

Change in coreboot[master]: src/mb/portwell/m107: Remove IGNORE_IASL_MISSING_DEPENDENCY
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63249 ) Change subject: src/mb/portwell/m107: Remove IGNORE_IASL_MISSING_DEPENDENCY ...................................................................... src/mb/portwell/m107: Remove IGNORE_IASL_MISSING_DEPENDENCY CB:63248 solves the missing dependency on _PRS The config IGNORE_IASL_MISSING_DEPENDENCY can be removed. BUG=N/A TEST=Build portwell M107 Change-Id: I2ed9fdd541ba9431e59364a42dd03f60b54b6720 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63249 Reviewed-by: Erik van den Bogaert <ebogaert(a)eltan.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/portwell/m107/Kconfig 1 file changed, 0 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Erik van den Bogaert: Looks good to me, but someone else must approve diff --git a/src/mainboard/portwell/m107/Kconfig b/src/mainboard/portwell/m107/Kconfig index 1c8e754..e2cd988 100644 --- a/src/mainboard/portwell/m107/Kconfig +++ b/src/mainboard/portwell/m107/Kconfig @@ -2,9 +2,6 @@ if BOARD_PORTWELL_M107 -config IGNORE_IASL_MISSING_DEPENDENCY - def_bool y - config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 -- To view, visit https://review.coreboot.org/c/coreboot/+/63249 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ed9fdd541ba9431e59364a42dd03f60b54b6720 Gerrit-Change-Number: 63249 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: src/mb/portwell/m107/acpi/superio.asl: Remove _PRS
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63248 ) Change subject: src/mb/portwell/m107/acpi/superio.asl: Remove _PRS ...................................................................... src/mb/portwell/m107/acpi/superio.asl: Remove _PRS IASL reports warning on missing _SRS. Device has fixed configuration which is always enabled. Remove _PRS for this fixed configuration. BUG=N/A TEST=build portwell m107 Change-Id: Idbc0a67136326c9231c168bfd8fadd2539da6745 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63248 Reviewed-by: Erik van den Bogaert <ebogaert(a)eltan.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/portwell/m107/acpi/superio.asl 1 file changed, 0 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Erik van den Bogaert: Looks good to me, but someone else must approve diff --git a/src/mainboard/portwell/m107/acpi/superio.asl b/src/mainboard/portwell/m107/acpi/superio.asl index fbb1c18..0cb2d98 100644 --- a/src/mainboard/portwell/m107/acpi/superio.asl +++ b/src/mainboard/portwell/m107/acpi/superio.asl @@ -15,14 +15,4 @@ FixedIO (0x6E, 0x02) IRQNoFlags () {4} }) - - Name (_PRS, ResourceTemplate () - { - StartDependentFn (0, 0) { - FixedIO (0x03F8, 0x08) - FixedIO (0x6E, 0x02) - IRQNoFlags () {4} - } - EndDependentFn () - }) } -- To view, visit https://review.coreboot.org/c/coreboot/+/63248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idbc0a67136326c9231c168bfd8fadd2539da6745 Gerrit-Change-Number: 63248 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: crossgcc: Upgrade IASL from 20211217 to 20220331
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63279 ) Change subject: crossgcc: Upgrade IASL from 20211217 to 20220331 ...................................................................... crossgcc: Upgrade IASL from 20211217 to 20220331 "REDUNDANT_OFFSET_REMARK" to ignore redundant offset remarks is not needed any more as it’s included upstream. Changes: https://acpica.org/node/199 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: Ice7f9a10051f7f62c53098161fd2f498d724c17d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63279 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M Makefile.inc M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix2-20220331_iasl.patch D util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum A util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum 5 files changed, 2 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index ab81682e..f746ef9 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -261,9 +261,6 @@ # ResourceTemplate is the correct code. # As it's valid ASL, disable the warning. EMPTY_RESOURCE_TEMPLATE_WARNING = 3150 -# Redundant offset remarks are not useful in any way and are masking useful -# ones that might indicate an issue so it is better to hide them. -REDUNDANT_OFFSET_REMARK = 2158 # IASL compiler check for usage of _CRS, _DIS, _PRS, and _SRS objects: # 1) If _PRS is present, must have _CRS and _SRS # 2) If _SRS is present, must have _PRS (_PRS requires _CRS and _SRS) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 5f7d777..b25b260 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -37,7 +37,7 @@ MPC_VERSION=1.2.1 GCC_VERSION=11.2.0 BINUTILS_VERSION=2.37 -IASL_VERSION=20211217 +IASL_VERSION=20220331 # CLANG version number CLANG_VERSION=13.0.1 CMAKE_VERSION=3.23.0 diff --git a/util/crossgcc/patches/acpica-unix2-20211217_iasl.patch b/util/crossgcc/patches/acpica-unix2-20220331_iasl.patch similarity index 100% rename from util/crossgcc/patches/acpica-unix2-20211217_iasl.patch rename to util/crossgcc/patches/acpica-unix2-20220331_iasl.patch diff --git a/util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum deleted file mode 100644 index dd961e0..0000000 --- a/util/crossgcc/sum/acpica-unix2-20211217.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -4337413d206a169a47d706fa2e5bdc9bc0855c04 tarballs/acpica-unix2-20211217.tar.gz diff --git a/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum new file mode 100644 index 0000000..7ad2b68 --- /dev/null +++ b/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum @@ -0,0 +1 @@ +bf8a86addc7fbfa819f1ed2897a0890c42cdcf62 tarballs/acpica-unix2-20220331.tar.gz 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/63279 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice7f9a10051f7f62c53098161fd2f498d724c17d Gerrit-Change-Number: 63279 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: crossgcc: Upgrade CMake from 3.22.2 to 3.23.0
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63246 ) Change subject: crossgcc: Upgrade CMake from 3.22.2 to 3.23.0 ...................................................................... crossgcc: Upgrade CMake from 3.22.2 to 3.23.0 Release Notes: https://cmake.org/cmake/help/v3.23/release/3.23.html Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: Ib31124baa3cae65211ad361a7d41c9504105be91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63246 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M util/crossgcc/buildgcc D util/crossgcc/sum/cmake-3.22.2.tar.gz.cksum A util/crossgcc/sum/cmake-3.23.0.tar.gz.cksum 3 files changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, approved diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 6b7558f..5f7d777 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -40,7 +40,7 @@ IASL_VERSION=20211217 # CLANG version number CLANG_VERSION=13.0.1 -CMAKE_VERSION=3.22.2 +CMAKE_VERSION=3.23.0 NASM_VERSION=2.15.05 # GCC toolchain archive locations diff --git a/util/crossgcc/sum/cmake-3.22.2.tar.gz.cksum b/util/crossgcc/sum/cmake-3.22.2.tar.gz.cksum deleted file mode 100644 index c72aef2..0000000 --- a/util/crossgcc/sum/cmake-3.22.2.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -672ec927c218a3f4ece5929d7b225fce6bc38187 tarballs/cmake-3.22.2.tar.gz diff --git a/util/crossgcc/sum/cmake-3.23.0.tar.gz.cksum b/util/crossgcc/sum/cmake-3.23.0.tar.gz.cksum new file mode 100644 index 0000000..0311f49 --- /dev/null +++ b/util/crossgcc/sum/cmake-3.23.0.tar.gz.cksum @@ -0,0 +1 @@ +9df212e476175ed70aa4bac3ac0ba27b0021a554 tarballs/cmake-3.23.0.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/63246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib31124baa3cae65211ad361a7d41c9504105be91 Gerrit-Change-Number: 63246 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz
by Felix Held (Code Review) 04 Apr '22

04 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63241 ) Change subject: mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz ...................................................................... mb/google/brya/var/vell: Tune I2C1/I2C7 bus speed for 1 MHz Tune I2C parameters to make sure I2C1 and I2C7 bus speed is around 1MHz. BUG=b:207333035 BRANCH=none TEST=built and verified adjusted I2C speed around 1MHz Change-Id: I09a9edf723bb1198bbf5d71248abc07276cd94ff Signed-off-by: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63241 Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/vell/overridetree.cb 1 file changed, 20 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Eddy Lu: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 6ffffcf..b12a00d 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -36,6 +36,15 @@ #| I2C5 | Trackpad | #+-------------------+---------------------------+ register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST_PLUS, + .speed_config[0] = { + .speed = I2C_SPEED_FAST_PLUS, + .scl_lcnt = 45, + .scl_hcnt = 33, + .sda_hold = 20, + }, + }, .i2c[1] = { .early_init = 1, .speed = I2C_SPEED_FAST, @@ -48,6 +57,15 @@ .fall_time_ns = 400, .data_hold_time_ns = 50, }, + .i2c[7] = { + .speed = I2C_SPEED_FAST_PLUS, + .speed_config[0] = { + .speed = I2C_SPEED_FAST_PLUS, + .scl_lcnt = 45, + .scl_hcnt = 30, + .sda_hold = 20, + }, + }, }" register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" @@ -61,6 +79,7 @@ [PchSerialIoIndexI2C3] = PchSerialIoPci, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexI2C7] = PchSerialIoPci, }" device domain 0 on device ref igpu on @@ -334,6 +353,7 @@ device i2c 15 on end end end + device ref i2c7 on end device ref gspi1 on chip drivers/spi/acpi register "name" = ""CRFP"" -- To view, visit https://review.coreboot.org/c/coreboot/+/63241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09a9edf723bb1198bbf5d71248abc07276cd94ff Gerrit-Change-Number: 63241 Gerrit-PatchSet: 3 Gerrit-Owner: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-Reviewer: Eddy Lu <eddylu(a)ami.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-CC: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: ehl/fsp_params.c: setting for intel speed step from device tree
by Uwe Poeche (Code Review) 04 Apr '22

04 Apr '22

Uwe Poeche has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63352 ) Change subject: ehl/fsp_params.c: setting for intel speed step from device tree ...................................................................... ehl/fsp_params.c: setting for intel speed step from device tree This patch provides the set value for intel speed step in device tree for fsps. Before that in case of not set value in device tree the default value of disabled was overwritten by default enabled of fsp. Test: /mainboard/siemens/mc_ehl/variants/mc_ehl1 Check status of Bit 16 in MSR 0x1a0 after boot. Change-Id: I0a5ef4968a27978116c21ce35b3818c6b36e086f Signed-off-by: Uwe Poeche <uwe.poeche(a)siemens.com> --- M src/soc/intel/elkhartlake/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/63352/1 diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 1584c6a..663ed46 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -264,6 +264,9 @@ params->DdiPortCHpd = config->DdiPortCHpd; params->DdiPortCDdc = config->DdiPortCDdc; + /* setting for intel speed step from device tree */ + params->Eist = config->eist_enable; + /* Use coreboot MP PPI services if Kconfig is enabled */ if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data(); -- To view, visit https://review.coreboot.org/c/coreboot/+/63352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a5ef4968a27978116c21ce35b3818c6b36e086f Gerrit-Change-Number: 63352 Gerrit-PatchSet: 1 Gerrit-Owner: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: payloads/external/LinuxBoot: Modify Kconfig file and remove olders ve...
by Name of user not set (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Martin Roth, Christian Walter, Stefan Reinauer. Hello Martin Roth, Stefan Reinauer, Christian Walter, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63351 to look at the new patch set (#2). Change subject: payloads/external/LinuxBoot: Modify Kconfig file and remove olders versions ...................................................................... payloads/external/LinuxBoot: Modify Kconfig file and remove olders versions The U-Root repo have modified the name of "master" branch to "main" branch this patch remove olders versions of u-root and use the new versions Change-Id: I70c4d064b534b28ea0be987b91a30650debc6ffe Signed-off-by: RatatouilleDummie <ratatouillemorde(a)gmail.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/targets/u-root.mk M payloads/external/Makefile.inc 3 files changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/63351/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63351 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70c4d064b534b28ea0be987b91a30650debc6ffe Gerrit-Change-Number: 63351 Gerrit-PatchSet: 2 Gerrit-Owner: Name of user not set #1004172 Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: payloads/external/LinuxBoot: Modify Kconfig file and remove olders ve...
by Name of user not set (Code Review) 04 Apr '22

04 Apr '22

Name of user not set #1004172 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63351 ) Change subject: payloads/external/LinuxBoot: Modify Kconfig file and remove olders versions ...................................................................... payloads/external/LinuxBoot: Modify Kconfig file and remove olders versions The U-ROOT repo have modified the name of "master" branch to "main" branch this patch remove olders versions of u-root and use the new versions Change-Id: I70c4d064b534b28ea0be987b91a30650debc6ffe Signed-off-by: RatatouilleDummie <ratatouillemorde(a)gmail.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/targets/u-root.mk M payloads/external/Makefile.inc 3 files changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/63351/1 diff --git a/payloads/external/LinuxBoot/Kconfig b/payloads/external/LinuxBoot/Kconfig index a1e4e1f..1aa66068 100644 --- a/payloads/external/LinuxBoot/Kconfig +++ b/payloads/external/LinuxBoot/Kconfig @@ -177,26 +177,26 @@ choice prompt "U-root version" - default LINUXBOOT_UROOT_MASTER + default LINUXBOOT_UROOT_MAIN config LINUXBOOT_UROOT_CUSTOM bool "custom" help choose a custom u-root branch -config LINUXBOOT_UROOT_MASTER - bool "master" +config LINUXBOOT_UROOT_MAIN + bool "main" help Latest u-root version -config LINUXBOOT_UROOT_V3_0_0 - bool "v3.0.0" +config LINUXBOOT_UROOT_V7_0_0 + bool "v7.0.0" -config LINUXBOOT_UROOT_V2_0_0 - bool "v2.0.0" +config LINUXBOOT_UROOT_V6_0_0 + bool "v6.0.0" -config LINUXBOOT_UROOT_V1_0_0 - bool "v1.0.0" +config LINUXBOOT_UROOT_V5_0_0 + bool "v5.0.0" endchoice @@ -207,10 +207,10 @@ config LINUXBOOT_UROOT_VERSION string default LINUXBOOT_UROOT_CHECKOUT if LINUXBOOT_UROOT_CUSTOM - default "master" if LINUXBOOT_UROOT_MASTER - default "v3.0.0" if LINUXBOOT_UROOT_V3_0_0 - default "v2.0.0" if LINUXBOOT_UROOT_V2_0_0 - default "v1.0.0" if LINUXBOOT_UROOT_V1_0_0 + default "main" if LINUXBOOT_UROOT_MAIN + default "v7.0.0" if LINUXBOOT_UROOT_V7_0_0 + default "v6.0.0" if LINUXBOOT_UROOT_V6_0_0 + default "v5.0.0" if LINUXBOOT_UROOT_V5_0_0 choice prompt "Build format" diff --git a/payloads/external/LinuxBoot/targets/u-root.mk b/payloads/external/LinuxBoot/targets/u-root.mk index 0cf91fe..1fdd539 100644 --- a/payloads/external/LinuxBoot/targets/u-root.mk +++ b/payloads/external/LinuxBoot/targets/u-root.mk @@ -5,7 +5,7 @@ uroot_bin=$(project_dir)/u-root uroot_package=github.com/u-root/u-root -ARCH-$(CONFIG_LIBUXBOOT_X86_64)=amd64 +ARCH-$(CONFIG_LINUXBOOT_X86_64)=amd64 ARCH-$(CONFIG_LINUXBOOT_X86)=i386 ARCH-$(CONFIG_LINUXBOOT_ARM64)=arm64 @@ -39,7 +39,7 @@ get: version if [ -d "$(go_path_dir)/src/$(uroot_package)" ]; then \ - git -C $(go_path_dir)/src/$(uroot_package) checkout --quiet master; \ + git -C $(go_path_dir)/src/$(uroot_package) checkout --quiet main; \ GOPATH=$(go_path_dir) go get -d -u -v $(uroot_package) || \ echo -e "\n<<u-root package update failed>>\n"; \ else \ diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc index e805a07..948bc6a 100644 --- a/payloads/external/Makefile.inc +++ b/payloads/external/Makefile.inc @@ -208,7 +208,7 @@ payloads/external/U-Boot/build/u-boot.bin u-boot: $(DOTCONFIG) $(MAKE) -C payloads/external/U-Boot \ STABLE_COMMIT_ID=$(CONFIG_UBOOT_STABLE_COMMIT_ID) \ - CONFIG_UBOOT_MASTER=$(CONFIG_UBOOT_MASTER) \ + CONFIG_UBOOT_MAIN=$(CONFIG_UBOOT_MAIN) \ CONFIG_UBOOT_STABLE=$(CONFIG_UBOOT_STABLE) # TINT -- To view, visit https://review.coreboot.org/c/coreboot/+/63351 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70c4d064b534b28ea0be987b91a30650debc6ffe Gerrit-Change-Number: 63351 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1004172 Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: libpayload: Export PCIe config info from coreboot to libpayload
by Prasad Malisetty (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Ravi Kumar Bokka, mturney mturney, Arthur Heymans, Furquan Shaikh, Kyösti Mälkki, Yu-Ping Wu. Prasad Malisetty has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57614 ) Change subject: libpayload: Export PCIe config info from coreboot to libpayload ...................................................................... Patch Set 42: (4 comments) File payloads/libpayload/include/sysinfo.h: https://review.coreboot.org/c/coreboot/+/57614/comment/d36c618f_fe99ee3c PS40, Line 148: uintptr_t pci_config_info; > Move this right below mem_chip_base? Thanks for reviewing the changes and comments. Sure, I will update in next patch version. Thanks -Prasad File src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h: https://review.coreboot.org/c/coreboot/+/57614/comment/37fc3a42_4dbf61e0 PS40, Line 83: PCIE > PCI_INFO Agree, I will modify in next patch version. File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/57614/comment/a71d05ef_875f8890 PS28, Line 505: | > use a logical or, not a bitwise one. Hi Arthur, Thanks for the review. Missed to add logical OR. I will update it next patch version. Thanks -Prasad File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/57614/comment/a3c83576_1f411aff PS40, Line 100: cbmem_add > This should be done somewhere else in the pcie code, as the cbmem entry itself is unrelated to the c […] As of now we are not using common code. In coming release we are adding new changes to make use of common pcie code. I will try to accommodate this function in common pcie code. I will update in next patch version. Thanks -Prasad -- To view, visit https://review.coreboot.org/c/coreboot/+/57614 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ca2be55b98c8d1b86576072078cdda02ac55940 Gerrit-Change-Number: 57614 Gerrit-PatchSet: 42 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 04 Apr 2022 12:12:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: Makefile.inc: Add fmap_config.h as a dependency to cbfs-struct genera...
by Arthur Heymans (Code Review) 04 Apr '22

04 Apr '22

Attention is currently required from: Martin Roth. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63350 ) Change subject: Makefile.inc: Add fmap_config.h as a dependency to cbfs-struct generation ...................................................................... Makefile.inc: Add fmap_config.h as a dependency to cbfs-struct generation There is no easy way to add dependencies to cbfs-structs objects and fmap_config.h is a generated file. Follow-up commits depend on it being available so add it in the cbfs-struct makefile function. Change-Id: I7067ff144d38c1ff058825819419b2a2e7801e17 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/63350/1 diff --git a/Makefile.inc b/Makefile.inc index 929c236..f768984 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -340,7 +340,7 @@ # arg1: C source file # arg2: binary file cbfs-files-processor-struct= \ - $(eval $(2): $(1) $(obj)/build.h $(KCONFIG_AUTOHEADER); \ + $(eval $(2): $(1) $(obj)/build.h $(obj)/fmap_config.h $(KCONFIG_AUTOHEADER); \ printf " CC+STRIP $(1)\n"; \ $(CC_ramstage) -MMD $(CPPFLAGS_ramstage) $(CFLAGS_ramstage) --param asan-globals=0 $$(ramstage-c-ccopts) -include $(KCONFIG_AUTOHEADER) -MT $(2) -o $(2).tmp -c $(1) && \ $(OBJCOPY_ramstage) -O binary --set-section-flags .bss*=alloc,contents,load $(2).tmp $(2); \ -- To view, visit https://review.coreboot.org/c/coreboot/+/63350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7067ff144d38c1ff058825819419b2a2e7801e17 Gerrit-Change-Number: 63350 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2022