coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock
by Angel Pons (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Frans Hendriks. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63446 ) Change subject: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Gerrit-Change-Number: 63446 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 10:27:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock
by Erik van den Bogaert (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Frans Hendriks, Angel Pons. Erik van den Bogaert has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63446 ) Change subject: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Gerrit-Change-Number: 63446 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 10:05:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Add support for Alder Lake macro generation
by Maxim Polyakov (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć, Angel Pons. Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63403 ) Change subject: util/intelp2m: Add support for Alder Lake macro generation ...................................................................... Patch Set 3: (5 comments) File util/intelp2m/description.md: https://review.coreboot.org/c/coreboot/+/63403/comment/bd8a1738_027f8d8f PS1, Line 39: AlderLake-H > Upon second thought, this is correct. […] In order for intelp2m to work correctly for all variants of the Adler Lake family, it is necessary that GroupNameExtract and KeywordCheck return all possible pad's name suffixes of all these platforms. Please check this condition. All other details (function names, PCIe or USB, etc.) have to be contained in the inteltool dump and have to correspond to the template for the parser intelp2m/parser/template.go File util/intelp2m/gpio_adl_h.h: PS3: Unnecessary file File util/intelp2m/platforms/adl/macro.go: https://review.coreboot.org/c/coreboot/+/63403/comment/1053fa72_4237fe36 PS3, Line 99: macro := common.GetInstanceMacro(PlatformSpecific{InheritanceMacro : cnl.PlatformSpecific{}}, : fields.InterfaceGet()) macro := common.GetInstanceMacro( PlatformSpecific{ InheritanceMacro: cnl.PlatformSpecific{ InheritanceMacro: snr.PlatformSpecific{}, }, }, fields.InterfaceGet(), ) (Step 4) There is no constructor in the go structure as in C++, so we have to initialize all structures here. On the other side, we can see the basic platform, in this case it is snr File util/intelp2m/platforms/adl_h/macro.go: PS1: > I applied your suggestions, but it seems i've run into a new problem - looks like a problem with inh […] Sorry, I forgot that Platform Specific for cnl has to be initialized in the same way. See "Step 4" File util/intelp2m/platforms/adlh/macro.go: https://review.coreboot.org/c/coreboot/+/63403/comment/7b33b52f_2677e7ec PS2, Line 20: MAX_DW_NUM = common.MAX_DW_NUM > According to coreboot code, ADL GPIOs have 4 DW registers Are DW2 and DW3 values contained in the GPIO registers dump from inteltool for this platforms? If so, @Michał could you write here an example of what it looks like for several pads? -- To view, visit https://review.coreboot.org/c/coreboot/+/63403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Gerrit-Change-Number: 63403 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 10:04:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Michał Kopeć <michal.kopec(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock
by Frans Hendriks (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Erik van den Bogaert. Hello Erik van den Bogaert, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63446 to look at the new patch set (#2). Change subject: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock ...................................................................... src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock romstage uses FSP and SPD before these are verified. Verify the FSP and SPD binaries in bootblock and measure these in romstage. BUG=N/A TEST=Boot Facebook FBG1701 and check log for FSP and SPD verified in bootblock. Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/mainboard/facebook/fbg1701/board_verified_boot.c 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/63446/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Gerrit-Change-Number: 63446 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock
by Frans Hendriks (Code Review) 07 Apr '22

07 Apr '22

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63446 ) Change subject: src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock ...................................................................... src/mb/facebook/fbg1701: Verify FSP and SPD binaries in bootblock romstage uses FSP and SPD before these are verified. Verify the FSP and SPD binaries in bootblock and measure these in romstage. BUG=N/A TEST=Boot Facebook FBG1701 and check log file that for verifying FSP and SPD in bootblock. Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/mainboard/facebook/fbg1701/board_verified_boot.c 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/63446/1 diff --git a/src/mainboard/facebook/fbg1701/board_verified_boot.c b/src/mainboard/facebook/fbg1701/board_verified_boot.c index 5fbcf2c..8b644cb 100644 --- a/src/mainboard/facebook/fbg1701/board_verified_boot.c +++ b/src/mainboard/facebook/fbg1701/board_verified_boot.c @@ -2,7 +2,8 @@ #include "board_verified_boot.h" -/* The items verified by the bootblock, the bootblock will not measure the +/* + * The items verified by the bootblock, the bootblock will not measure the * items to the TPM */ const verify_item_t bootblock_verify_list[] = { @@ -10,6 +11,10 @@ HASH_IDX_ROM_STAGE, MBOOT_PCR_INDEX_0 }, { VERIFY_FILE, BOOTBLOCK, { { NULL, CBFS_TYPE_BOOTBLOCK } }, HASH_IDX_BOOTBLOCK, MBOOT_PCR_INDEX_0 }, + { VERIFY_FILE, FSP, { { NULL, CBFS_TYPE_FSP } }, HASH_IDX_FSP, + MBOOT_PCR_INDEX_1 }, + { VERIFY_FILE, "spd.bin", { { NULL, CBFS_TYPE_SPD } }, + HASH_IDX_SPD0, MBOOT_PCR_INDEX_1 }, #if CONFIG(VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST) { VERIFY_BLOCK, "PublicKey", { { (void *)CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_LOCATION, @@ -20,7 +25,7 @@ }; /* - * The items used by the romstage. Bootblock and PublicKey are added here to make sure they + * The items used by the romstage. Items verified by bootblock are added here to make sure they * are measured */ const verify_item_t romstage_verify_list[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/63446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I061affa5111fb14d69a8459575e0c72f71b1a1aa Gerrit-Change-Number: 63446 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter
by Angel Pons (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Nico Huber, Paul Menzel, Werner Zeh, Andrey Petrov. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62889 ) Change subject: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62889 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbc144fa809f6d4587f5223b235ee95579c48f7 Gerrit-Change-Number: 62889 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 09:55:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: WIP: tpm: Refactor Kconfig
by Werner Zeh (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Frans Hendriks, Jonathan Zhang, Tristan Corrick, Jeremy Soller, Nick Vaccaro, Angel Pons, Julius Werner, Arthur Heymans, Andrey Petrov, Piotr Król, Jes Klinke, Tim Crawford, Nico Huber, Sean Rhodes, Michał Żygowski, Maxim Polyakov, Johnny Lin, Christian Walter, Tim Wawrzynczak, Alexander Couzens, Tim Chu. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63424 ) Change subject: WIP: tpm: Refactor Kconfig ...................................................................... Patch Set 3: Code-Review+1 (3 comments) File src/drivers/i2c/tpm/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63424/comment/fccf9b07_59891627 PS3, Line 9: ifeq ($(CONFIG_TPM_ATMEL),y) : ramstage-y += tis_atmel.c : romstage-y += tis_atmel.c : verstage-y += tis_atmel.c : bootblock-y += tis_atmel.c : postcar-y += tis_atmel.c : elif ($(CONFIG_TPM_GOOGLE),y) : ramstage-y += cr50.c : romstage-y += cr50.c : verstage-y += cr50.c : bootblock-y += cr50.c : postcar-y += cr50.c : else : ramstage-y += tpm.c : romstage-y += tpm.c : verstage-y += tpm.c : bootblock-y += tpm.c : postcar-y += tpm.c : endif You could use the 'all-y' target here as you add the driver to every stage anyway. And once you are touching it it could be used for tis.c as well. File src/drivers/pc80/tpm/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63424/comment/1fbc1fcb_ac8077f6 PS3, Line 1: bootblock-$(CONFIG_LPC_TPM) += tis.c : verstage-$(CONFIG_LPC_TPM) += tis.c : romstage-$(CONFIG_LPC_TPM) += tis.c : ramstage-$(CONFIG_LPC_TPM) += tis.c : postcar-$(CONFIG_LPC_TPM) += tis.c all-$(CONFIG_LPC_TPM) += tis.c But could be done in a follow-up. File src/soc/intel/common/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63424/comment/e5baf8e0_8ed5f510 PS3, Line 23: bootblock-$(CONFIG_TPM_GOOGLE) += tpm_tis.c : verstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c : romstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c : ramstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c : postcar-$(CONFIG_TPM_GOOGLE) += tpm_tis.c all-$(CONFIG_TPM_GOOGLE) -- To view, visit https://review.coreboot.org/c/coreboot/+/63424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Gerrit-Change-Number: 63424 Gerrit-PatchSet: 3 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 09:25:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter
by Maxim Polyakov (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Nico Huber, Paul Menzel, Angel Pons, Werner Zeh, Andrey Petrov. Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62889 ) Change subject: soc/intel/apollolake: Correct enum for PrimaryVideoAdaptor FSP parameter ...................................................................... Patch Set 2: Code-Review+2 (1 comment) File src/soc/intel/apollolake/romstage.c: https://review.coreboot.org/c/coreboot/+/62889/comment/a8c7cd10_8d62722c PS2, Line 236: GPU_PRIMARY_PCI > I have now tested this patch on a APL CRB and I was able use the external graphic as intended with ' […] Ok, thanks for testing! -- To view, visit https://review.coreboot.org/c/coreboot/+/62889 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedbc144fa809f6d4587f5223b235ee95579c48f7 Gerrit-Change-Number: 62889 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 09:23:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/inteltool: Add support for Alder Lake chips detection and GPIOs
by Michał Kopeć (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Felix Singer, Michał Żygowski, Stefan Reinauer, Angel Pons, Michael Niewöhner. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63374 ) Change subject: util/inteltool: Add support for Alder Lake chips detection and GPIOs ...................................................................... Patch Set 8: (1 comment) File util/inteltool/inteltool.h: https://review.coreboot.org/c/coreboot/+/63374/comment/baf5c105_28fe08a1 PS7, Line 232: #define PCI_DEVICE_ID_INTEL_W685 0x7a8a : #define PCI_DEVICE_ID_INTEL_WM690 0x7a8d : #define PCI_DEVICE_ID_INTEL_HM670 0x7a8c : #define PCI_DEVICE_ID_INTEL_WM790 0x7a0d : #define PCI_DEVICE_ID_INTEL_HM770 0x7a0c > Where do these IDs come from? Intel doc #619362 (600, 700 series PCH EDS Vol1). Added to commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/63374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0001395517e1e7977b0f808d5d74cf85c52298d6 Gerrit-Change-Number: 63374 Gerrit-PatchSet: 8 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Thu, 07 Apr 2022 09:11:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/inteltool: Add support for Alder Lake chips detection and GPIOs
by Michał Kopeć (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Felix Singer, Michał Żygowski, Michał Kopeć, Stefan Reinauer, Michael Niewöhner. Hello Felix Singer, build bot (Jenkins), Michał Żygowski, Paul Menzel, Stefan Reinauer, Michael Niewöhner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63374 to look at the new patch set (#8). Change subject: util/inteltool: Add support for Alder Lake chips detection and GPIOs ...................................................................... util/inteltool: Add support for Alder Lake chips detection and GPIOs Add PCI IDs for Alder Lake H devices and their GPIO tables. PCI IDs as per Intel PCH-H EDS Vol1 (doc #619362). TEST=dump GPIOs on i5-12600K with Z690 chipset Change-Id: I0001395517e1e7977b0f808d5d74cf85c52298d6 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M util/inteltool/gpio.c M util/inteltool/gpio_groups.c A util/inteltool/gpio_names/alderlake_h.h M util/inteltool/inteltool.c M util/inteltool/inteltool.h M util/inteltool/pcr.c 6 files changed, 616 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/63374/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/63374 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0001395517e1e7977b0f808d5d74cf85c52298d6 Gerrit-Change-Number: 63374 Gerrit-PatchSet: 8 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2022