Tim Van Patten has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63558 )
Change subject: drivers/usb/acpi: acpi_power_res_params: Add use_gpio_for_status
......................................................................
drivers/usb/acpi: acpi_power_res_params: Add use_gpio_for_status
Add the member `use_gpio_for_status` to the structure
`drivers_usb_acpi_config`, so the `devicetree.cb` can specify it.
This field is then used to initialize the corresponding field in the
structure `acpi_power_res_params` in `usb_acpi_fill_ssdt_generator()`.
The member `acpi_power_res_params::use_gpio_for_status()` is already
being used by `acpi_device_add_power_res()` to determine which version
of the `_STA()` method to output.
BRANCH=None
Signed-off-by: Tim Van Patten <timvp(a)google.com>
BUG=b:225022810
TEST=Dump SSDT table for guybrush
Change-Id: I69eb5f1ad79f3b2980f43dcf4a36585fca198ec9
---
M src/drivers/usb/acpi/chip.h
M src/drivers/usb/acpi/usb_acpi.c
2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63558/1
diff --git a/src/drivers/usb/acpi/chip.h b/src/drivers/usb/acpi/chip.h
index 41481f1..4adffcf 100644
--- a/src/drivers/usb/acpi/chip.h
+++ b/src/drivers/usb/acpi/chip.h
@@ -66,6 +66,12 @@
* E.g. On a mic: if it is one, it is recording white-noise.
*/
struct acpi_gpio privacy_gpio;
+
+ /* Write a _STA method that uses the state of the GPIOs to determine if
+ * the PowerResource is ON or OFF. If this is false, the _STA method
+ * will always return ON.
+ */
+ bool use_gpio_for_status;
};
/* Method to get PLD structure from USB device */
diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c
index fb9f7f1..f72129c 100644
--- a/src/drivers/usb/acpi/usb_acpi.c
+++ b/src/drivers/usb/acpi/usb_acpi.c
@@ -95,7 +95,8 @@
config->enable_off_delay_ms,
NULL,
0,
- 0
+ 0,
+ config->use_gpio_for_status
};
acpi_device_add_power_res(&power_res_params);
}
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63555 )
Change subject: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
is there a good reason why we use these temporary MTRR ranges to cover the ROM? Why don't we just add the ROM into the global MTRR solution as an uncachable type? POC: https://review.coreboot.org/c/coreboot/+/63557
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Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63556 )
Change subject: mb/google/brya/var/redrix: Add alias back to RP6 WWAN device
......................................................................
mb/google/brya/var/redrix: Add alias back to RP6 WWAN device
This alias name is required for the mainboard.c code to generate the
appropriate power-off seqeuence for use during orderly S5 shutdown
from the OS. It had been accidentally removed, but is required, so
this patch adds it.
BUG=b:227788351
TEST=compile
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: I8936a01bd3a6b908033a8c58bd4e84b30d199e98
---
M src/mainboard/google/brya/variants/redrix/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/63556/1
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb
index 149b4f3..8ea8769 100644
--- a/src/mainboard/google/brya/variants/redrix/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb
@@ -198,7 +198,7 @@
register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)"
register "add_acpi_dma_property" = "true"
use rp6_rtd3 as rtd3dev
- device generic 0 on
+ device generic 0 alias rp6_wwan on
probe DB_LTE LTE_PCIE
end
end
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63510 )
Change subject: soc/amd/sabrina: Maintain a single copy of PSP Level2 entries
......................................................................
Patch Set 2: Code-Review+2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63466 )
Change subject: mb/prodrive/atlas: Disable ASPM for i225 port
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63466/comment/8db5c486_ad94c9e3
PS5, Line 9: I225 doesn’t support ASPM, so disable it at the root port.
> Where is the source for that statement? The [product brief][1] writes: […]
The link doesn't work. Do you have a more stable reference, such as a document ID?
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Change subject: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63555/comment/d161d323_8f16c387
PS2, Line 7: .c
Not needed in prefix.
https://review.coreboot.org/c/coreboot/+/63555/comment/907846af_52c508dc
PS2, Line 9: cover
covers?
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63541 )
Change subject: arch/x86/postcar_loader: Correct off-by-one of MTRR end address in log
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63541/comment/ab6cbfff_d9451ef3
PS2, Line 12: wrong
> > Thanks Angel. […]
@Werner Thanks!
@Subrata Yes, I understand the motivation behind this change and I agree it's reasonable, but it doesn't correct or fix anything. Originally, the start was inclusive and the end was exclusive, and this change makes both inclusive. I am requesting two things:
1. Update the commit message so that it doesn't say this commit fixes/corrects something. I think "to be consistent with how resource allocator code prints ranges" is a better reason.
2. Also update other files that print MTRR ranges, for the sake of consistency.
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Change subject: mb/msi/ms7d25: Enable displays
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63507/comment/0c8151f9_f9144064
PS2, Line 9: Add VBT from vendor firmware and configure display ports in
: devicetree.
> Am I seeing the same in the commit message? What is your expectation about the commit message?
Sorry, incorrect paste. The sentence fits in 72 characters.
But please add the version of the vendor firmware, you extracted the VBT from.
Commit Message:
https://review.coreboot.org/c/coreboot/+/63507/comment/6a807e89_da876d09
PS5, Line 13: Display Port
DisplayPort
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