coreboot-gerrit April 2022

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Change in coreboot[master]: soc/qualcomm/common: Make clock_configure() check for exact matches
by Patrick Georgi (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: Shelley Chen, Taniya Das, Paul Menzel. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63289 ) Change subject: soc/qualcomm/common: Make clock_configure() check for exact matches ...................................................................... Patch Set 13: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Gerrit-Change-Number: 63289 Gerrit-PatchSet: 13 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-CC: Taniya Das <tdas(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 14 Apr 2022 09:04:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cezanne: Update CPPC value
by Bao Zheng (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/63632 to review the following change. Change subject: cezanne: Update CPPC value ...................................................................... cezanne: Update CPPC value Change-Id: I091ab3bbc5f94961f8b366a3fa00f50f5c9fa182 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/cppc.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/63632/1 diff --git a/src/soc/amd/cezanne/cppc.c b/src/soc/amd/cezanne/cppc.c index 1afa26f..3f300ba 100644 --- a/src/soc/amd/cezanne/cppc.c +++ b/src/soc/amd/cezanne/cppc.c @@ -28,13 +28,13 @@ config->entries[CPPC_COUNTER_WRAP] = CPPC_UNSUPPORTED; config->entries[CPPC_REF_PERF_COUNTER] = CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64); config->entries[CPPC_DELIVERED_PERF_COUNTER] = CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64); - config->entries[CPPC_PERF_LIMITED] = CPPC_REG_MSR(MSR_CPPC_STATUS, 1, 1); + config->entries[CPPC_PERF_LIMITED] = CPPC_REG_MSR(MSR_CPPC_STATUS, 0, 2); config->entries[CPPC_ENABLE] = CPPC_REG_MSR(MSR_CPPC_ENABLE, 0, 1); if (version < 2) return; - config->entries[CPPC_AUTO_SELECT] = CPPC_UNSUPPORTED; + config->entries[CPPC_AUTO_SELECT] = CPPC_DWORD(1); config->entries[CPPC_AUTO_ACTIVITY_WINDOW] = CPPC_UNSUPPORTED; config->entries[CPPC_PERF_PREF] = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8); config->entries[CPPC_REF_PERF] = CPPC_UNSUPPORTED; @@ -42,8 +42,8 @@ if (version < 3) return; - config->entries[CPPC_LOWEST_FREQ] = CPPC_UNSUPPORTED; - config->entries[CPPC_NOMINAL_FREQ] = CPPC_UNSUPPORTED; + config->entries[CPPC_LOWEST_FREQ] = CPPC_DWORD(400); + config->entries[CPPC_NOMINAL_FREQ] = CPPC_DWORD(2000); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I091ab3bbc5f94961f8b366a3fa00f50f5c9fa182 Gerrit-Change-Number: 63632 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/{skl, xeon_sp}: Drop SoC specific LPC lock down configuration
by Subrata Banik (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Tim Chu. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63631 ) Change subject: soc/intel/{skl, xeon_sp}: Drop SoC specific LPC lock down configuration ...................................................................... soc/intel/{skl, xeon_sp}: Drop SoC specific LPC lock down configuration This patch drops SoC specific lpc lock down configuration as now IA common code lockdown.c has implemented the lpc registers lock down configuration as well. BUG=b:211954778 TEST=Build. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I99ec6d63dfe9a8ac8d9846067a9afc3ef83dc1c2 --- M src/soc/intel/skylake/lockdown.c M src/soc/intel/xeon_sp/lockdown.c 2 files changed, 0 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/63631/1 diff --git a/src/soc/intel/skylake/lockdown.c b/src/soc/intel/skylake/lockdown.c index 2fa53c9..1dd4e56 100644 --- a/src/soc/intel/skylake/lockdown.c +++ b/src/soc/intel/skylake/lockdown.c @@ -2,20 +2,10 @@ #include <device/mmio.h> #include <intelblocks/cfg.h> -#include <intelblocks/lpc_lib.h> #include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pm.h> -static void lpc_lockdown_config(int chipset_lockdown) -{ - /* Set BIOS Interface Lock, BIOS Lock */ - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - lpc_set_bios_interface_lock_down(); - lpc_set_lock_enable(); - } -} - static void pmc_lockdown_config(void) { uint8_t *pmcbase; @@ -33,9 +23,6 @@ void soc_lockdown_config(int chipset_lockdown) { - /* LPC lock down configuration */ - lpc_lockdown_config(chipset_lockdown); - /* PMC lock down configuration */ pmc_lockdown_config(); } diff --git a/src/soc/intel/xeon_sp/lockdown.c b/src/soc/intel/xeon_sp/lockdown.c index 0f032fc..49f3f5a 100644 --- a/src/soc/intel/xeon_sp/lockdown.c +++ b/src/soc/intel/xeon_sp/lockdown.c @@ -3,21 +3,11 @@ #include <device/mmio.h> #include <device/pci.h> #include <intelblocks/cfg.h> -#include <intelblocks/lpc_lib.h> #include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pci_devs.h> #include <soc/pm.h> -static void lpc_lockdown_config(int chipset_lockdown) -{ - /* Set BIOS Interface Lock, BIOS Lock */ - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - lpc_set_bios_interface_lock_down(); - lpc_set_lock_enable(); - } -} - static void pmc_lockdown_config(int chipset_lockdown) { uint8_t *pmcbase; @@ -46,7 +36,6 @@ void soc_lockdown_config(int chipset_lockdown) { - lpc_lockdown_config(chipset_lockdown); pmc_lockdown_config(chipset_lockdown); sata_lockdown_config(chipset_lockdown); } -- To view, visit https://review.coreboot.org/c/coreboot/+/63631 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99ec6d63dfe9a8ac8d9846067a9afc3ef83dc1c2 Gerrit-Change-Number: 63631 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration
by Subrata Banik (Code Review) 14 Apr '22

14 Apr '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63630 ) Change subject: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration ...................................................................... soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration This patch implements a helper function to perform LPC registers lock down configuration. BUG=b:211954778 TEST=Able to build and boot google/redrix to OS. Verified LPC PCI configuration register offset 0xDC bits BILD and LE are set. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I3e49b783e5db0ff40238e6e9259e48a4ecca66f8 --- M src/soc/intel/common/pch/lockdown/lockdown.c 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/63630/1 diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c index 56d0462..fda056c 100644 --- a/src/soc/intel/common/pch/lockdown/lockdown.c +++ b/src/soc/intel/common/pch/lockdown/lockdown.c @@ -5,6 +5,7 @@ #include <intelblocks/cfg.h> #include <intelblocks/dmi.h> #include <intelblocks/fast_spi.h> +#include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelpch/lockdown.h> #include <soc/pci_devs.h> @@ -90,6 +91,22 @@ } } +static void lpc_lockdown_config(int chipset_lockdown) +{ + /* Set BIOS Interface Lock, BIOS Lock */ + if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { + /* BIOS Interface Lock */ + lpc_set_bios_interface_lock_down(); + + /* Only allow writes in SMM */ + if (CONFIG(BOOTMEDIA_SMM_BWP)) + lpc_set_eiss(); + + /* BIOS Lock */ + lpc_set_lock_enable(); + } +} + /* * platform_lockdown_config has 2 major part. * 1. Common SoC lockdown configuration. @@ -104,6 +121,9 @@ /* SPI lock down configuration */ fast_spi_lockdown_cfg(chipset_lockdown); + /* LPC lock down configuration */ + lpc_lockdown_config(chipset_lockdown); + /* DMI lock down configuration */ dmi_lockdown_cfg(); -- To view, visit https://review.coreboot.org/c/coreboot/+/63630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e49b783e5db0ff40238e6e9259e48a4ecca66f8 Gerrit-Change-Number: 63630 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/cmn/lpc: Fix typo from FAST_SPIBAR to LPC
by Subrata Banik (Code Review) 14 Apr '22

14 Apr '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63629 ) Change subject: soc/intel/cmn/lpc: Fix typo from FAST_SPIBAR to LPC ...................................................................... soc/intel/cmn/lpc: Fix typo from FAST_SPIBAR to LPC BUG=b:211954778 TEST=None Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ib8cc4b8d13b61e3935f2050d25ce0278162c91c4 --- M src/soc/intel/common/block/lpc/lpc_lib.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/63629/1 diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c index 1393714..4fa2479 100644 --- a/src/soc/intel/common/block/lpc/lpc_lib.c +++ b/src/soc/intel/common/block/lpc/lpc_lib.c @@ -152,7 +152,7 @@ } /* - * Set FAST_SPIBAR BIOS Control register based on input bit field. + * Set LPC BIOS Control register based on input bit field. */ static void lpc_set_bios_control_reg(uint8_t bios_cntl_bit) { -- To view, visit https://review.coreboot.org/c/coreboot/+/63629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8cc4b8d13b61e3935f2050d25ce0278162c91c4 Gerrit-Change-Number: 63629 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent
by Subrata Banik (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Angel Pons, Arthur Heymans, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63518 ) Change subject: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/systemagent/systemagent.c: https://review.coreboot.org/c/coreboot/+/63518/comment/d2a9b828_7dd6a87e PS2, Line 349: if (!notify_data[i].skip) : notify_data[i].notify_func(); > I suspect compilers are not good at optimizing this out, e.g. that the function ends up in builds that won't call it. Would a plain if (CONFIG(...)) call() work too ? ah that way 😊 > Would a plain if (CONFIG(...)) call() work too ? Should work, bt there would be two `if` case for now atleast, just to avoid more functions under those if case in future, I have added like this. -- To view, visit https://review.coreboot.org/c/coreboot/+/63518 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599 Gerrit-Change-Number: 63518 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 14 Apr 2022 08:52:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: use specific VBT files
by Raihow Shi (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: YH Lin, Paul Menzel, Felix Held. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63604 ) Change subject: mb/google/brask/variants/moli: use specific VBT files ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: Hi,Tim please review it, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/63604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc8fbef1467605505459fce264697f670591c81e Gerrit-Change-Number: 63604 Gerrit-PatchSet: 11 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 14 Apr 2022 08:46:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: use specific VBT files
by Raihow Shi (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: YH Lin, Paul Menzel, Felix Held. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63604 to look at the new patch set (#11). Change subject: mb/google/brask/variants/moli: use specific VBT files ...................................................................... mb/google/brask/variants/moli: use specific VBT files Use specific VBTs for HDMI,DP,and ABSENT according to FW_CONFIG. BUG=b:220241277 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Change-Id: Icc8fbef1467605505459fce264697f670591c81e --- M src/mainboard/google/brya/variants/moli/ramstage.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/63604/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/63604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc8fbef1467605505459fce264697f670591c81e Gerrit-Change-Number: 63604 Gerrit-PatchSet: 11 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent
by Arthur Heymans (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Angel Pons, Eric Lai. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63518 ) Change subject: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/systemagent/systemagent.c: https://review.coreboot.org/c/coreboot/+/63518/comment/b526a9f3_1ebdc03f PS2, Line 349: if (!notify_data[i].skip) : notify_data[i].notify_func(); I suspect compilers are not good at optimizing this out, e.g. that the function ends up in builds that won't call it. Would a plain if (CONFIG(...)) call() work too ? -- To view, visit https://review.coreboot.org/c/coreboot/+/63518 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599 Gerrit-Change-Number: 63518 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Thu, 14 Apr 2022 08:44:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brask/variants/moli: remove i2c1 in overridetree for moli
by Raihow Shi (Code Review) 14 Apr '22

14 Apr '22

Attention is currently required from: YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held. Raihow Shi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63545 ) Change subject: mb/google/brask/variants/moli: remove i2c1 in overridetree for moli ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Hi, Zhuohao please review it, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/63545 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic782e1c6434ac57bdf65b3d9f4219bdf32d25b9e Gerrit-Change-Number: 63545 Gerrit-PatchSet: 5 Gerrit-Owner: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Ariel Fang <ariel_fang(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.com> Gerrit-CC: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 14 Apr 2022 08:43:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2022