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Hello build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: tests: Split Makefile to allow for making host-side test tools
......................................................................
tests: Split Makefile to allow for making host-side test tools
This patch is based on similar changes [1] done in Depthcharge projects,
which aimed to provide unified way to build host-side programs for
testing internal code. New test tools might benefit from it by having
same base code as unit-tests.
[1] https://crrev.com/c/3412108
TEST=make unit-tests
TEST=COV=1 make unit-tests coverage-report
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
Change-Id: Iac4517ab6146fa3f2d2b7a20df54601ab2d04c3d
---
A tests/Makefile.common
M tests/Makefile.inc
2 files changed, 170 insertions(+), 161 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/63637/2
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Hello build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63636
to look at the new patch set (#3).
Change subject: tests: update CMocka to stable-1.1
......................................................................
tests: update CMocka to stable-1.1
CMocka stable-1.1 has some convenience bugfixes like vprint buffer
increase or leftover values log fix (funtion names display correctly
now.
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
Change-Id: I20ebd15324a21c17cccd2976ae9c3f86b040426d
---
M .gitmodules
M 3rdparty/cmocka
M tests/lib/b64_decode-test.c
3 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/63636/3
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Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63443 )
Change subject: mb/intel/adlrvp_n: Disable SATA controller
......................................................................
Set Ready For Review
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Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62913 )
Change subject: mb/intel/adlrvp: Set half_populated true for ADL-N
......................................................................
Patch Set 13:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62913/comment/25e980ab_c00b6daa
PS10, Line 9: Alder Lake N
> I believe, the official spelling is Alder Lake-N. (If true, also one occurrence below. […]
Ack
File src/mainboard/intel/adlrvp/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/62913/comment/1abd5f7c_57e013a4
PS10, Line 52: AlderLake
> Alder Lake
Ack
https://review.coreboot.org/c/coreboot/+/62913/comment/da80f5de_05e99c1d
PS10, Line 53: Alder Lake N
> I think the official spelling is Alder Lake-N.
Ack
https://review.coreboot.org/c/coreboot/+/62913/comment/9b78a1fa_acce549d
PS10, Line 58: (CONFIG(BOARD_INTEL_ADLRVP_N_EXT_EC) ||
: CONFIG(BOARD_INTEL_ADLRVP_N))
> Sure. Will check and update.
Ack
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Hello V Sowmya, build bot (Jenkins), Rizwan Qureshi, Reka Norman, Balaji Manigandan, Krishna P Bhat D,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62913
to look at the new patch set (#13).
Change subject: mb/intel/adlrvp: Set half_populated true for ADL-N
......................................................................
mb/intel/adlrvp: Set half_populated true for ADL-N
Alder Lake-N has single memory controller with 64-bit bus width. Alder
Lake common meminit block driver considers bus width to be 128-bit and
populates the meminit data accordingly. By setting half_populated to
true, only the bottom half is populated.
Ideally, half_populated is used in platforms with multiple channels to
enable only one half of the channel. Alder Lake N has single channel,
and it would require for new structures to be defined in meminit block
driver for LPx memory configurations. In order to avoid adding new
structures, set half_populated to true. This has the same effect as
having single channel with 64-bit width.
BRANCH=NONE
TEST=Build and boot ADL-N RVP.
Signed-off-by: Usha P <usha.p(a)intel.com>
Change-Id: I2ecc3018a1ab039990ba47898ff0e0e2ede695cc
---
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
1 file changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/62913/13
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Hello V Sowmya, build bot (Jenkins), Rizwan Qureshi, Reka Norman, Balaji Manigandan, Krishna P Bhat D,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62913
to look at the new patch set (#12).
Change subject: mb/intel/adlrvp: Set half_populated true for ADL-N
......................................................................
mb/intel/adlrvp: Set half_populated true for ADL-N
Alder Lake-N has single memory controller with 64-bit bus width. Alder
Lake common meminit block driver considers bus width to be 128-bit and
populates the meminit data accordingly. By setting half_populated to
true, only the bottom half is populated.
Ideally, half_populated is used in platforms with multiple channels to
enable only one half of the channel. Alder Lake N has single channel,
and it would require for new structures to be defined in meminit block
driver for LPx memory configurations. In order to avoid adding new
structures, set half_populated to true. This has the same effect as
having single channel with 64-bit width.
Signed-off-by: Usha P <usha.p(a)intel.com>
Change-Id: I2ecc3018a1ab039990ba47898ff0e0e2ede695cc
---
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
1 file changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/62913/12
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Hello Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63636
to look at the new patch set (#2).
Change subject: tests: update CMocka to stable-1.1
......................................................................
tests: update CMocka to stable-1.1
CMocka stable-1.1 has some convenience bugfixes like vprint buffer
increase or leftover values log fix (funtion names display correctly
now.
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
Change-Id: I20ebd15324a21c17cccd2976ae9c3f86b040426d
---
M .gitmodules
M 3rdparty/cmocka
M tests/lib/b64_decode-test.c
3 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/63636/2
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