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Change subject: mb/google/brya: Add TPM I2C for moli
......................................................................
Patch Set 2: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63635/comment/69d141ff_e462c803
PS2, Line 7: mb/google/brya: Add TPM I2C for moli
suggestion:
`mb/google/brya/var/moli: Add Kconfig for TPM I2C bus`
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Change subject: mb/google/brya: Add TPM I2C for crota
......................................................................
Patch Set 4: Code-Review+2
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Hello build bot (Jenkins), Nico Huber, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63639
to look at the new patch set (#2).
Change subject: Add SBOM (Software Bill of Materials) Generation
......................................................................
Add SBOM (Software Bill of Materials) Generation
Add Makefile.inc to Generate and build coswid tags
Add templates for most payloads, coreboot and intel-microcode
Add Kconfig entries to optionaly add coswid tags for payloads, coreboot
and intel microcode
Add CBFS entry called sbom to each build via Makefile.inc
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: Icb7481d4903f95d200eddbfed7728fbec51819d0
---
M Makefile.inc
M payloads/Kconfig
M src/Kconfig
A src/sbom/Makefile.inc
A src/sbom/coreboot.ini.src
A src/sbom/intel-microcode.ini.src
A src/sbom/payload-BOOTBOOT.ini.src
A src/sbom/payload-FILO.ini.src
A src/sbom/payload-GRUB2.ini.src
A src/sbom/payload-LinuxBoot.ini.src
A src/sbom/payload-SeaBIOS.ini.src
A src/sbom/payload-U-Boot.ini.src
A src/sbom/payload-Yabits.ini.src
A src/sbom/payload-depthcharge.ini.src
A src/sbom/payload-iPXE.ini.src
A src/sbom/payload-skiboot.ini.src
M src/southbridge/intel/common/firmware/Kconfig
17 files changed, 317 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/63639/2
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 )
Change subject: mb/google/brya: Reset XHCI controller while preparing for S5
......................................................................
Patch Set 4: Code-Review+2
(1 comment)
Patchset:
PS4:
> > is this problem specific to google/brya or will it happen on all boards using the same soc? if the […]
There may be an official fix from Intel later, hopefully this is just a temporary workaround.
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Change subject: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent
......................................................................
Patch Set 3:
(1 comment)
File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/63518/comment/fb8752ad_4377d72a
PS2, Line 337: skip = CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE),
> > is it harmful to attempt to lock the PAM registers twice? […]
Ack
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