coreboot-gerrit April 2022

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Change in coreboot[master]: tpm: Allow separate handling of Google Ti50 TPM
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jes Klinke, Tim Wawrzynczak, Christian Walter, Angel Pons, Julius Werner, Jett Rink. Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63158 ) Change subject: tpm: Allow separate handling of Google Ti50 TPM ...................................................................... Patch Set 14: (4 comments) Patchset: PS14: Updated to match refinements on the refactoring CL. I assume the "Merge conflict" is a result of the refactoring needed to be submitted first. I do not know if I can indicate to gerrit and Jenkins that the CL in the relation chain needs to be applied first, when testing this CL. (I would have thought that would be automatic, given the relation chain.) PTAL File src/drivers/tpm/cr50.c: https://review.coreboot.org/c/coreboot/+/63158/comment/46970edc_1a7366ea PS12, Line 112: 0; > nit: return `CB_SUCCESS` here instead of `0` Done File src/mainboard/google/brya/Kconfig: https://review.coreboot.org/c/coreboot/+/63158/comment/69410712_8e2770d4 PS11, Line 32: MAINBOARD_HAS_I2C_TPM_TI50 > Brask is also cr50 only Tim, your comment is somewhat self-inconsistent, in that you use the word "also", while stating that Brask uses cr50, which is the opposite of the only two other variant. I have changed the code such that variants Nissa and Brya are declared as using Ti50, and Brask is declared as using Cr50. File src/mainboard/google/volteer/.history_*outside*: PS12: > Is this meant to be committed? Certainly not. Thanks for pointing this out, I have to stop my emacs from putting history files in random directories (and/or start paying attention to which files I "git add".) -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 14 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jett Rink <jettrink(a)google.com> Gerrit-Comment-Date: Wed, 20 Apr 2022 18:01:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jes Klinke <jbk(a)chromium.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Jett Rink <jettrink(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Allow separate handling of Google Ti50 TPM
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jes Klinke, Christian Walter, Julius Werner. Hello build bot (Jenkins), Tim Wawrzynczak, Christian Walter, Julius Werner, Jett Rink, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63158 to look at the new patch set (#14). Change subject: tpm: Allow separate handling of Google Ti50 TPM ...................................................................... tpm: Allow separate handling of Google Ti50 TPM A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. This change makes use of Kconfigs TPM_GOOGLE_CR50 and TPM_GOOGLE_TI50 to be able to take slightly different code paths, when e.g. evaluating whether TPM firmware is new enough to support certain features. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> --- M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/cr50.c M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/cr50.c M src/drivers/tpm/cr50.h M src/mainboard/google/brya/Kconfig 6 files changed, 36 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63158/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 14 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/skyrim: Update SPI settings for skyrim
by Raul Rangel (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jon Murphy, Chris Wang, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63717 ) Change subject: mb/google/skyrim: Update SPI settings for skyrim ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/63717/comment/48547172_59aa8b7b PS1, Line 78: EFS_SPI_READ_MODE > Yes, it doesn't. But both bootblock and PSP verstage will be using speed from EFS to configure. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/63717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Gerrit-Change-Number: 63717 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 20 Apr 2022 17:52:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Allow separate handling of Google Ti50 TPM
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jes Klinke, Christian Walter, Julius Werner. Hello build bot (Jenkins), Tim Wawrzynczak, Christian Walter, Julius Werner, Jett Rink, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63158 to look at the new patch set (#13). Change subject: tpm: Allow separate handling of Google Ti50 TPM ...................................................................... tpm: Allow separate handling of Google Ti50 TPM A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. This change makes use of Kconfigs TPM_GOOGLE_CR50 and TPM_GOOGLE_TI50 to be able to take slightly different code paths, when e.g. evaluating whether TPM firmware is new enough to support certain features. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> --- M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/cr50.c M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/cr50.c M src/drivers/tpm/cr50.h M src/mainboard/google/brya/Kconfig 6 files changed, 34 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63158/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 13 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/skyrim: Update SPI settings for skyrim
by Karthik Ramasubramanian (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Raul Rangel, Jon Murphy, Chris Wang, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63717 ) Change subject: mb/google/skyrim: Update SPI settings for skyrim ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/63717/comment/c5dd5b63_f60223e9 PS1, Line 78: EFS_SPI_READ_MODE > PSP doesn't use EFS I thought? Yes, it doesn't. But both bootblock and PSP verstage will be using speed from EFS to configure. PSP team is working to not override the speed configuration for Chrome platforms. https://review.coreboot.org/c/coreboot/+/63717/comment/334f7013_cd00774a PS1, Line 79: Dual IO (1-1-2) > Check with Johnathan... I would like to use 1-2-2, but not sure the CPLD supports it. This bug indicates CPLD supports only 1-1-2 - b/225213679#comment18 -- To view, visit https://review.coreboot.org/c/coreboot/+/63717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Gerrit-Change-Number: 63717 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 20 Apr 2022 17:46:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload: Support x86 payload loaded via Linux Boot Protocol
by Nico Huber (Code Review) 20 Apr '22

20 Apr '22

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63748 ) Change subject: libpayload: Support x86 payload loaded via Linux Boot Protocol ...................................................................... libpayload: Support x86 payload loaded via Linux Boot Protocol There's been a rarely used feature in FILO for some years to add a Linux header to its binary so a Linux loader could load it. One thing overlooked was that a Linux loader is unaware of anything like a `.bss` section that would have to be cleared. As execution starts in libpayload this needs to be handled here. Beside clearing everything from `_edata` to `_end`, we also take the kernel command line as `argv[0]`. Change-Id: Ief6bca8534d07458b9c5a315f297cb62d727917f Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M payloads/libpayload/arch/x86/head.S 1 file changed, 51 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/63748/1 diff --git a/payloads/libpayload/arch/x86/head.S b/payloads/libpayload/arch/x86/head.S index 1052b8c..e1188e7 100644 --- a/payloads/libpayload/arch/x86/head.S +++ b/payloads/libpayload/arch/x86/head.S @@ -60,6 +60,13 @@ #define CB_ARGV 0x08 #define CB_ARGC 0x10 +#define LINUX_CL_MAGIC 0x020 /* u16 */ +#define LINUX_CL_MAGIC_VALUE 0xa33f +#define LINUX_CL_OFFSET 0x022 /* u16 */ +#define LINUX_ALT_MEM_K 0x1e0 /* u32 */ +#define LINUX_LOADER_FLAGS 0x211 /* u8 */ +#define LINUX_KERNEL_START 0x214 /* u32 */ + /* * This function saves off the previous stack and switches us to our * own execution environment. @@ -83,7 +90,51 @@ movl CB_ARGC(%esp), %eax movl %eax, main_argc + jmp 2f + 1: + /* + * Alternatively, see if we are called via Linux Boot Protocol. + * There is no reasonable magic value, so this is a naughty + * heuristic (we check if .kernel_start, .loader_flags and + * .alt_mem_k fields in the zero page make any sense). + * + * If we are loaded this way, we need to clear .bss because the + * loader is not aware of it. + */ + cmpl $_start, LINUX_KERNEL_START(%esi) /* kernel_start is us? */ + jne 2f + + movzbl LINUX_LOADER_FLAGS(%esi), %eax /* load-high flag set? */ + andl $1, %eax + jz 2f + + movl LINUX_ALT_MEM_K(%esi), %ebx /* compute top of memory */ + addl $1024, %ebx + shl $10, %ebx + + lea 0x1000(%esi), %eax /* params struct below TOM? */ + cmpl %eax, %ebx + jg 2f + cmpl $_end, %ebx /* are we below TOM? */ + jg 2f + + /* Now clear .bss: */ + mov $_edata, %edi /* memset(_edata, 0x00, _end - _edata) */ + xor %eax, %eax + mov $_end, %ecx + sub $_edata, %ecx + rep stosb + + /* And optionally use kernel command line as argv[0]: */ + cmpw $LINUX_CL_MAGIC_VALUE, LINUX_CL_MAGIC(%esi) + jne 2f + movl $1, main_argc + movzwl LINUX_CL_OFFSET(%esi), %eax + addl %esi, %eax + movl %eax, main_argv + +2: /* Store current stack pointer and set up new stack. */ movl %esp, %eax movl $_stack, %esp -- To view, visit https://review.coreboot.org/c/coreboot/+/63748 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief6bca8534d07458b9c5a315f297cb62d727917f Gerrit-Change-Number: 63748 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: src/mainboard/google: Remove unused <boardid.h>
by Paul Menzel (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Elyes Haouas. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60748 ) Change subject: src/mainboard/google: Remove unused <boardid.h> ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60748/comment/c626afc6_5a0265ec PS1, Line 7: src/ Please remove. -- To view, visit https://review.coreboot.org/c/coreboot/+/60748 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2611be41e8730a9b189b1b0aa3fe62be0757b371 Gerrit-Change-Number: 60748 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 20 Apr 2022 17:10:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/nipperkin: Fix WLAN to GEN2 speed
by Kevin Chiu (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Bao Zheng, Rob Barnes. Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63722 ) Change subject: mb/google/nipperkin: Fix WLAN to GEN2 speed ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/guybrush/variants/nipperkin/variant.c: https://review.coreboot.org/c/coreboot/+/63722/comment/398f18bf_8aa370a5 PS4, Line 10: /* Disable PSPP to avoid S0ix hangs - b/228830362 */ : memset(dxio_descriptors[WLAN].port_params, 0, : sizeof(dxio_descriptors[WLAN].port_params)); Hi Rob, sorry, I mean these PSPP off parts since the AC/DC is configured to GEN2, does it mean it equals to turn on PSPP? Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/63722 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I988365e51aca0d6515c5605b3032521cf59d8d30 Gerrit-Change-Number: 63722 Gerrit-PatchSet: 4 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Patrick Huang <patrick.huang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Wed, 20 Apr 2022 17:06:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Update SPI settings for skyrim
by Raul Rangel (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jon Murphy, Chris Wang, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63717 ) Change subject: mb/google/skyrim: Update SPI settings for skyrim ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/63717/comment/6a7d656d_08610b43 PS1, Line 78: EFS_SPI_READ_MODE PSP doesn't use EFS I thought? https://review.coreboot.org/c/coreboot/+/63717/comment/cca21597_41ba98c2 PS1, Line 79: Dual IO (1-1-2) > Should we use 1-1-2 or 1-2-2? Check with Johnathan... I would like to use 1-2-2, but not sure the CPLD supports it. -- To view, visit https://review.coreboot.org/c/coreboot/+/63717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Gerrit-Change-Number: 63717 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 20 Apr 2022 16:51:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Update SPI settings for skyrim
by Karthik Ramasubramanian (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Raul Rangel, Jon Murphy, Chris Wang, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63717 ) Change subject: mb/google/skyrim: Update SPI settings for skyrim ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/63717/comment/e582e2bb_c6919f5e PS1, Line 79: Dual IO (1-1-2) Should we use 1-1-2 or 1-2-2? -- To view, visit https://review.coreboot.org/c/coreboot/+/63717 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe4b9f4794f7e883c3819258ede809c3c8922b0 Gerrit-Change-Number: 63717 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 20 Apr 2022 16:49:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2022