coreboot-gerrit April 2022

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Change in ...coreboot[master]: util/cbfstool/fit.c: Bail out when there are not enough FIT entries
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33555 Change subject: util/cbfstool/fit.c: Bail out when there are not enough FIT entries ...................................................................... util/cbfstool/fit.c: Bail out when there are not enough FIT entries Bail out when there are not enough empty FIT enties to add all microcode entries. Change-Id: If86678a1eaaa0c5ff571f25bd6bfdb26ac93a946 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/fit.c 1 file changed, 8 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/33555/1 diff --git a/util/cbfstool/fit.c b/util/cbfstool/fit.c index aeb1755..2fee9e3 100644 --- a/util/cbfstool/fit.c +++ b/util/cbfstool/fit.c @@ -238,7 +238,7 @@ static int parse_microcode_blob(struct cbfs_image *image, struct cbfs_file *mcode_file, struct microcode_entry *mcus, - int total_entries, int *mcus_found) + int *mcus_found) { int num_mcus; uint32_t current_offset; @@ -272,9 +272,6 @@ file_length -= mcus[num_mcus].size; num_mcus++; - /* Reached limit of FIT entries. */ - if (num_mcus == total_entries) - break; if (file_length < sizeof(struct microcode_header)) break; } @@ -319,13 +316,18 @@ return 1; } - if (parse_microcode_blob(image, mcode_file, mcus, empty_entries, - &mcus_found)) { + if (parse_microcode_blob(image, mcode_file, mcus, &mcus_found)) { ERROR("Couldn't parse microcode blob.\n"); ret = 1; goto out; } + if (mcus_found > empty_entries) { + ERROR("Not enough empty FIT entries for all microcode update entries.\n"); + ret = 1; + goto out; + } + add_microcodde_entries(fit, image, mcus_found, mcus, offset_fn, 0); update_fit_checksum(fit); -- To view, visit https://review.coreboot.org/c/coreboot/+/33555 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If86678a1eaaa0c5ff571f25bd6bfdb26ac93a946 Gerrit-Change-Number: 33555 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: Use read*p
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Jason Glenesk, Marshall Dawson, Angel Pons, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Angel Pons, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63726 to look at the new patch set (#6). Change subject: soc/amd/picasso: Use read*p ...................................................................... soc/amd/picasso: Use read*p This avoids compiler warnings on 64bit builds that complains about casting pointer to non matching integer size. Change-Id: I29fdb73ae1c0508796a21b650bf4fd1ac6688021 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c M src/soc/amd/picasso/fch.c 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/63726/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63726 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29fdb73ae1c0508796a21b650bf4fd1ac6688021 Gerrit-Change-Number: 63726 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/intelp2m: Add support for Alder Lake macro generation
by Michał Żygowski (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Michał Kopeć, Angel Pons. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63403 ) Change subject: util/intelp2m: Add support for Alder Lake macro generation ...................................................................... Patch Set 6: (1 comment) File util/intelp2m/platforms/adl/template.go: https://review.coreboot.org/c/coreboot/+/63403/comment/782bab93_5b43870d PS6, Line 17: "GPP_C", "GPP_F", "GPP_E", "GPP_R", "GPP_J", "GPP_K", "GPP_G") We may need to add VPGIO as it controls certain functionalities on the system like CNVI -- To view, visit https://review.coreboot.org/c/coreboot/+/63403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Gerrit-Change-Number: 63403 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 21 Apr 2022 10:59:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/64bit: Generate static page tables from an assembly file
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Raul Rangel, Patrick Rudolph, Angel Pons, Julius Werner. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63725 ) Change subject: cpu/x86/64bit: Generate static page tables from an assembly file ...................................................................... Patch Set 4: (2 comments) File src/cpu/x86/64bit/pt.S: https://review.coreboot.org/c/coreboot/+/63725/comment/e3af7b82_96a2dddc PS3, Line 4: ArchitectureProgrammer > nit: missing a space Done File src/cpu/x86/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63725/comment/65cd0f68_4e50357c PS3, Line 7: CONFIG_ARCH_BOOTBLOCK_X86_64 > > I guess I'm concerned about the PSP Verstage case. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Gerrit-Change-Number: 63725 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 21 Apr 2022 10:02:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/64bit: Add a separate Makefile.inc
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63758 ) Change subject: cpu/x86/64bit: Add a separate Makefile.inc ...................................................................... cpu/x86/64bit: Add a separate Makefile.inc Follow-up patches will add more to this makefile. Change-Id: I8da6265b4c810e39a67f5ec27e26eeb26e3679a4 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- A src/cpu/x86/64bit/Makefile.inc M src/cpu/x86/Makefile.inc 2 files changed, 9 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63758/1 diff --git a/src/cpu/x86/64bit/Makefile.inc b/src/cpu/x86/64bit/Makefile.inc new file mode 100644 index 0000000..721e620 --- /dev/null +++ b/src/cpu/x86/64bit/Makefile.inc @@ -0,0 +1,7 @@ +bootblock-y += mode_switch.S +ifneq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) +verstage-y += mode_switch.S +endif +romstage-y += mode_switch.S +postcar-y += mode_switch.S +ramstage-y += mode_switch.S diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index b970528..dffc2b1 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -3,8 +3,8 @@ subdirs-y += pae subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm subdirs-$(CONFIG_UDELAY_TSC) += tsc - -all-$(CONFIG_ARCH_ALL_STAGES_X86_64) += 64bit/mode_switch.S +# Use ARCH_BOOTBLOCK_X86_64 as a proxy for knowing if 64bit is going to be used +subdirs-$(CONFIG_ARCH_BOOTBLOCK_X86_64) += 64bit subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c -- To view, visit https://review.coreboot.org/c/coreboot/+/63758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8da6265b4c810e39a67f5ec27e26eeb26e3679a4 Gerrit-Change-Number: 63758 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/x86/64bit: Generate static page tables from an assembly file
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Raul Rangel, Patrick Rudolph, Julius Werner. Hello build bot (Jenkins), Patrick Rudolph, Angel Pons, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63725 to look at the new patch set (#5). Change subject: cpu/x86/64bit: Generate static page tables from an assembly file ...................................................................... cpu/x86/64bit: Generate static page tables from an assembly file This removes the need for a tool to generate simple identity pages. Future patches will link this page table directly into the stages on some platforms so having an assembly file makes a lot of sense. This also optimizes the size of the page of each 4K page by placing the PDPE_table below the PDE. Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Documentation/arch/x86/index.md M src/cpu/x86/64bit/Makefile.inc A src/cpu/x86/64bit/pt.S D util/pgtblgen/Makefile.inc D util/pgtblgen/description.md D util/pgtblgen/pgtblgen.c 6 files changed, 48 insertions(+), 181 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/63725/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Gerrit-Change-Number: 63725 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/x86/64bit: Generate static page tables from an assembly file
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Raul Rangel, Patrick Rudolph, Julius Werner. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63725 ) Change subject: cpu/x86/64bit: Generate static page tables from an assembly file ...................................................................... Patch Set 3: (3 comments) File src/cpu/x86/64bit/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63725/comment/440cd39d_a3c9e390 PS3, Line 4: -ffreestanding -nostdlib -nostdinc > Any reason you can't just reuse `$(CPPFLAGS_ramstage) $(CFLAGS_ramstage)` here? (Also, shouldn't it […] Done File src/cpu/x86/64bit/pt.S: https://review.coreboot.org/c/coreboot/+/63725/comment/eea374fa_6869562a PS3, Line 27: .quad _GEN_PAGE(0x200000 * 0) > Maybe something like this could work: > > .rept 2048 > .quad _GEN_PAGE(0x200000 * (. - PDE_tables) / 8) > .endr Division won't compile but shifting right does. Thanks. File src/cpu/x86/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63725/comment/059f1ef1_b04d1b70 PS3, Line 7: CONFIG_ARCH_BOOTBLOCK_X86_64 > I guess I'm concerned about the PSP Verstage case. > > Not sure if the > > ``` > all-y += mode_switch.S > ``` > > will work for us. Maybe that's the part that needs the individual rules? This is confusing me. It should be invalid code for the PSP? Why does the build not fail? -- To view, visit https://review.coreboot.org/c/coreboot/+/63725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Gerrit-Change-Number: 63725 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 21 Apr 2022 09:55:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/64bit: Generate static page tables from an assembly file
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Raul Rangel, Patrick Rudolph, Arthur Heymans. Hello build bot (Jenkins), Patrick Rudolph, Angel Pons, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63725 to look at the new patch set (#4). Change subject: cpu/x86/64bit: Generate static page tables from an assembly file ...................................................................... cpu/x86/64bit: Generate static page tables from an assembly file This removes the need for a tool to generate simple identity pages. Future patches will link this page table directly into the stages on some platforms so having an assembly file makes a lot of sense. This also optimizes the size of the page of each 4K page by placing the PDPE_table below the PDE. Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Documentation/arch/x86/index.md A src/cpu/x86/64bit/Makefile.inc A src/cpu/x86/64bit/pt.S M src/cpu/x86/Makefile.inc D util/pgtblgen/Makefile.inc D util/pgtblgen/description.md D util/pgtblgen/pgtblgen.c 7 files changed, 51 insertions(+), 183 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/63725/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63725 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Gerrit-Change-Number: 63725 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Add SBOM (Software Bill of Materials) Generation
by Maximilian Brune (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Martin L Roth, Maximilian Brune. Hello build bot (Jenkins), Nico Huber, Martin L Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63639 to look at the new patch set (#6). Change subject: Add SBOM (Software Bill of Materials) Generation ...................................................................... Add SBOM (Software Bill of Materials) Generation Add Makefile.inc to Generate and build coswid tags Add templates for most payloads, coreboot and intel-microcode Add Kconfig entries to optionaly add coswid tags for payloads, coreboot and intel microcode Add CBFS entry called sbom to each build via Makefile.inc Motivation: https://blogs.gnome.org/hughsie/2022/03/10/firmware-software-bill-of-materi… Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: Icb7481d4903f95d200eddbfed7728fbec51819d0 --- M Makefile.inc M payloads/Kconfig M src/Kconfig A src/sbom/Makefile.inc A src/sbom/coreboot.ini.src A src/sbom/intel-microcode.ini.src A src/sbom/payload-BOOTBOOT.ini.src A src/sbom/payload-FILO.ini.src A src/sbom/payload-GRUB2.ini.src A src/sbom/payload-LinuxBoot.ini.src A src/sbom/payload-SeaBIOS.ini.src A src/sbom/payload-U-Boot.ini.src A src/sbom/payload-Yabits.ini.src A src/sbom/payload-depthcharge.ini.src A src/sbom/payload-iPXE.ini.src A src/sbom/payload-skiboot.ini.src M src/southbridge/intel/common/firmware/Kconfig 17 files changed, 319 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/63639/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb7481d4903f95d200eddbfed7728fbec51819d0 Gerrit-Change-Number: 63639 Gerrit-PatchSet: 6 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <martinroth(a)google.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Fix buggy code tries to access DESC region
by Arthur Heymans (Code Review) 21 Apr '22

21 Apr '22

Attention is currently required from: Arthur Heymans, Sridhar Siricilla. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63734 ) Change subject: soc/intel/common: Fix buggy code tries to access DESC region ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: boot_device_spi_flash ought to be used instead of boot_device_ro. Depending on FMAP is not the best idea for this. -- To view, visit https://review.coreboot.org/c/coreboot/+/63734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib144cc0845b7527e5a3032529b0802f961944b87 Gerrit-Change-Number: 63734 Gerrit-PatchSet: 4 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 21 Apr 2022 09:00:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2022