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Change subject: device/device.c: remove warning for missing apic read resources
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/12471/comment/2a369f4f_bb79b03b
PS2, Line 9: We have had the "APIC: 00 missing read_resources" messages
Martin & Nico, we're seeing similar errors on MediaTek platforms:
CPU: 00 missing read_resources
The devicetree is like this:
chip soc/mediatek/mt8186
device cpu_cluster 0 on
device cpu 0 on end
end
end
I wonder if we should suppress the error message for DEVICE_PATH_CPU as well.
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Change subject: soc/intel/common/thermal: Allow thermal configuration over PMC
......................................................................
Patch Set 14:
(1 comment)
File src/soc/intel/common/block/thermal/thermal_pmc.c:
https://review.coreboot.org/c/coreboot/+/59209/comment/109c3a49_1631c9e1
PS14, Line 78: {
: .offset = PMC_PWRM_THERMAL_PHLC,
: .value = PMC_PWRM_THERMAL_PHLC_PHLCLOCK,
: },
: {
: .offset = PMC_PWRM_THERMAL_TLEN,
: .value = PMC_PWRM_THERMAL_TLEN_TLENLOCK,
: },
> > well, alderlake seems to be fine indeed. wait... the comment mentions tiger lake, but it isn't called there, yet? I missed that :O
>
> Sorry, I have verified this on ADL.
We might need to implement the same for TGL.
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Change subject: mb/google/dedede: Update PCIe and SATA pins for low power consumption
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Patch Set 1: Code-Review+1
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62780
to look at the new patch set (#2).
Change subject: mb/google/brya/var/banshee: Add camera privacy setting
......................................................................
mb/google/brya/var/banshee: Add camera privacy setting
Using the GPP_F19 as privacy switch for camera in banshee.
BUG=b:223712143, b:216110896
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com>
Change-Id: I67d65347ceac7152f1951018a633a2e93ee84e14
---
M src/mainboard/google/brya/variants/banshee/gpio.c
M src/mainboard/google/brya/variants/banshee/overridetree.cb
2 files changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/62780/2
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Change subject: mb/google/brya: set GPP_D0 to GPO and unlocked
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brya/variants/baseboard/brya/gpio.c:
https://review.coreboot.org/c/coreboot/+/62739/comment/25610018_7ecd1263
PS2, Line 122: /* D1 : ISH_GP1 ==> FP_RST_ODL */
: PAD_CFG_GPO_LOCK(GPP_D1, 1, LOCK_CONFIG),
: /* D2 : ISH_GP2 ==> EN_FP_PWR */
: PAD_CFG_GPO_LOCK(GPP_D2, 1, LOCK_CONFIG),
> for redrix (GPP_D1/GPP_D2 in 14505.21.0) […]
Wisley, redrix didn't lock the GPIO setting. https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
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Change subject: soc/intel/common: Add IOE P2SB for TCSS
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
@John, Can you please rebase your code based on this patch train https://review.coreboot.org/c/coreboot/+/62778/1
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Change subject: mb/google/dedede/var/galtic: Add fw_config probe for 2nd touchscreen
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/dedede/variants/galtic/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62315/comment/99ef4261_789a27ee
PS3, Line 2: 39 40
> Hi Karthik […]
Done
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