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Change subject: mb/google/brya/vell: Add companion device name to WWAN PCIe generic device
......................................................................
mb/google/brya/vell: Add companion device name to WWAN PCIe generic device
This was to merge PCIe ACPI code to WWAN device.
Also, RTD3 devices are add to overridetree.cb where WWAN is
present for vell.
BUG=b:224214465
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot
Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Change-Id: If27abcf31ed948899bfaecbe8ef494fe8a80609b
---
M src/mainboard/google/brya/variants/vell/overridetree.cb
1 file changed, 26 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/62771/2
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Change subject: (TEST ONLY)mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
......................................................................
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Change subject: TEST WWAN VELL
......................................................................
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Change subject: mb/google/brya/var/vell: Correct WWAN power sequence for vell
......................................................................
Patch Set 23:
(1 comment)
Patchset:
PS18:
> They both have the drivers/wwan/fm chip driver in devicetree
removed overridetree.cb and change commit message.
This CL for only WWAN power sequence
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Hello build bot (Jenkins), Tim Wawrzynczak, Shon Wang,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#23).
Change subject: mb/google/brya/var/vell: Correct WWAN power sequence for vell
......................................................................
mb/google/brya/var/vell: Correct WWAN power sequence for vell
Correct the WWAN power sequence to meet spec
BUG=b:220084872
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot
Change-Id: If6d3f965b8f6b6753446f55a8bd47d3b0c1ae7be
Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig.name
M src/mainboard/google/brya/variants/vell/gpio.c
M src/mainboard/google/brya/variants/vell/include/variant/gpio.h
3 files changed, 22 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/61847/23
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Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62627 )
Change subject: mb/google/brya/var/kinox: Modify 15W SOC power control setting
......................................................................
Patch Set 6:
(6 comments)
File src/mainboard/google/brya/variants/kinox/ramstage.c:
https://review.coreboot.org/c/coreboot/+/62627/comment/8d614278_9575bc5c
PS5, Line 41: 13.52
> `5A`?
Done
https://review.coreboot.org/c/coreboot/+/62627/comment/3c9f9755_525fe7a9
PS5, Line 43: 13.52
> `5A`?
Done
https://review.coreboot.org/c/coreboot/+/62627/comment/024e77ad_44009d92
PS5, Line 49: 13.52A
> 5A?
Done
https://review.coreboot.org/c/coreboot/+/62627/comment/709c01d8_7d02d585
PS5, Line 50: 13.52A
> 5A?
Done
https://review.coreboot.org/c/coreboot/+/62627/comment/f572881d_adbda144
PS5, Line 51: 13.52A
> 5A?
Done
https://review.coreboot.org/c/coreboot/+/62627/comment/a2b7a5b2_91d23f90
PS5, Line 55: 13.52A
> 5A?
Done
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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro, Zhuohao Lee,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brya/var/kinox: Modify 15W SOC power control setting
......................................................................
mb/google/brya/var/kinox: Modify 15W SOC power control setting
Modify 15W SOC default power settings for kinox.
- PL2 39W
- PL4 100W
- Psys_PL2 65W
- Psys_imax_ma 5000ma
- bj_volts_mv 20000mv
BUG=b:213417026, b:222599762
TEST=emerge-brask coreboot
Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Change-Id: I2956705f7d26929c7cf2dd4e852fc61b619a83e5
---
M src/mainboard/google/brya/variants/kinox/Makefile.inc
A src/mainboard/google/brya/variants/kinox/ramstage.c
2 files changed, 69 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/62627/6
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Vitaly Rodionov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61448 )
Change subject: drivers/i2c/cs35l53: Add driver for generating device in SSDT
......................................................................
Patch Set 11:
(3 comments)
File src/drivers/i2c/cs35l53/chip.h:
https://review.coreboot.org/c/coreboot/+/61448/comment/9108633f_6a602af5
PS10, Line 31: };
> please, no spaces at the start of a line
Please fix.
https://review.coreboot.org/c/coreboot/+/61448/comment/e8eedd95_28a30779
PS10, Line 33: enum cs35l53_gpio2_src {
> please, no spaces at the start of a line
Please fix.
https://review.coreboot.org/c/coreboot/+/61448/comment/7e7dc5d0_5c2aa8f1
PS10, Line 40: };
> please, no spaces at the start of a line
Please fix.
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Change subject: mb/google/brya/var/volmar: Disable thunderbolt
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62810/comment/f6472cc7_e0e44a3e
PS4, Line 9: Volmar does not support Thunderbolt, therefore
: disable all of the TBT devices in the devicetree.
: The volmar fit image had been disabled already,
: refer to chrome-internal:4459289
> ok. updated.
solved
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Change subject: mb/google/brya/var/volmar: Disable thunderbolt
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62810/comment/609edf4b_96534611
PS4, Line 9: Volmar does not support Thunderbolt, therefore
: disable all of the TBT devices in the devicetree.
: The volmar fit image had been disabled already,
: refer to chrome-internal:4459289
> commit msgs are 72 characters wide please
ok. updated.
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