coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/skyrim: Disable SD ASPM
by Martin L Roth (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: EricKY Cheng. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68940 ) Change subject: mb/google/skyrim: Disable SD ASPM ...................................................................... Patch Set 9: (1 comment) File src/mainboard/google/skyrim/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/68940/comment/fc081c03_13d44203 PS9, Line 31: .link_aspm = ASPM_DISABLED, // TODO: switch to ASPM_L1 after b:245550573 Why are we disabling ASPM on this port for all platforms because of an issue on a single variant? Can you please make a variant-specific copy of this file and re-enable it for the rest of the platforms? -- To view, visit https://review.coreboot.org/c/coreboot/+/68940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If080cdb517a3f22aa89c8053fb6bba9e931c6f76 Gerrit-Change-Number: 68940 Gerrit-PatchSet: 9 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:59:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: arch/x86/memmove: Add 64bit version
by build bot (Jenkins) (Code Review) 04 Nov '22

04 Nov '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69231 ) Change subject: arch/x86/memmove: Add 64bit version ...................................................................... Patch Set 2: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162532): https://review.coreboot.org/c/coreboot/+/69231/comment/288d7d28_e61ad960 PS2, Line 10: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/69231 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib43ec19df97194d6b1c18bfacb5fe8211ba0ffe5 Gerrit-Change-Number: 69231 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:58:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib/ramtest.c: Update ram failure post code
by Matt DeVillier (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Martin L Roth, Lean Sheng Tan. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69202 ) Change subject: lib/ramtest.c: Update ram failure post code ...................................................................... Patch Set 1: (1 comment) File src/lib/ramtest.c: https://review.coreboot.org/c/coreboot/+/69202/comment/d978d13b_ed83a47f PS1, Line 113: POST_RAM_FAILURE > since we're cleaning this up, any reason not to combine with printk below and use die_with_post_code […] maybe just for the 2nd one since this is nodie() -- To view, visit https://review.coreboot.org/c/coreboot/+/69202 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21ef196e48ff37ffe320b575d6de66b43997e7eb Gerrit-Change-Number: 69202 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:55:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib/ramtest.c: Update ram failure post code
by Matt DeVillier (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Martin L Roth, Lean Sheng Tan. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69202 ) Change subject: lib/ramtest.c: Update ram failure post code ...................................................................... Patch Set 1: Code-Review+1 (2 comments) File src/lib/ramtest.c: https://review.coreboot.org/c/coreboot/+/69202/comment/15da01d0_6ce86082 PS1, Line 113: POST_RAM_FAILURE since we're cleaning this up, any reason not to combine with printk below and use die_with_post_code()? https://review.coreboot.org/c/coreboot/+/69202/comment/a678fa92_2b67c877 PS1, Line 203: POST_RAM_FAILURE same as above -- To view, visit https://review.coreboot.org/c/coreboot/+/69202 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21ef196e48ff37ffe320b575d6de66b43997e7eb Gerrit-Change-Number: 69202 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:39:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/block/spi: Mainboard to override SPI Read Mode
by Karthik Ramasubramanian (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Jon Murphy, Martin Roth, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68946 ) Change subject: soc/amd/common/block/spi: Mainboard to override SPI Read Mode ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68946/comment/35ce585a_ebb4d25d PS1, Line 15: BUG=b:225213679 > This bug was marked dupe, and the one that it's a dupe of was marked won't fix infeasible, is this r […] Yeah. This bug provides background regarding the hardware limitation mentioned in the CL. There are no other bugs. File src/mainboard/google/guybrush/spi_speeds.c: https://review.coreboot.org/c/coreboot/+/68946/comment/fa8da86c_16acebf0 PS1, Line 7: void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode) > Rename variable speed? It's no longer solely the fast speed It is still fast_speed only that we are overriding. There are other speeds that are not touched yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/68946 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I160b56f6201a798ce59e977ca40301e23ab63805 Gerrit-Change-Number: 68946 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:29:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jon Murphy <jpmurphy(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/mendocino: Enable x86 SHA accelerator
by Raul Rangel (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Matt DeVillier, Paul Menzel, Fred Reitberger, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68954 ) Change subject: soc/amd/mendocino: Enable x86 SHA accelerator ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14efe7be66f28f348330580d2e5733e11603a023 Gerrit-Change-Number: 68954 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:23:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/vboot: Update build rules using x86 SHA extension
by Raul Rangel (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Julius Werner, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68953 ) Change subject: security/vboot: Update build rules using x86 SHA extension ...................................................................... Patch Set 4: Code-Review+2 (1 comment) File src/security/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/68953/comment/c07dc019_cf2f2729 PS3, Line 24: > Initially I tried that in patchset 2. But one of the comments called to simplify the change. […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/68953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f388e963eb82990cda41d3880e66ad937334908 Gerrit-Change-Number: 68953 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:23:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/amd & soc/amd: Define bootblock postcodes
by Martin L Roth (Code Review) 04 Nov '22

04 Nov '22

Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/69212 ) Change subject: drivers/amd & soc/amd: Define bootblock postcodes ...................................................................... Abandoned Looking at alternatives, pushed accidentally. -- To view, visit https://review.coreboot.org/c/coreboot/+/69212 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5de5887d36072b94e05602f787668818fd0d99 Gerrit-Change-Number: 69212 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: soc/intel/xeon_sp/cpx: Add get_ewl_hob() utility function
by Martin Roth (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Marc Jones, Johnny Lin, Angel Pons. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69144 ) Change subject: soc/intel/xeon_sp/cpx: Add get_ewl_hob() utility function ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > pushed a revert CB:69229 to unbreak the tree. […] ewww. That seems like an issue that should be brought to the attention of gerrit developers. Honestly, to me this is bad enough that I think we should look at getting rid of private patches again. If we can't rely on the output of what we can see to be valid, how can we merge things? -- To view, visit https://review.coreboot.org/c/coreboot/+/69144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f949e9c881099c3723fca056e2c4732ca8b64cf Gerrit-Change-Number: 69144 Gerrit-PatchSet: 3 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:13:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Crawford <tcrawford(a)system76.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: security/vboot: Update build rules using x86 SHA extension
by Karthik Ramasubramanian (Code Review) 04 Nov '22

04 Nov '22

Attention is currently required from: Raul Rangel, Julius Werner. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68953 ) Change subject: security/vboot: Update build rules using x86 SHA extension ...................................................................... Patch Set 4: (2 comments) File src/security/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/68953/comment/cde15ee3_9282214c PS3, Line 24: > Would it be easier to read an reason about if you pulled the logic outside of the rule? […] Initially I tried that in patchset 2. But one of the comments called to simplify the change. Also the recommendation is consistent with how conditionals are used in the make recipe - eg. line 37. But I have no strict preference and I am open to either of the approach. https://review.coreboot.org/c/coreboot/+/68953/comment/85a285c8_819e6a93 PS3, Line 31: > Another odd behavior that I observed is for bootblock, this condition evaluates to nothing, not even […] Done. Adding $\ while splitting the line removed the extra space. Also the odd behavior with bootblock is a debugging error on my side. Printing the stage and X86_SHA_EXT variable from vboot makefile confirmed that for bootblock, romstage and ramstage it is set y. -- To view, visit https://review.coreboot.org/c/coreboot/+/68953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f388e963eb82990cda41d3880e66ad937334908 Gerrit-Change-Number: 68953 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 04 Nov 2022 22:11:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit November 2022