coreboot-gerrit November 2022

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[M] Change in coreboot[master]: util/amdfwtool: Add new types
by Sean Rhodes (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Angel Pons, Arthur Heymans. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68119 ) Change subject: util/amdfwtool: Add new types ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20dc77fb6f83dc813e3da5fe30f8f52068fc4662 Gerrit-Change-Number: 68119 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:37:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/picasso/acpi: rename pcie.asl to pci_int_defs.asl
by Jason Glenesk (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Jason Glenesk, Jason Nien, Martin Roth, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69187 ) Change subject: soc/amd/picasso/acpi: rename pcie.asl to pci_int_defs.asl ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69187 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie6e5ee815e4346004bc864a6111a255dc689eae8 Gerrit-Change-Number: 69187 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:34:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/picasso/acpi: include pci_int_defs.asl from soc.asl
by Jason Glenesk (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Martin Roth, Felix Held. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69188 ) Change subject: soc/amd/picasso/acpi: include pci_int_defs.asl from soc.asl ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69188 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4e7bfb15de184cc43cd17c8249be0f59405793f Gerrit-Change-Number: 69188 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:33:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/craask: Add wifi sar table
by 9elements QA (Code Review) 09 Nov '22

09 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68660 ) Change subject: mb/google/nissa/var/craask: Add wifi sar table ...................................................................... Patch Set 10: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135105 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135104 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/135103 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/135102 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/135101 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135100 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/135099 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/135098 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/135097 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/135096 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/135095 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/135094 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135093 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/135092 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/135091 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/135090 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c92f0ab53ece12a97068f09241e5298909116aa Gerrit-Change-Number: 68660 Gerrit-PatchSet: 10 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Cathy Chen <cathy_chen(a)quanta.corp-partner.google.com> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:22:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/amdfwtool: Add new types
by Arthur Heymans (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Angel Pons. Hello build bot (Jenkins), Sean Rhodes, Angel Pons, Marvin Drees, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68119 to look at the new patch set (#2). Change subject: util/amdfwtool: Add new types ...................................................................... util/amdfwtool: Add new types These are used on newer platforms. Change-Id: I20dc77fb6f83dc813e3da5fe30f8f52068fc4662 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 73 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/68119/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20dc77fb6f83dc813e3da5fe30f8f52068fc4662 Gerrit-Change-Number: 68119 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: util/amdfwtool: Add new types
by Arthur Heymans (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68119 ) Change subject: util/amdfwtool: Add new types ...................................................................... Patch Set 1: (1 comment) File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/68119/comment/9cbde3b4_bc4b3947 PS1, Line 365: fw_type =AMD_TOKEN_UNLOCK; > > spaces required around that '=' (ctx:WxV) […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20dc77fb6f83dc813e3da5fe30f8f52068fc4662 Gerrit-Change-Number: 68119 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:17:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: nb/intel/i945: Use <commonlib/bsd/helpers.h> macros
by Elyes Haouas (Code Review) 09 Nov '22

09 Nov '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69406 ) Change subject: nb/intel/i945: Use <commonlib/bsd/helpers.h> macros ...................................................................... nb/intel/i945: Use <commonlib/bsd/helpers.h> macros Change-Id: I2cbf7aaa31a560b0259ec763322045b34b479e23 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/i945.h M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/i945/northbridge.c 3 files changed, 25 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/69406/1 diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 4818a73..b1f8efa 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -332,8 +332,8 @@ void dump_spd_registers(u8 spd_map[4]); void sdram_dump_mchbar_registers(void); -u32 decode_igd_memory_size(u32 gms); -u32 decode_tseg_size(const u8 esmramc); +size_t decode_igd_memory_size(u32 gms); +size_t decode_tseg_size(const u8 esmramc); /* Romstage mainboard callbacks */ /* Optional: Override the default LPC config. */ diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index 1fa0358..321b387 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -5,6 +5,7 @@ #include <arch/romstage.h> #include <cbmem.h> +#include <commonlib/bsd/helpers.h> #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> @@ -14,17 +15,17 @@ #include "i945.h" /* Decodes TSEG region size to bytes. */ -u32 decode_tseg_size(const u8 esmramc) +size_t decode_tseg_size(const u8 esmramc) { if (!(esmramc & 1)) return 0; switch ((esmramc >> 1) & 3) { case 0: - return 1 << 20; + return 1 * MiB; case 1: - return 2 << 20; + return 2 * MiB; case 2: - return 8 << 20; + return 8 * MiB; case 3: default: die("Bad TSEG setting.\n"); @@ -64,14 +65,14 @@ } /* Decodes used Graphics Mode Select (GMS) to kilobytes. */ -u32 decode_igd_memory_size(const u32 gms) +size_t decode_igd_memory_size(const u32 gms) { - static const u16 ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64 }; + static const size_t ggc2uma[] = { 0, 1, 4, 8, 16, 32, 48, 64 }; if (gms >= ARRAY_SIZE(ggc2uma)) die("Bad Graphics Mode Select (GMS) setting.\n"); - return ggc2uma[gms] << 10; + return ggc2uma[gms] * KiB; } void smm_region(uintptr_t *start, size_t *size) diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 3c5603c..651c3cf 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -14,7 +14,8 @@ static void mch_domain_read_resources(struct device *dev) { - uint32_t pci_tolm, tseg_sizek, cbmem_topk, delta_cbmem; + uint32_t pci_tolm, cbmem_topk, delta_cbmem; + size_t tseg_sizek; uint8_t tolud; uint16_t reg16; unsigned long long tomk, tomk_stolen; @@ -41,9 +42,9 @@ reg16 = pci_read_config16(d0f0, GGC); if (!(reg16 & 2)) { printk(BIOS_DEBUG, "IGD decoded, subtracting "); - int uma_size = decode_igd_memory_size((reg16 >> 4) & 7); + size_t uma_size = decode_igd_memory_size((reg16 >> 4) & 7); - printk(BIOS_DEBUG, "%dM UMA\n", uma_size / KiB); + printk(BIOS_DEBUG, "%ld UMA\n", uma_size / KiB); tomk_stolen -= uma_size; /* For reserving UMA memory in the memory map */ @@ -55,7 +56,7 @@ } tseg_sizek = decode_tseg_size(pci_read_config8(d0f0, ESMRAMC)) / KiB; - printk(BIOS_DEBUG, "TSEG decoded, subtracting %dM\n", tseg_sizek / KiB); + printk(BIOS_DEBUG, "TSEG decoded, subtracting %ld\n", tseg_sizek / KiB); tomk_stolen -= tseg_sizek; tseg_memory_base = tomk_stolen * 1024ULL; tseg_memory_size = tseg_sizek * 1024ULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/69406 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cbf7aaa31a560b0259ec763322045b34b479e23 Gerrit-Change-Number: 69406 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: drivers/phy/m88e1512: Provide functionality to customize LEDs
by Mario Scheithauer (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69386 ) Change subject: drivers/phy/m88e1512: Provide functionality to customize LEDs ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: with last patchset I have added that INTn output can brought out on LED[2] -- To view, visit https://review.coreboot.org/c/coreboot/+/69386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Gerrit-Change-Number: 69386 Gerrit-PatchSet: 6 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:15:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/phy/m88e1512: Provide functionality to customize LEDs
by build bot (Jenkins) (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Werner Zeh. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69386 ) Change subject: drivers/phy/m88e1512: Provide functionality to customize LEDs ...................................................................... Patch Set 6: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163114): https://review.coreboot.org/c/coreboot/+/69386/comment/c5945c77_d7b6de41 PS6, Line 15: Link to the Marvell PHY 88E1512 datasheet: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/69386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Gerrit-Change-Number: 69386 Gerrit-PatchSet: 6 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 15:11:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/phy/m88e1512: Provide functionality to customize LEDs
by Mario Scheithauer (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Werner Zeh. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69386 to look at the new patch set (#6). Change subject: drivers/phy/m88e1512: Provide functionality to customize LEDs ...................................................................... drivers/phy/m88e1512: Provide functionality to customize LEDs For Marvel PHY it could be necessary to customize the shown LED status at the connector. The LED status can be changed via Function Control Register on page 3. Additionally, it can allows the INTn output to be brought out on LED[2]. This setting must be made via LED Timer Control Register also on page 3. Link to the Marvell PHY 88E1512 datasheet: https://web.archive.org/web/20221109080111/https://www.marvell.com/content/… Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- A src/drivers/phy/m88e1512/chip.h M src/drivers/phy/m88e1512/m88e1512.c A src/drivers/phy/m88e1512/m88e1512.h 3 files changed, 79 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/69386/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/69386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia71c43f4286f9201f03cb759252ebb405ab81904 Gerrit-Change-Number: 69386 Gerrit-PatchSet: 6 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022