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Change subject: soc/amd/common: Definition of EFS_OFFSET
......................................................................
soc/amd/common: Definition of EFS_OFFSET
The old definition is based on the assumption flash size is 16M
bytes. The value is below.
0 Address 0xFA0000
1 Address 0xF20000
2 Address 0xE20000
3 Address 0xC20000
4 Address 0x820000
5 Address 0x20000
But if the flash size is 8M, the EFS address would be 0xff820000,
whose relative address is 0x20000.
Change-Id: I915c43d38c09fbb5c7835f139d0c1a4e8526aeec
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/psp_efs.h
1 file changed, 23 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/69462/1
diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h
index 51b06a6..3e8399f 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h
@@ -5,8 +5,9 @@
#define AMD_COMMON_PSP_EFS_H
#include <types.h>
+#include <fmap_config.h>
-#define EFS_OFFSET (0xffffff - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX) + 0x20000 + 1)
+#define EFS_OFFSET ((0xffffff - (0x80000 << CONFIG_AMD_FWM_POSITION_INDEX) + 0x20000 + 1) - (FMAP_SECTION_FLASH_START & 0xffffff))
#define EMBEDDED_FW_SIGNATURE 0x55aa55aa
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Change subject: amdfwtool: Add instance 1 for bios image
......................................................................
amdfwtool: Add instance 1 for bios image
Change-Id: Iaa40872b270cf9ff289794c8c51c4d8b448d862d
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
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Change subject: amdfwtool: Add new family morgana
......................................................................
amdfwtool: Add new family morgana
Change-Id: Ib82f6c03b93d277f3f7f27ce57c1a41fdc103575
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
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Change subject: amdfwtool: Add the new entry type for new family morgana
......................................................................
amdfwtool: Add the new entry type for new family morgana
Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
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Change subject: amdfwtool: Add definition of instance for PSP entry
......................................................................
amdfwtool: Add definition of instance for PSP entry
Change-Id: I9f6250fd0e26cfae2cc2128ca9413a5621d2df0c
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---
M util/amdfwtool/amdfwtool.h
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Change subject: soc/amd/morgana: Add 32M support
......................................................................
soc/amd/morgana: Add 32M support
The 32M has to be divided into 2 16M parts, top and bottom. We can
only map one part at one time. By default, the bottom 16M is mapped to
0xFF000000-0xFFFFFFFF. By this default setting, the address in the
image is not the actual phyical address. So we need to convert the
address, or map the upper 16M instead (the easier way UEFI BIOS
does). So we push all the modules with running code, like romstage,
ramstage, even the fmap table, to upper 16M. For the bootblock part,
which is loaded by bootloader, it is unchanged as a tiny relocatable
image in bottom 16M in amdfw.rom.
Since the amdfw.rom is not in CFBS, we put it in fmap.
We put only EC FWs and PSP FWs in the botttom, where the PSP can
load.
If coreboot need to access bottom 16M, which in fact doesn't seem to
be necessary, can be implemented by SMN command.
The bit 14 of soft fuse decides which (top or bottom) 16M is mapped to
4G-16M.
BUG=b:255374782
Change-Id: Ia0b5a75f828033b29c378bed9a939b23d7f19140
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/mainboard/amd/birman/Kconfig
M src/mainboard/amd/birman/board.fmd
M src/mainboard/amd/birman/chromeos.fmd
M src/soc/amd/morgana/Makefile.inc
4 files changed, 48 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/69150/5
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Change subject: amdfwtool: Set the base address of AMDFW as relative
......................................................................
amdfwtool: Set the base address of AMDFW as relative
Change-Id: If6fd5b21be90ac37618c484506db9b8a1e350ea2
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/mainboard/amd/mandolin/Kconfig
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/common/block/include/amdblocks/psp_efs.h
M src/soc/amd/mendocino/Kconfig
M src/soc/amd/mendocino/Makefile.inc
M src/soc/amd/morgana/Kconfig
M src/soc/amd/morgana/Makefile.inc
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/Makefile.inc
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
M src/southbridge/amd/agesa/hudson/Makefile.inc
M src/southbridge/amd/pi/hudson/Makefile.inc
M util/amdfwtool/amdfwtool.c
15 files changed, 189 insertions(+), 176 deletions(-)
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69432 )
Change subject: mb/google/geralt: Fix incorrect timestamps in the eventlog
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69432/comment/d062227c_4157ed80
PS3, Line 7: Fix incorrect timestamps in the eventlog
Enable RTC for eventlog timestamps
https://review.coreboot.org/c/coreboot/+/69432/comment/1fdc941a_20df54f6
PS3, Line 9: Timestamp '2000-00-00 00:00:00' is considered as the invalid format.
: Enable RTC to fix incorrect timestamp format in the eventlog.
Without RTC, the timestamps in the eventlog are currently all '2000-00-00 00:00:00'. Enable RTC to get the correct timestamps.
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