coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/brya/variants/volmar: Update ELAN touchscreen timing
by Ren Kuo (Code Review) 14 Nov '22

14 Nov '22

Ren Kuo has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69559 ) Change subject: mb/google/brya/variants/volmar: Update ELAN touchscreen timing ...................................................................... mb/google/brya/variants/volmar: Update ELAN touchscreen timing ELAN updated the datasheet, the HID/I2C protocol's T3 delay time is 150ms now. Correct the delay time to 150ms to follow the spec. BUG=b:257073343 TEST=Build firmware and measure the timing of resume and power on volmar DUT. Signed-off-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Change-Id: I40a30ed567cd676d0a9373527d93fe51f89d39e9 --- M src/mainboard/google/brya/variants/volmar/overridetree.cb 1 file changed, 19 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/69559/1 diff --git a/src/mainboard/google/brya/variants/volmar/overridetree.cb b/src/mainboard/google/brya/variants/volmar/overridetree.cb index 056467c..b7ce0a3 100644 --- a/src/mainboard/google/brya/variants/volmar/overridetree.cb +++ b/src/mainboard/google/brya/variants/volmar/overridetree.cb @@ -262,7 +262,7 @@ register "generic.probed" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" - register "generic.reset_delay_ms" = "20" + register "generic.reset_delay_ms" = "150" register "generic.reset_off_delay_ms" = "1" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" -- To view, visit https://review.coreboot.org/c/coreboot/+/69559 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40a30ed567cd676d0a9373527d93fe51f89d39e9 Gerrit-Change-Number: 69559 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/geralt: Enable RTC for eventlog timestamps
by Rex-BC Chen (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69432 ) Change subject: mb/google/geralt: Enable RTC for eventlog timestamps ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddad102dc8d60de01a691d330deb8247e99c616a Gerrit-Change-Number: 69432 Gerrit-PatchSet: 4 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 14 Nov 2022 02:19:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa: Remove SI_ME subregions
by Kangheui Won (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Tarun Tuli, Reka Norman. Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69540 ) Change subject: mb/google/nissa: Remove SI_ME subregions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I993e07a060445ab8de1b0e40a023e8248867c53c Gerrit-Change-Number: 69540 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Mon, 14 Nov 2022 02:16:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode
by Kangheui Won (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Tarun Tuli, Michał Żygowski, Reka Norman, Paul Menzel, Rizwan Qureshi, Sridhar Siricilla. Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69324 ) Change subject: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/69324 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac605baa291ab5cc5f28464006f4828c12c748fe Gerrit-Change-Number: 69324 Gerrit-PatchSet: 2 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Mon, 14 Nov 2022 02:14:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/x86: Set up cpu_info storage using MSR
by Raul Rangel (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Arthur Heymans. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68913 ) Change subject: cpu/x86: Set up cpu_info storage using MSR ...................................................................... Patch Set 8: (1 comment) File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/68913/comment/3c9962a2_b90a4a17 PS8, Line 168: if (long_mode_supported()) { : msr_t msr = rdmsr(IA32_GS_BASE); : struct per_cpu_segment_data *segment_data = : (struct per_cpu_segment_data *)(uintptr_t)msr.raw; : return segment_data->cpu_info; : } You can drop this now can't you? -- To view, visit https://review.coreboot.org/c/coreboot/+/68913 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id38d3c84ef757c0b322ec0d387f57043147cb447 Gerrit-Change-Number: 68913 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 14 Nov 2022 02:13:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/geralt: Enable RTC for eventlog timestamps
by Liju-Clr Chen (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Liju-Clr Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69432 ) Change subject: mb/google/geralt: Enable RTC for eventlog timestamps ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69432/comment/04a968ed_0045fa21 PS3, Line 7: Fix incorrect timestamps in the eventlog > Enable RTC for eventlog timestamps Done https://review.coreboot.org/c/coreboot/+/69432/comment/2737414f_2201dbde PS3, Line 9: Timestamp '2000-00-00 00:00:00' is considered as the invalid format. : Enable RTC to fix incorrect timestamp format in the eventlog. > Without RTC, the timestamps in the eventlog are currently all '2000-00-00 00:00:00'. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddad102dc8d60de01a691d330deb8247e99c616a Gerrit-Change-Number: 69432 Gerrit-PatchSet: 4 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 14 Nov 2022 02:11:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/geralt: Enable RTC for eventlog timestamps
by Liju-Clr Chen (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Hung-Te Lin, Liju-Clr Chen. Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Yu-Ping Wu, Yidi Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69432 to look at the new patch set (#4). Change subject: mb/google/geralt: Enable RTC for eventlog timestamps ...................................................................... mb/google/geralt: Enable RTC for eventlog timestamps Without RTC, the timestamps in the eventlog are currently all '2000-00-00 00:00:00'. Enable RTC to get the correct timestamps. localhost ~ # head /var/log/eventlog.txt 0 | 2022-10-15 22:59:38 | Log area cleared | 4088 1 | 2022-10-15 22:59:38 | Memory Cache Update | Normal | Success 2 | 2022-10-15 22:59:45 | System boot | 0 3 | 2022-10-15 22:59:46 | Firmware vboot info | boot_mode=Developer | fw_tried=A | fw_try_count=0 | fw_prev_tried=A | fw_prev_result=Unknown localhost ~ # localhost ~ # date Sun Oct 16 01:42:59 PDT 2022 localhost ~ # BUG=b:233720142 TEST=check the timestamp field in /var/log/eventlog.txt Change-Id: Iddad102dc8d60de01a691d330deb8247e99c616a Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/Kconfig M src/soc/mediatek/mt8188/Makefile.inc 2 files changed, 29 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/69432/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddad102dc8d60de01a691d330deb8247e99c616a Gerrit-Change-Number: 69432 Gerrit-PatchSet: 4 Gerrit-Owner: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa: Remove SI_ME subregions
by Reka Norman (Code Review) 14 Nov '22

14 Nov '22

Reka Norman has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69540 ) Change subject: mb/google/nissa: Remove SI_ME subregions ...................................................................... mb/google/nissa: Remove SI_ME subregions The SI_ME subregions were added to support using the CSE stitching tools (cse_serger). Use of the stitching tools has been reverted and probably won't be re-enabled soon, so the subregions are not currently used by anything. They also don't match the actual region sizes chosen by the FIT tool, so remove them to avoid confusion. The other option would be to manually keep them in sync with the sizes chosen by the FIT tool, but this would be extra manual effort without much benefit. BUG=None TEST=Build and boot on nivviks Change-Id: I993e07a060445ab8de1b0e40a023e8248867c53c Signed-off-by: Reka Norman <rekanorman(a)chromium.org> --- M src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd M src/mainboard/google/brya/chromeos-nissa-16MiB.fmd M src/mainboard/google/brya/chromeos-nissa-32MiB.fmd 3 files changed, 24 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/69540/1 diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd index f4909c2..a6da8d1 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd @@ -1,13 +1,7 @@ FLASH 16M { SI_ALL 3776K { SI_DESC 4K - SI_ME { - CSE_LAYOUT 8K - CSE_RO 1360K - CSE_DATA 420K - # 64-KiB aligned to optimize RW erases during CSE update. - CSE_RW 1984K - } + SI_ME } SI_BIOS 12608K { RW_SECTION_A 4180K { diff --git a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd index 9ccea06..f4f9d31 100644 --- a/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-16MiB.fmd @@ -1,13 +1,7 @@ FLASH 16M { SI_ALL 3776K { SI_DESC 4K - SI_ME { - CSE_LAYOUT 8K - CSE_RO 1360K - CSE_DATA 420K - # 64-KiB aligned to optimize RW erases during CSE update. - CSE_RW 1984K - } + SI_ME } SI_BIOS 12608K { RW_SECTION_A 3668K { diff --git a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd index 5d386f9..48406b9 100644 --- a/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd +++ b/src/mainboard/google/brya/chromeos-nissa-32MiB.fmd @@ -1,13 +1,7 @@ FLASH 32M { SI_ALL 3776K { SI_DESC 4K - SI_ME { - CSE_LAYOUT 8K - CSE_RO 1360K - CSE_DATA 420K - # 64-KiB aligned to optimize RW erases during CSE update. - CSE_RW 1984K - } + SI_ME } SI_BIOS 28992K { RW_SECTION_A 4344K { -- To view, visit https://review.coreboot.org/c/coreboot/+/69540 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I993e07a060445ab8de1b0e40a023e8248867c53c Gerrit-Change-Number: 69540 Gerrit-PatchSet: 1 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: cpu/x86/topology: Add code to fill in topology on struct path
by Jonathan Zhang (Code Review) 14 Nov '22

14 Nov '22

Attention is currently required from: Johnny Lin, Angel Pons, Arthur Heymans, Shuming Chu (Shuming), TangYiwei. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69222 ) Change subject: cpu/x86/topology: Add code to fill in topology on struct path ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: Hi Tim, could your team help to put this patch on top of our rebase codebase, try on CraterLake, check MADT/SRAT and see if they are good? Hi Yiwei, could your team help out on your dual socket server? -- To view, visit https://review.coreboot.org/c/coreboot/+/69222 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2210eb9b663dd90941a64132aa7154440dc7e5a9 Gerrit-Change-Number: 69222 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: TangYiwei Gerrit-Comment-Date: Mon, 14 Nov 2022 01:49:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/pujjo: Modify touch screen hid to ELAN901C
by Eric Lai (Code Review) 14 Nov '22

14 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69430 ) Change subject: mb/google/nissa/var/pujjo: Modify touch screen hid to ELAN901C ...................................................................... mb/google/nissa/var/pujjo: Modify touch screen hid to ELAN901C Modify touch screen hid for Pujjo board. BUG=b:258586760 TEST=Use the value to boot on Pujjo successfully. Signed-off-by: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Change-Id: Ia3b374de8cba2125c478814a1890a4b6831715b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69430 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Reka Norman <rekanorman(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/pujjo/overridetree.cb 1 file changed, 20 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Reka Norman: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb index fd022a9..0a5624c 100644 --- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb @@ -334,7 +334,7 @@ device ref i2c1 on chip drivers/i2c/hid - register "generic.hid" = ""ELAN9004"" + register "generic.hid" = ""ELAN901C"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)" register "generic.probed" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/69430 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia3b374de8cba2125c478814a1890a4b6831715b9 Gerrit-Change-Number: 69430 Gerrit-PatchSet: 4 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jynn Chen <jynn.chen(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <Kevin3.Yang(a)lcfuturecenter.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-MessageType: merged

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coreboot-gerrit November 2022