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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69383 )
Change subject: soc/intel/ehl: Add MDIO operation to TSN GbE device
......................................................................
Patch Set 9:
(2 comments)
File src/soc/intel/elkhartlake/mdio.c:
https://review.coreboot.org/c/coreboot/+/69383/comment/81073a71_594bc2ea
PS7, Line 82: .read_resources = noop_read_resources,
: .set_resources = noop_set_resources,
> static struct mdio_operations ehl_mdio_ops = { […]
Ack
File src/soc/intel/elkhartlake/tsn_gbe.c:
https://review.coreboot.org/c/coreboot/+/69383/comment/d7bde0cb_6f62eed3
PS7, Line 93: .init = gbe_tsn_init,
: };
> I am not sure what you mean exactly, but mdio_dev_enable(dev) assigns ops_mdio and it is called in g […]
Ack
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Change subject: drivers/i2c/rv3028c7: Add ACPI generation callbacks
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
File src/drivers/i2c/rv3028c7/rv3028c7.c:
https://review.coreboot.org/c/coreboot/+/69543/comment/cb42e20b_c4a2ba60
PS2, Line 199: dev_path(dev)
What about synchronizing the message format with the other logs and use #dev->chip_ops->name' instead? I guess having the name of the device that causes the issues would be easier to read.
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Change subject: mb/google/nissa: Modify FMD to redistribute buffer
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/chromeos-nissa-32MiB.fmd:
https://review.coreboot.org/c/coreboot/+/69683/comment/3e544d74_9f6ed0cf
PS1, Line 27: 7056K
> 7120K ?
Ack
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Hello build bot (Jenkins), Tarun Tuli, Kangheui Won,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69683
to look at the new patch set (#2).
Change subject: mb/google/nissa: Modify FMD to redistribute buffer
......................................................................
mb/google/nissa: Modify FMD to redistribute buffer
Modify the chromeos FMD file for nissa variants to redistribute the
buffer in SI_ME region obtained due to CSE size optimizations to SI_BIOS
region.
1. Modify SI_ALL region size to 3712K. SI_DESC remains at 4K and SI_ME
is 3708K.
2. Modify SI_BIOS region to 12672K. This results in an addition of 32K
buffer each to FW_MAIN_A/B regions.
BUG=b:228936671
BRANCH=firmware-nissa-15217.B
TEST=Verify CSE FW update with new FMD and ME RW blobs on craask.
Cq-Depend: chrome-internal:5094491
Change-Id: I5ead2f81850a2aa79e677c7f271db672e235750a
Signed-off-by: Krishna P Bhat D <krishna.p.bhat.d(a)intel.corp-partner.google.com>
---
M src/mainboard/google/brya/chromeos-nissa-16MiB-debugfsp.fmd
M src/mainboard/google/brya/chromeos-nissa-16MiB.fmd
M src/mainboard/google/brya/chromeos-nissa-32MiB.fmd
3 files changed, 38 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/69683/2
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