coreboot-gerrit November 2022

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[M] Change in coreboot[master]: util/kconfig: Add patch to move Kconfig deps to build/config
by Martin L Roth (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Elyes Haouas. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69535 ) Change subject: util/kconfig: Add patch to move Kconfig deps to build/config ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69535/comment/e0ea615c_c10ada82 PS2, Line 9: [1] > The link (or reference) to '[1]' is missing Done. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/69535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4b48831705c3206e7c2e09f01d072d1cde9c9c4 Gerrit-Change-Number: 69535 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 17 Nov 2022 19:14:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/kconfig: Add patch to move Kconfig deps to build/config
by Martin L Roth (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Martin L Roth. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69535 to look at the new patch set (#3). Change subject: util/kconfig: Add patch to move Kconfig deps to build/config ...................................................................... util/kconfig: Add patch to move Kconfig deps to build/config The change being reverted [1] caused all the Kconfig dependency files to be generated at the top level of coreboot's build directory. This reverts that behavior and puts the dependencies back where we're used to them being. [1] https://web.archive.org/web/20220316120807/https://github.com/torvalds/linu… Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Ic4b48831705c3206e7c2e09f01d072d1cde9c9c4 --- A util/kconfig/patches/0014-util-kconfig-Move-Kconfig-deps-back-into-build-confi.patch M util/kconfig/patches/series 2 files changed, 83 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/69535/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69535 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic4b48831705c3206e7c2e09f01d072d1cde9c9c4 Gerrit-Change-Number: 69535 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: Revert "src/arch/x86: Use core apic id to get cpu_index()"
by Arthur Heymans (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Nico Huber, Johnny Lin, Christian Walter, Andrey Petrov, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69509 ) Change subject: Revert "src/arch/x86: Use core apic id to get cpu_index()" ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c: https://review.coreboot.org/c/coreboot/+/69509/comment/f0dbb4f5_83cd5369 PS3, Line 33: : struct cpu_info *info = cpu_info(); : if (!info) : return FSP_DEVICE_ERROR; : : if (processor_info_buffer == NULL) : return FSP_INVALID_PARAMETER; : : if (processor_number >= get_cpu_count()) : return FSP_NOT_FOUND; : : apicid = info->cpu->path.apic.apic_id; Ah this is wrong. It needs to find the lapic device. -- To view, visit https://review.coreboot.org/c/coreboot/+/69509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Gerrit-Change-Number: 69509 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 18:57:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: vc/amd/fsp/morgana/platform_descriptors.h: Update for morgana
by Fred Reitberger (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Felix Held. Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69704 ) Change subject: vc/amd/fsp/morgana/platform_descriptors.h: Update for morgana ...................................................................... Patch Set 2: (1 comment) File src/vendorcode/amd/fsp/morgana/platform_descriptors.h: https://review.coreboot.org/c/coreboot/+/69704/comment/37e8f834_8d716a07 PS1, Line 177: [12:19] > not sure about this Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69704 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic893526789c05a298965702114d4a814466a5742 Gerrit-Change-Number: 69704 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 17 Nov 2022 18:27:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cbmem_top: Change the return value to uintptr_t
by Elyes Haouas (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Raul Rangel, Jeff Daly, Jakub Czapiga, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu. Hello Jeff Daly, Raul Rangel, Jakub Czapiga, Jonathan Zhang, Matt DeVillier, Julius Werner, Angel Pons, Arthur Heymans, Andrey Petrov, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69163 to look at the new patch set (#14). Change subject: cbmem_top: Change the return value to uintptr_t ...................................................................... cbmem_top: Change the return value to uintptr_t Get rid of a lot of casts. Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/arch/x86/postcar_loader.c M src/drivers/amd/agesa/mtrr_fixme.c M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp1_1/raminit.c M src/drivers/intel/fsp2_0/hob_verify.c M src/drivers/mrc_cache/mrc_cache.c M src/include/cbmem.h M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/mainboard/emulation/qemu-power9/mainboard.c M src/northbridge/intel/e7505/memmap.c M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/x4x/memmap.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/cezanne/root_complex.c M src/soc/amd/glinda/root_complex.c M src/soc/amd/mendocino/root_complex.c M src/soc/amd/morgana/root_complex.c M src/soc/amd/picasso/root_complex.c M src/soc/amd/stoneyridge/memmap.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/romstage.c M src/soc/intel/baytrail/memmap.c M src/soc/intel/broadwell/memmap.c M src/soc/intel/common/block/systemagent/memmap.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/quark/memmap.c M src/soc/intel/quark/northcluster.c M src/soc/intel/xeon_sp/memmap.c M src/soc/intel/xeon_sp/uncore.c M src/soc/qualcomm/common/qclib.c M tests/lib/imd_cbmem-test.c 44 files changed, 69 insertions(+), 87 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/69163/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/69163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Gerrit-Change-Number: 69163 Gerrit-PatchSet: 14 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/prodrive/atlas: add unique DIMM locators in smbios type17
by Felix Held (Code Review) 17 Nov '22

17 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68632 ) Change subject: mb/prodrive/atlas: add unique DIMM locators in smbios type17 ...................................................................... mb/prodrive/atlas: add unique DIMM locators in smbios type17 This patch adds unique device-locators, bank-locators and asset-tags to the smbios type17 tables by making use of a DIMMs controller-ID. This way we avoid name clashes when, for example, two DIMMs share the same channel-ID and DIMM-ID but have a distinct controller-ID. Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com> Change-Id: I8aef79faa43f2475485f581c675ee152e580f678 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68632 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> --- M src/mainboard/prodrive/atlas/mainboard.c 1 file changed, 47 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved diff --git a/src/mainboard/prodrive/atlas/mainboard.c b/src/mainboard/prodrive/atlas/mainboard.c index 59c7cb7c..227e30a 100644 --- a/src/mainboard/prodrive/atlas/mainboard.c +++ b/src/mainboard/prodrive/atlas/mainboard.c @@ -5,9 +5,37 @@ #include <stdint.h> #include <gpio.h> #include <arch/io.h> +#include <string.h> +#include <smbios.h> #include "gpio.h" +void smbios_fill_dimm_locator(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + const u8 mc = dimm->ctrlr_num; + const u8 ch = dimm->channel_num; + const u8 mm = dimm->dimm_num; + + char dev_loc[40] = { "\x00" }; + snprintf(dev_loc, sizeof(dev_loc), "SO-DIMM %c%u", 'A' + mc, mm); + t->device_locator = smbios_add_string(t->eos, dev_loc); + + char bnk_loc[40] = { "\x00" }; + snprintf(bnk_loc, sizeof(bnk_loc), "BANK-%u-%u-%u", mc, ch, mm); + t->bank_locator = smbios_add_string(t->eos, bnk_loc); +} + +void smbios_fill_dimm_asset_tag(const struct dimm_info *dimm, struct smbios_type17 *t) +{ + const u8 mc = dimm->ctrlr_num; + const u8 ch = dimm->channel_num; + const u8 mm = dimm->dimm_num; + + char tag[40] = { "\x00" }; + snprintf(tag, sizeof(tag), "MC-%u-CH-%u-DIMM-%u", mc, ch, mm); + t->asset_tag = smbios_add_string(t->eos, tag); +} + static uint8_t get_hsid(void) { const gpio_t hsid_gpios[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/68632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aef79faa43f2475485f581c675ee152e580f678 Gerrit-Change-Number: 68632 Gerrit-PatchSet: 5 Gerrit-Owner: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill
by Felix Held (Code Review) 17 Nov '22

17 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68525 ) Change subject: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill ...................................................................... soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill The dimm_info structure (defined in src/include/memory_info.h) currently does not hold information about the DIMM's node/controller ID. This patch extends the dimm_info structure by adding a new field for the node ID, called node_num. Also, adapt the dimm_info_fill() function accordingly to populate the newly-added field. Background: These changes are necessary for the Atlas mainboard, where we are currently experiencing issues with the DIMMs device/bank locator. Our 2 DIMMs share the same CHANNEL and DIMM ID but have a distinct NODE ID. By looking at the smbios table we see Channel-0-DIMM-0 for both DIMMs. Thus, we need their NODE IDs in order to distinguish them. This patch was tested by building and booting for the Alderlake-P RVP board, which has the same DIMM slot configuration as the Prodrive Atlas mainboard. Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com> Change-Id: I6ffa5bdff0ba0e3c4a4a51f2419291fd1278cd68 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68525 Reviewed-by: Jonathan Zhang <jonzhang(a)fb.com> Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/include/memory_info.h M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/apollolake/meminit_util_apl.c M src/soc/intel/apollolake/meminit_util_glk.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/smbios.c M src/soc/intel/common/smbios.h M src/soc/intel/elkhartlake/romstage/romstage.c M src/soc/intel/icelake/romstage/romstage.c M src/soc/intel/jasperlake/romstage/romstage.c M src/soc/intel/meteorlake/romstage/romstage.c M src/soc/intel/skylake/romstage/romstage.c M src/soc/intel/tigerlake/romstage/romstage.c M src/soc/intel/xeon_sp/cpx/romstage.c 14 files changed, 68 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved Jonathan Zhang: Looks good to me, but someone else must approve diff --git a/src/include/memory_info.h b/src/include/memory_info.h index 676c170..7534a81 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -33,7 +33,17 @@ */ uint16_t ddr_frequency; uint8_t rank_per_dimm; + /* + * Memory-Controller-ID + */ + uint8_t ctrlr_num; + /* + * Channel-ID + */ uint8_t channel_num; + /* + * DIMM-ID + */ uint8_t dimm_num; uint8_t bank_locator; /* diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index f133910..3ee83bd 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -114,7 +114,8 @@ meminfo_hob->VddVoltage[memProfNum], meminfo_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c index 2f025b6..9432011 100644 --- a/src/soc/intel/apollolake/meminit_util_apl.c +++ b/src/soc/intel/apollolake/meminit_util_apl.c @@ -82,6 +82,7 @@ 0, 0, src_dimm->MfgId, + 0, 0); index++; } diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c index baf7862..9922b28 100644 --- a/src/soc/intel/apollolake/meminit_util_glk.c +++ b/src/soc/intel/apollolake/meminit_util_glk.c @@ -88,7 +88,8 @@ 0, 0, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 1ea91da..a417359 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -107,7 +107,8 @@ memory_info_hob->VddVoltage[memProfNum], memory_info_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + 0); index++; } } diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c index bd6de9f..5ab2dbc 100644 --- a/src/soc/intel/common/smbios.c +++ b/src/soc/intel/common/smbios.c @@ -14,7 +14,7 @@ u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, - bool ecc_support, u16 mod_id, u8 mod_type) + bool ecc_support, u16 mod_id, u8 mod_type, u8 ctrlr_id) { dimm->mod_id = mod_id; dimm->mod_type = mod_type; @@ -24,6 +24,8 @@ dimm->rank_per_dimm = rank_per_dimm; dimm->channel_num = channel_id; dimm->dimm_num = dimm_id; + dimm->ctrlr_num = ctrlr_id; + if (vdd_voltage > 0xFFFF) { dimm->vdd_voltage = 0xFFFF; } else { diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h index 06a35c7..410b2fd 100644 --- a/src/soc/intel/common/smbios.h +++ b/src/soc/intel/common/smbios.h @@ -14,6 +14,6 @@ u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id, const char *module_part_num, size_t module_part_number_size, const u8 *module_serial_num, u16 data_width, u32 vdd_voltage, - bool ecc_support, u16 mod_id, u8 mod_type); + bool ecc_support, u16 mod_id, u8 mod_type, u8 ctrlr_id); #endif /* _COMMON_SMBIOS_H_ */ diff --git a/src/soc/intel/elkhartlake/romstage/romstage.c b/src/soc/intel/elkhartlake/romstage/romstage.c index 39a5a332..427cee5 100644 --- a/src/soc/intel/elkhartlake/romstage/romstage.c +++ b/src/soc/intel/elkhartlake/romstage/romstage.c @@ -112,7 +112,8 @@ meminfo_hob->VddVoltage[memProfNum], meminfo_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c index 8575a3f..366ba3fa 100644 --- a/src/soc/intel/icelake/romstage/romstage.c +++ b/src/soc/intel/icelake/romstage/romstage.c @@ -96,7 +96,8 @@ memory_info_hob->VddVoltage[memProfNum], memory_info_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + 0); index++; } } diff --git a/src/soc/intel/jasperlake/romstage/romstage.c b/src/soc/intel/jasperlake/romstage/romstage.c index 3a2f8b4..9cec859 100644 --- a/src/soc/intel/jasperlake/romstage/romstage.c +++ b/src/soc/intel/jasperlake/romstage/romstage.c @@ -112,7 +112,8 @@ meminfo_hob->VddVoltage[memProfNum], meminfo_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/meteorlake/romstage/romstage.c b/src/soc/intel/meteorlake/romstage/romstage.c index 2d3b144..bac3caf 100644 --- a/src/soc/intel/meteorlake/romstage/romstage.c +++ b/src/soc/intel/meteorlake/romstage/romstage.c @@ -106,7 +106,8 @@ meminfo_hob->VddVoltage[memProfNum], meminfo_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 30401fc..02ae19a 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -111,7 +111,8 @@ memory_info_hob->VddVoltage[memProfNum], memory_info_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + 0); index++; } } diff --git a/src/soc/intel/tigerlake/romstage/romstage.c b/src/soc/intel/tigerlake/romstage/romstage.c index 3c6e634..c1aca17 100644 --- a/src/soc/intel/tigerlake/romstage/romstage.c +++ b/src/soc/intel/tigerlake/romstage/romstage.c @@ -112,7 +112,8 @@ meminfo_hob->VddVoltage[memProfNum], meminfo_hob->EccSupport, src_dimm->MfgId, - src_dimm->SpdModuleType); + src_dimm->SpdModuleType, + node); index++; } } diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c index 6ce5ef5..c0ecd65 100644 --- a/src/soc/intel/xeon_sp/cpx/romstage.c +++ b/src/soc/intel/xeon_sp/cpx/romstage.c @@ -131,7 +131,8 @@ vdd_voltage, true, /* hard-coded as ECC supported */ src_dimm.VendorID, - src_dimm.actKeyByte2); + src_dimm.actKeyByte2, + 0); index++; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68525 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ffa5bdff0ba0e3c4a4a51f2419291fd1278cd68 Gerrit-Change-Number: 68525 Gerrit-PatchSet: 8 Gerrit-Owner: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: weidong.wd(a)bytedance.com Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/intel/meteorlake: Log CSE RO write protection info for MTL
by Subrata Banik (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69571 ) Change subject: soc/intel/meteorlake: Log CSE RO write protection info for MTL ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69571 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb072a873a8b8323532799f5fc64f995c9f0a604 Gerrit-Change-Number: 69571 Gerrit-PatchSet: 7 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 17:38:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Print vars related to ME mfg mode
by Subrata Banik (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69739 ) Change subject: soc/intel/meteorlake: Print vars related to ME mfg mode ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec07c1f951fbbf51541917c8b99d19f2f12980b2 Gerrit-Change-Number: 69739 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 17:37:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Rename method is_eom to is_manuf_mode
by Subrata Banik (Code Review) 17 Nov '22

17 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69698 ) Change subject: soc/intel/meteorlake: Rename method is_eom to is_manuf_mode ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69698 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d2de3365126ba618c987c412c4e9784012f9e0b Gerrit-Change-Number: 69698 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Thu, 17 Nov 2022 17:37:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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