coreboot-gerrit October 2022

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[M] Change in coreboot[master]: mb/google/guybrush,skyrim,zork: rework FCH IRQ mapping table generation
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Nien, Martin Roth. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68850 ) Change subject: mb/google/guybrush,skyrim,zork: rework FCH IRQ mapping table generation ...................................................................... mb/google/guybrush,skyrim,zork: rework FCH IRQ mapping table generation This ports the changes to the way the fch_pic_routing and fch_apic_routing arrays get populated from Mandolin to Guybrush, Skyrim and Zork. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie550238dfa0d4c7cebe849966d40fa0b1984a0f6 --- M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c 3 files changed, 75 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/68850/1 diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index 150835c..8deb2ac 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -74,18 +74,32 @@ { PIRQ_HPET_H, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c index 0469c59..ca3c9aa 100644 --- a/src/mainboard/google/skyrim/mainboard.c +++ b/src/mainboard/google/skyrim/mainboard.c @@ -60,18 +60,32 @@ { PIRQ_HPET_H, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index a925851..aaa2548 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -78,18 +78,32 @@ { PIRQ_MISC2, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie550238dfa0d4c7cebe849966d40fa0b1984a0f6 Gerrit-Change-Number: 68850 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68849 ) Change subject: mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation ...................................................................... mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation This ports the changes to the way the fch_pic_routing and fch_apic_routing arrays get populated from Mandolin to Bilby, Birman, Chausie and Majolica. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia957056b60dafbc52a9809a4563a348ad7443376 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/majolica/mainboard.c 4 files changed, 95 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/68849/1 diff --git a/src/mainboard/amd/bilby/mainboard.c b/src/mainboard/amd/bilby/mainboard.c index c594a90..ca85684 100644 --- a/src/mainboard/amd/bilby/mainboard.c +++ b/src/mainboard/amd/bilby/mainboard.c @@ -56,18 +56,32 @@ { PIRQ_MISC2, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } diff --git a/src/mainboard/amd/birman/mainboard.c b/src/mainboard/amd/birman/mainboard.c index 4c641f5..7f369b8 100644 --- a/src/mainboard/amd/birman/mainboard.c +++ b/src/mainboard/amd/birman/mainboard.c @@ -60,18 +60,32 @@ { PIRQ_HPET_H, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } diff --git a/src/mainboard/amd/chausie/mainboard.c b/src/mainboard/amd/chausie/mainboard.c index c014236..9a6a296 100644 --- a/src/mainboard/amd/chausie/mainboard.c +++ b/src/mainboard/amd/chausie/mainboard.c @@ -58,18 +58,32 @@ { PIRQ_HPET_H, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 31ac515..90f4fcb 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -58,18 +58,32 @@ { PIRQ_HPET_H, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia957056b60dafbc52a9809a4563a348ad7443376 Gerrit-Change-Number: 68849 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/amd/mandolin: handle invalid intr_index values in init_tables
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68848 ) Change subject: mb/amd/mandolin: handle invalid intr_index values in init_tables ...................................................................... mb/amd/mandolin: handle invalid intr_index values in init_tables Make sure that the intr_index is valid to avoid out-of-bounds writes to the fch_pic_routing and fch_apic_routing arrays. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I45ab115f3814b212243c4f6cf706daf77b6ff3b2 --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/68848/1 diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 1eb3329..397179a 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -69,6 +69,12 @@ memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } -- To view, visit https://review.coreboot.org/c/coreboot/+/68848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45ab115f3814b212243c4f6cf706daf77b6ff3b2 Gerrit-Change-Number: 68848 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/amd/mandolin: introduce mb_get_fch_irq_mapping
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68847 ) Change subject: mb/amd/mandolin: introduce mb_get_fch_irq_mapping ...................................................................... mb/amd/mandolin: introduce mb_get_fch_irq_mapping Introduce mb_get_fch_irq_mapping to access the FCH IRQ routing mapping information and use it in init_tables to get the mapping instead of directly accessing the array's contents. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I9c39ea9de5ebbf70d2c5a87bfdfe270796548c5c --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 30 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/68847/1 diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 6c4e545..1eb3329 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -51,18 +51,26 @@ { PIRQ_MISC2, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c39ea9de5ebbf70d2c5a87bfdfe270796548c5c Gerrit-Change-Number: 68847 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/amd,google: unify fch_irq_routing struct instance name
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Jason Nien, Martin Roth, Fred Reitberger. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68846 ) Change subject: mb/amd,google: unify fch_irq_routing struct instance name ...................................................................... mb/amd,google: unify fch_irq_routing struct instance name Use the same fch_irq_map name in all mainboards using the Picasso, Cezanne, Mendocino and Morgana instead of using a mainboard-specific name. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I035cffb9c6c8afd6bd115831e8eed4a395e2a7fc --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/amd/mandolin/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c 8 files changed, 38 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/68846/1 diff --git a/src/mainboard/amd/bilby/mainboard.c b/src/mainboard/amd/bilby/mainboard.c index c931053..c594a90 100644 --- a/src/mainboard/amd/bilby/mainboard.c +++ b/src/mainboard/amd/bilby/mainboard.c @@ -31,7 +31,7 @@ static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES]; -static const struct fch_irq_routing bilby_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 8, 16 }, { PIRQ_B, 10, 17 }, { PIRQ_C, 11, 18 }, @@ -64,8 +64,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(bilby_fch); i++) { - entry = bilby_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/birman/mainboard.c b/src/mainboard/amd/birman/mainboard.c index 8b27e37..4c641f5 100644 --- a/src/mainboard/amd/birman/mainboard.c +++ b/src/mainboard/amd/birman/mainboard.c @@ -31,7 +31,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing birman_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -68,8 +68,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(birman_fch); i++) { - entry = birman_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/chausie/mainboard.c b/src/mainboard/amd/chausie/mainboard.c index 0318e43..c014236 100644 --- a/src/mainboard/amd/chausie/mainboard.c +++ b/src/mainboard/amd/chausie/mainboard.c @@ -29,7 +29,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing chausie_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -66,8 +66,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(chausie_fch); i++) { - entry = chausie_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 32b29e4..31ac515 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -28,7 +28,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing majolica_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -66,8 +66,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(majolica_fch); i++) { - entry = majolica_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 43fa415..6c4e545 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -26,7 +26,7 @@ static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES]; -static const struct fch_irq_routing mandolin_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 8, 16 }, { PIRQ_B, 10, 17 }, { PIRQ_C, 11, 18 }, @@ -59,8 +59,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(mandolin_fch); i++) { - entry = mandolin_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index d3a45c1..150835c 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -44,7 +44,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing guybrush_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -82,8 +82,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(guybrush_fch); i++) { - entry = guybrush_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c index 3ddcf42..0469c59 100644 --- a/src/mainboard/google/skyrim/mainboard.c +++ b/src/mainboard/google/skyrim/mainboard.c @@ -31,7 +31,7 @@ * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing skyrim_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -68,8 +68,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(skyrim_fch); i++) { - entry = skyrim_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index bab79b4..a925851 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -53,7 +53,7 @@ * 9: acpi <- soc/amd/common/acpi/lpc.asl * 12: i8042 <- ec/google/chromeec/acpi/superio.asl */ -static const struct fch_irq_routing fch_pirq[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 6, PIRQ_NC }, { PIRQ_B, 13, PIRQ_NC }, { PIRQ_C, 14, PIRQ_NC }, @@ -86,8 +86,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_pirq); i++) { - entry = fch_pirq + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } -- To view, visit https://review.coreboot.org/c/coreboot/+/68846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I035cffb9c6c8afd6bd115831e8eed4a395e2a7fc Gerrit-Change-Number: 68846 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/guybrush,skyrim: add missing string.h include
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Nien, Martin Roth. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68845 ) Change subject: mb/google/guybrush,skyrim: add missing string.h include ...................................................................... mb/google/guybrush,skyrim: add missing string.h include string.h defines the memset function. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I286557d6ad83990bc101eaa930bde04345859c0b --- M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/skyrim/mainboard.c 2 files changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/68845/1 diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index bfb0f88..d3a45c1 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -12,6 +12,7 @@ #include <gpio.h> #include <soc/acpi.h> #include <variant/ec.h> +#include <string.h> #define BACKLIGHT_GPIO GPIO_129 #define WWAN_AUX_RST_GPIO GPIO_18 diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c index 58e11f5..3ddcf42 100644 --- a/src/mainboard/google/skyrim/mainboard.c +++ b/src/mainboard/google/skyrim/mainboard.c @@ -6,6 +6,7 @@ #include <console/console.h> #include <device/device.h> #include <soc/acpi.h> +#include <string.h> #include <variant/ec.h> /* -- To view, visit https://review.coreboot.org/c/coreboot/+/68845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I286557d6ad83990bc101eaa930bde04345859c0b Gerrit-Change-Number: 68845 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/amd/bilby,mandolin: add missing string.h include
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68844 ) Change subject: mb/amd/bilby,mandolin: add missing string.h include ...................................................................... mb/amd/bilby,mandolin: add missing string.h include string.h defines the memset function. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I242a0382e7020681b6c3a25f75a2a91cbccbe815 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/mandolin/mainboard.c 2 files changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/68844/1 diff --git a/src/mainboard/amd/bilby/mainboard.c b/src/mainboard/amd/bilby/mainboard.c index 324c72e..c931053 100644 --- a/src/mainboard/amd/bilby/mainboard.c +++ b/src/mainboard/amd/bilby/mainboard.c @@ -9,6 +9,7 @@ #include <soc/southbridge.h> #include <soc/pci_devs.h> #include <soc/platform_descriptors.h> +#include <string.h> #include <types.h> #include <commonlib/helpers.h> #include <soc/amd/picasso/chip.h> diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 6ae3266..43fa415 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -7,6 +7,7 @@ #include <soc/cpu.h> #include <soc/southbridge.h> #include <soc/pci_devs.h> +#include <string.h> #include <types.h> #include <commonlib/helpers.h> #include <soc/amd/picasso/chip.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/68844 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I242a0382e7020681b6c3a25f75a2a91cbccbe815 Gerrit-Change-Number: 68844 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/mendocino: Enable GPP clk req disabling for disabled devices
by Felix Held (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Paul Menzel, Martin Roth, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68139 ) Change subject: soc/amd/mendocino: Enable GPP clk req disabling for disabled devices ...................................................................... Patch Set 8: Code-Review+2 (1 comment) File src/soc/amd/mendocino/fch.c: https://review.coreboot.org/c/coreboot/+/68139/comment/471e0c81_2cc047b4 PS6, Line 149: GPP_CLK_OUTPUT_COUNT > i think ARRAY_SIZE(cfg->gpp_clk_config) can be used here; if not, this needs to be changed to GPP_CL […] thanks for looking into this; this should make the code future-proof -- To view, visit https://review.coreboot.org/c/coreboot/+/68139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6c840f2fa3f9358f58c0386134d23511ff880248 Gerrit-Change-Number: 68139 Gerrit-PatchSet: 8 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 21:57:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/cezanne: Factor out common GPP clk req code
by Felix Held (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68138 ) Change subject: soc/amd/cezanne: Factor out common GPP clk req code ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9a4c72d8e980993c76a1b128f17b65b0db972a03 Gerrit-Change-Number: 68138 Gerrit-PatchSet: 8 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 21:55:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/cezanne: Update GPP clk req code to use ARRAY_SIZE
by Felix Held (Code Review) 25 Oct '22

25 Oct '22

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68866 ) Change subject: soc/amd/cezanne: Update GPP clk req code to use ARRAY_SIZE ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ff555843c6f5aa38acd8300e0dc2da4e33fb4b7 Gerrit-Change-Number: 68866 Gerrit-PatchSet: 2 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 21:55:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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