coreboot-gerrit October 2022

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[L] Change in coreboot[master]: soc/amd: commonize generation of the PIC/APIC mapping tables
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68853 to look at the new patch set (#4). Change subject: soc/amd: commonize generation of the PIC/APIC mapping tables ...................................................................... soc/amd: commonize generation of the PIC/APIC mapping tables Now that we have a common init_tables in all mainboards using AMD SoCs, both the population of the fch_pic_routing and fch_apic_routing arrays and the definition of those arrays can be moved to the common AMD SoC code to not have the code duplicated in all mainboards. BUG=b:182782749 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Suggested-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/amd/mandolin/mainboard.c M src/mainboard/amd/pademelon/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c M src/soc/amd/common/block/include/amdblocks/amd_pci_util.h M src/soc/amd/common/block/pci/amd_pci_util.c 13 files changed, 94 insertions(+), 530 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/68853/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 Gerrit-Change-Number: 68853 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/amd: commonize generation of the PIC/APIC mapping tables
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68853 to look at the new patch set (#3). Change subject: soc/amd: commonize generation of the PIC/APIC mapping tables ...................................................................... soc/amd: commonize generation of the PIC/APIC mapping tables Now that we have a common init_tables in all mainboards using AMD SoCs, both the population of the fch_pic_routing and fch_apic_routing arrays and the definition of those arrays can be moved to the common AMD SoC code to not have the code duplicated in all mainboards. BUG=b:182782749 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Suggested-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/amd/mandolin/mainboard.c M src/mainboard/amd/pademelon/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c M src/soc/amd/common/block/include/amdblocks/amd_pci_util.h M src/soc/amd/common/block/pci/amd_pci_util.c 13 files changed, 94 insertions(+), 520 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/68853/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 Gerrit-Change-Number: 68853 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/amd: commonize generation of the PIC/APIC mapping tables
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68853 to look at the new patch set (#2). Change subject: soc/amd: commonize generation of the PIC/APIC mapping tables ...................................................................... soc/amd: commonize generation of the PIC/APIC mapping tables Now that we have a common init_tables in all mainboards using AMD SoCs, both the population of the fch_pic_routing and fch_apic_routing arrays and the definition of those arrays can be moved to the common AMD SoC code to not have the code duplicated in all mainboards. BUG=b:182782749 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Suggested-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/amd/mandolin/mainboard.c M src/mainboard/amd/pademelon/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c M src/soc/amd/common/block/include/amdblocks/amd_pci_util.h M src/soc/amd/common/block/pci/amd_pci_util.c 13 files changed, 93 insertions(+), 520 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/68853/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68853 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c65eca258272f0ef7dec3ece6236f5d00954c66 Gerrit-Change-Number: 68853 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/amd/gardenia,pademelon: rewrite IRQ mapping handling
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/68852 ) Change subject: mb/amd/gardenia,pademelon: rewrite IRQ mapping handling ...................................................................... mb/amd/gardenia,pademelon: rewrite IRQ mapping handling Gardenia and Pademelon had the same mainboard_picr_data and mainboard_intr_data data arrays. Compared to Kahlee there were 4 differences for PIRQ_F, PIRQ_SCI, PIRQ_SD and PIRQ_SATA in the IRQ data arrays. TODO: Verify that the change on Kahlee doesn't break anything there. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia460b467990be7c3e6261440505988a9770ea084 --- M src/mainboard/amd/gardenia/mainboard.c M src/mainboard/amd/pademelon/mainboard.c 2 files changed, 151 insertions(+), 82 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/68852/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia460b467990be7c3e6261440505988a9770ea084 Gerrit-Change-Number: 68852 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Hello Jason Glenesk, Fred Reitberger, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68849 to look at the new patch set (#2). Change subject: mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation ...................................................................... mb/amd/bilby,birman,chausie,majolica: rework FCH IRQ mapping generation This ports the changes to the way the fch_pic_routing and fch_apic_routing arrays get populated from Mandolin to Bilby, Birman, Chausie and Majolica. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia957056b60dafbc52a9809a4563a348ad7443376 --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/majolica/mainboard.c 4 files changed, 98 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/68849/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68849 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia957056b60dafbc52a9809a4563a348ad7443376 Gerrit-Change-Number: 68849 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: 3rdparty/amd_blobs:Advance submodule pointer
by Martin Roth (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Martin L Roth, Jason Glenesk. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68870 ) Change subject: 3rdparty/amd_blobs:Advance submodule pointer ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d024f9e5dcd73abed9123b6a6255fe0c28fd4a Gerrit-Change-Number: 68870 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 23:20:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex: Disable tbt_pcie_rp3 root port
by John Zhao (Code Review) 26 Oct '22

26 Oct '22

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68854 ) Change subject: mb/google/rex: Disable tbt_pcie_rp3 root port ...................................................................... mb/google/rex: Disable tbt_pcie_rp3 root port Extra memory resource allocation is needed for bridge once a TBT PCIe root port is enabled to support the hot plug feature. There is report that touch screen device is not probed once all 4 ports are enabled. This change disables the tbt_pcie_rp3(00:07.3) since it is not used. BUG=b:254207628 TEST=Booted to OS and queried input device events via evtest. Verified the touch screen ELAN6918 was shown up. Change-Id: Ia5c1d657c0ad0482619d739f8949bc9168eac25b Signed-off-by: zhaojohn <john.zhao(a)intel.com> --- M src/mainboard/google/rex/variants/rex0/overridetree.cb 1 file changed, 20 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/68854/1 diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index 2e1c159..c13105a 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -138,7 +138,7 @@ device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end device ref tbt_pcie_rp2 on end - device ref tbt_pcie_rp3 on end + device ref tbt_pcie_rp3 off end device ref tcss_xhci on chip drivers/usb/acpi device ref tcss_root_hub on -- To view, visit https://review.coreboot.org/c/coreboot/+/68854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5c1d657c0ad0482619d739f8949bc9168eac25b Gerrit-Change-Number: 68854 Gerrit-PatchSet: 1 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: src/drivers/uart: Add definition of FIFO enabled in IIR
by 9elements QA (Code Review) 26 Oct '22

26 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68566 ) Change subject: src/drivers/uart: Add definition of FIFO enabled in IIR ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 12 / 2 / 14 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130753 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130752 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/130751 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/130750 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/130749 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130748 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/130747 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/130746 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/130745 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/130744 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/130742 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130741 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/130739 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/130738 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I12e8566822693004418cf83cae466dc3e2d612c4 Gerrit-Change-Number: 68566 Gerrit-PatchSet: 4 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 23:16:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: 3rdparty/amd_blobs:Advance submodule pointer
by Jason Glenesk (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Martin L Roth. Jason Glenesk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68870 ) Change subject: 3rdparty/amd_blobs:Advance submodule pointer ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please help to review -- To view, visit https://review.coreboot.org/c/coreboot/+/68870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d024f9e5dcd73abed9123b6a6255fe0c28fd4a Gerrit-Change-Number: 68870 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Oct 2022 23:11:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: 3rdparty/amd_blobs:Advance submodule pointer
by Jason Glenesk (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Jason Glenesk. Hello Jason Glenesk, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/68870 to review the following change. Change subject: 3rdparty/amd_blobs:Advance submodule pointer ...................................................................... 3rdparty/amd_blobs:Advance submodule pointer This picks up the following changes: 4ed38e55 glinda: add placeholder blobs 6de2d3c2 mendocino: Add all blobs from PI 1.0.0.3 Change-Id: Ic2d024f9e5dcd73abed9123b6a6255fe0c28fd4a Signed-off-by: Jason Glenesk <jason.glenesk(a)gmail.com> --- M 3rdparty/amd_blobs 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/68870/1 diff --git a/3rdparty/amd_blobs b/3rdparty/amd_blobs index 234dc70..4ed38e5 160000 --- a/3rdparty/amd_blobs +++ b/3rdparty/amd_blobs @@ -1 +1 @@ -Subproject commit 234dc706701b8c02f8c70dd3089544c0097a09bd +Subproject commit 4ed38e55a098024166f8cdbef24239bce453c2e5 -- To view, visit https://review.coreboot.org/c/coreboot/+/68870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d024f9e5dcd73abed9123b6a6255fe0c28fd4a Gerrit-Change-Number: 68870 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2022