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Change subject: soc/amd/cezanne/mca: add empty mca_check_all_banks function
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/amd: move check_mca prototype to soc/amd/common/blocks/include
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Change subject: soc/amd/stoneyridge: add and use mca_is_valid_bank & mca_get_bank_name
......................................................................
Patch Set 2: Code-Review+2
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Change subject: soc/amd/picasso: implement and use mca_is_valid_bank
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Change subject: soc/amd/picasso: add missing banks to mca_bank_name array
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Change subject: soc/amd/picasso: add missing banks to mca_bank_name array
......................................................................
Patch Set 2:
(1 comment)
File src/soc/amd/picasso/mca.c:
https://review.coreboot.org/c/coreboot/+/56273/comment/86120075_481856af
PS1, Line 138: [ 0] = "Load-store unit",
i'd say that moving the additional space from here to between the ] and the = doesn't make it look better...
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Change subject: mb/intel/adlrvp: Update PMC Descriptor for Alder lake A0(906a0h) silicon
......................................................................
Patch Set 5:
(5 comments)
File src/mainboard/intel/adlrvp/bootblock.c:
https://review.coreboot.org/c/coreboot/+/56073/comment/1f3eb013_cdfef36f
PS5, Line 20: X
nit: 0x10?
https://review.coreboot.org/c/coreboot/+/56073/comment/477fcec6_b9ec2f97
PS5, Line 27: 0xFF0A55A
nit:
#define FLVALSIG 0xFF0A55A
https://review.coreboot.org/c/coreboot/+/56073/comment/bb6761cc_bc93d1f3
PS5, Line 35: 1
nit: BIT(0)
https://review.coreboot.org/c/coreboot/+/56073/comment/53c90ab0_8e87f9c3
PS5, Line 62: if (si_desc_buf[PMC_DESC_7_BYTE3] == 0x40) {
if (si_desc_buf[PMC_DESC_7_BYTE3] != 0x40) {
printk(BIOS_DEBUG, "Update of PMC Descriptor is not required!\n");
return;
}
si_desc_buf[PMC_DESC_7_BYTE3] = 0x44;
...
you would save one tab and line 76 which is > 96 would get normalized in that way
https://review.coreboot.org/c/coreboot/+/56073/comment/57a31ce5_6b15db82
PS5, Line 78: 1
nit: true
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Change subject: soc/amd/cezanne/mca: add empty mca_check_all_banks function
......................................................................
soc/amd/cezanne/mca: add empty mca_check_all_banks function
This will allow factoring out and moving check_mca() to soc/amd/common.
Change-Id: I92c7657baef17c248a5aef1eda268e9647502837
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/amd/cezanne/mca.c
1 file changed, 6 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/56280/1
diff --git a/src/soc/amd/cezanne/mca.c b/src/soc/amd/cezanne/mca.c
index 24a7788..a8d9702 100644
--- a/src/soc/amd/cezanne/mca.c
+++ b/src/soc/amd/cezanne/mca.c
@@ -3,11 +3,15 @@
#include <amdblocks/mca.h>
#include <cpu/x86/msr.h>
+static void mca_check_all_banks(void)
+{
+ /* TODO: Implement MCAX register checking and BERT table generation. */
+}
+
/* Check the Machine Check Architecture Extension registers */
void check_mca(void)
{
- /* TODO: Implement MCAX register checking and BERT table generation. */
-
+ mca_check_all_banks();
/* mca_clear_status uses the MCA registers and not the MCAX ones. Since they are
aliases, we can use either set of registers. */
mca_clear_status();
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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson,
I'd like you to reexamine a change. Please visit
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Change subject: soc/amd/picasso: add missing banks to mca_bank_name array
......................................................................
soc/amd/picasso: add missing banks to mca_bank_name array
Also use array indices for the initialization.
TEST=Checked with the public Picasso PPR #55570-B1 Rev 3.16
Change-Id: I10a65210da73e64b67d613609fcc0f9a245a81fb
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/amd/picasso/mca.c
1 file changed, 23 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/56273/2
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