coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: console: Allow configuring log level through CBFS
by Patrick Georgi (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Marc Jones, Stefan Reinauer, Julius Werner, Patrick Rudolph. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45208 ) Change subject: console: Allow configuring log level through CBFS ...................................................................... Patch Set 17: (1 comment) File tests/console/Makefile.inc: https://review.coreboot.org/c/coreboot/+/45208/comment/b1b9e418_80635c36 PS14, Line 10: routing-with-cbmemcons-test-cflags += -I 3rdparty/vboot/firmware/include > I still don't really understand this. […] Same include path for which architecture and chipset? The test system can draw in very precise combinations because that way it can emulate whatever environment is needed. I _suppose_ one could make the case that with the vboot code used in cbfs it's pretty much universally required and therefore should become part of the default search path for unit tests, but that's a slightly different conversation. -- To view, visit https://review.coreboot.org/c/coreboot/+/45208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4f1f5c45e5ea889176d04e0db438ca2aa7c536ee Gerrit-Change-Number: 45208 Gerrit-PatchSet: 17 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Dossym Nurmukhanov <dossym(a)google.com> Gerrit-Reviewer: Greg Edelston <gredelston(a)google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:31:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/usb/acpi: Avoid dereferencing maybe-NULL pointer
by Tim Wawrzynczak (Code Review) 14 Jul '21

14 Jul '21

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56266 ) Change subject: drivers/usb/acpi: Avoid dereferencing maybe-NULL pointer ...................................................................... drivers/usb/acpi: Avoid dereferencing maybe-NULL pointer Do not dereference a pointer before checking whether it is NULL. Change-Id: Icbe9ae99d91fd587d8e56cf3a0dcb59834ee6d07 Found-by: Coverity CID 1458232 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56266 Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/usb_acpi.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Raul Rangel: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index 8ada939..fb9f7f1 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -125,12 +125,13 @@ bool usb_acpi_get_pld(const struct device *usb_device, struct acpi_pld *pld) { - struct drivers_usb_acpi_config *config = usb_device->chip_info; + struct drivers_usb_acpi_config *config; if (!usb_device || !usb_device->chip_info || usb_device->chip_ops != &drivers_usb_acpi_ops) return false; + config = usb_device->chip_info; if (config->use_custom_pld) *pld = config->custom_pld; else -- To view, visit https://review.coreboot.org/c/coreboot/+/56266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icbe9ae99d91fd587d8e56cf3a0dcb59834ee6d07 Gerrit-Change-Number: 56266 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers/usb/acpi: Replace unneeded `memcpy` use
by Tim Wawrzynczak (Code Review) 14 Jul '21

14 Jul '21

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56265 ) Change subject: drivers/usb/acpi: Replace unneeded `memcpy` use ...................................................................... drivers/usb/acpi: Replace unneeded `memcpy` use A regular assignment works just as well and also allows type-checking. It also avoids a common mistake where `sizeof` is applied to a pointer to obtain the size of the data it points to, without dereferencing it. Found-by: Coverity CID 1458231 Change-Id: I7ed05322c3c911f3da4145f81e4d9760a275fec2 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56265 Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/usb_acpi.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Raul Rangel: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index a0dadff..8ada939 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -132,7 +132,7 @@ return false; if (config->use_custom_pld) - memcpy(pld, &config->custom_pld, sizeof(pld)); + *pld = config->custom_pld; else acpi_pld_fill_usb(pld, config->type, &config->group); -- To view, visit https://review.coreboot.org/c/coreboot/+/56265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ed05322c3c911f3da4145f81e4d9760a275fec2 Gerrit-Change-Number: 56265 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/common/block/acpi: Move pep.asl to acpigen
by Angel Pons (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Tim Wawrzynczak, Michael Niewöhner, Angel Pons, Patrick Rudolph, Karthik Ramasubramanian. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56004 ) Change subject: soc/intel/common/block/acpi: Move pep.asl to acpigen ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie83722e0ed5792e338fc5c39a57eef43b7464e3b Gerrit-Change-Number: 56004 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:26:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: add BASEBOARD_DIR to support different baseboard
by Tim Wawrzynczak (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Furquan Shaikh, EricR Lai, Zhuohao Lee. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56308 ) Change subject: mb/google/brya: add BASEBOARD_DIR to support different baseboard ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Let others look -- To view, visit https://review.coreboot.org/c/coreboot/+/56308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic99e42dbbd27fa3e1f6cb3a1b5daee1c8c7b1083 Gerrit-Change-Number: 56308 Gerrit-PatchSet: 1 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:26:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: console: Handle verstage as "first non-bootblock stage"
by Julius Werner (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Nico Huber. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56210 ) Change subject: console: Handle verstage as "first non-bootblock stage" ...................................................................... Patch Set 1: (1 comment) File src/console/init.c: https://review.coreboot.org/c/coreboot/+/56210/comment/8f5930cd_f24ef36d PS1, Line 15: #endif > For one, some stages are _pretty_ packed, e.g. verstage on google/veyron. […] Okay, I think we're all confused about what we're talking about now. ^^ What I mean is using ENV_INITIAL_STAGE instead of the the FIRST_CONSOLE macro that gets defined here. So the code in init_log_level() should just read: console_loglevel = get_console_loglevel(); if (!ENV_INITIAL_STAGE) console_loglevel = get_uint_option("debug_level", console_loglevel); (and then the stuff Patrick adds in the next patch would also fall under that). That way we don't need an extra FIRST_CONSOLE macro and all the vboot stage ordering stuff has already been taken care of correctly in the definition of ENV_INITIAL_STAGE. If the question is why we need any check at all and can't just call get_uint_option() in every stage... I don't know, I'm not super familiar with how CMOS stuff works on x86. Are there any platforms where accessing CMOS requires any sort of platform-specific setup beforehand? For CBFS that is definitely the case, so at least for CBFS we need to prevent accesses in the first stage. For CMOS, if you're sure that no point to call it would be too early, I guess it doesn't matter. -- To view, visit https://review.coreboot.org/c/coreboot/+/56210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I494a33483e306a049aa0c8137a118644fc28177e Gerrit-Change-Number: 56210 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:24:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/acpi: Move pep.asl to acpigen
by Furquan Shaikh (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Tim Wawrzynczak, Michael Niewöhner, Angel Pons, Patrick Rudolph, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56004 ) Change subject: soc/intel/common/block/acpi: Move pep.asl to acpigen ...................................................................... Patch Set 3: (6 comments) File src/soc/intel/common/block/acpi/pep.c: https://review.coreboot.org/c/coreboot/+/56004/comment/295def7b_fadcb874 PS3, Line 6: #include <soc/pci_devs.h> Is this required? https://review.coreboot.org/c/coreboot/+/56004/comment/c9ca62ba_c974b33d PS3, Line 27: 1 << 6 | 1 << 5 | 1 << 1 | 1 << 0 Rather than hardcoding this, can this function be made to calculate it: ``` for (i = 0, fns = 0; i < lpi_s0_helpers; i++) { if (lpi_s0_helpers[i] != lpi_empty) fns |= BIT(i); } ``` https://review.coreboot.org/c/coreboot/+/56004/comment/91a52d37_14c9cd5c PS3, Line 49: ACPI_DEVICE_SLEEP_D0 This should be `0` to indicate device disabled. This field is not really related to D-state. https://review.coreboot.org/c/coreboot/+/56004/comment/d0511592_a0197c88 PS3, Line 74: acpigen_write_if_cond_ref_of Something to think about for a future change: We ideally don't need the cond_ref_of here if we can provide an infrastructure to allow any drivers/mainboard to add their own hooks for S0ix. I am thinking something like s0ix_hooks which provide: `entry_fn`, `exit_fn`, `entry_fn_acpi_path`, `exit_fn_acpi_path`. Then lpi_s0ix_entry/lpi_s0ix_exit wouldn't need the hardcoded _HOOK macros as well as cond_ref_of to ensure that the objects actually exist. https://review.coreboot.org/c/coreboot/+/56004/comment/6a77b251_bda6ebae PS3, Line 124: struct const https://review.coreboot.org/c/coreboot/+/56004/comment/640ac28d_51439eeb PS3, Line 128: const char *scope = acpi_device_scope(dev); : : acpigen_write_scope(scope); The assumption here is that the caller is passing in PMC device which lives under \_SB.PCI and so using the scope of the device is fine. Why not simply hardcode the scope to \_SB.PCI here because that is what we really want? You can drop the parameter `dev` to this function completely. -- To view, visit https://review.coreboot.org/c/coreboot/+/56004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie83722e0ed5792e338fc5c39a57eef43b7464e3b Gerrit-Change-Number: 56004 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:22:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/blocks/cpu/mca: factor out common BERT helper functions
by Martin Roth (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56284 ) Change subject: soc/amd/common/blocks/cpu/mca: factor out common BERT helper functions ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56284 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03365c3820cbe7277f14adc5460e892fb8d9b7a5 Gerrit-Change-Number: 56284 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:18:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: qualcomm/sc7280: gpio: Support eGPIO scheme
by Julius Werner (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Taniya Das, Paul Menzel, mturney mturney. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55078 ) Change subject: qualcomm/sc7280: gpio: Support eGPIO scheme ...................................................................... Patch Set 12: (1 comment) File src/soc/qualcomm/sc7280/sc7280_egpio.c: https://review.coreboot.org/c/coreboot/+/55078/comment/764fdde7_26c2e693 PS3, Line 56: setbits32(&regs->cfg, BIT(EGPIO_CFG_EN)); > >>> […] Sorry, I still don't understand. The code you wrote here runs on the CPU, right? Just as kernel code would. So why can't the kernel run this code during GPIO/pinmux probe instead? Are the EGPIO_CFG registers you're writing here protected in some way so that they would become inaccessible later in the boot flow, or at a lower exception level? -- To view, visit https://review.coreboot.org/c/coreboot/+/55078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2c54a14c50fb7b5921d1961d2de83098ed2d4358 Gerrit-Change-Number: 55078 Gerrit-PatchSet: 12 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <tdas(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:15:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Taniya Das <tdas(a)codeaurora.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/*/mca: factor out BERT entry generation to soc/amd/common
by Martin Roth (Code Review) 14 Jul '21

14 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56283 ) Change subject: soc/amd/*/mca: factor out BERT entry generation to soc/amd/common ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56283 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I960a2f384f11e4aa5aa2eb0645b6046f9f2f8847 Gerrit-Change-Number: 56283 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 14 Jul 2021 21:15:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit July 2021