coreboot-gerrit May 2021

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Change in libgfxinit[master]: gfx dp_aux: Add I2C_{Read,Write}_Byte procedures
by Angel Pons (Code Review) 01 May '21

01 May '21

Attention is currently required from: Nico Huber, Arthur Heymans. Hello Nico Huber, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/libgfxinit/+/51122 to look at the new patch set (#3). Change subject: gfx dp_aux: Add I2C_{Read,Write}_Byte procedures ...................................................................... gfx dp_aux: Add I2C_{Read,Write}_Byte procedures These will be used to switch LSPCON modes in subsequent commits. Change-Id: Ib66b073691282d0c89710b0591484d4123e039b7 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M common/hw-gfx-dp_aux_ch.adb M common/hw-gfx-dp_aux_ch.ads 2 files changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/22/51122/3 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Ib66b073691282d0c89710b0591484d4123e039b7 Gerrit-Change-Number: 51122 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: option: Add API for mainboard provided options
by Angel Pons (Code Review) 01 May '21

01 May '21

Attention is currently required from: Bill XIE, Nico Huber, Patrick Rudolph, Christian Walter, Julius Werner, Kyösti Mälkki. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52601 ) Change subject: option: Add API for mainboard provided options ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I think this is not a bad idea in general, but it doesn't seem like […] I agree. -- To view, visit https://review.coreboot.org/c/coreboot/+/52601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5bbb5b3353d862c5533f90ced4824eec27ca3b9 Gerrit-Change-Number: 52601 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 01 May 2021 18:05:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Add Kconfig option for LGA1151v2
by Nico Huber (Code Review) 01 May '21

01 May '21

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52692 ) Change subject: soc/intel/skylake: Add Kconfig option for LGA1151v2 ...................................................................... soc/intel/skylake: Add Kconfig option for LGA1151v2 Provide a SOC_INTEL_SKYLAKE_LGA1151_V2 option to select correct defaults for the combination of a Union Point PCH with LGA1151v2. As of the year 2021 it's common for motherboards with Z370, H310C or B365 PCHs, which are meant to be paired with Coffee Lake CPUs. Intel provides AmberLakeFspBinPkg to support this combination, which implements Intel FSP External Architecture Specification v2.1. Details: 1) Provide SOC_INTEL_SKYLAKE_LGA1151_V2 option that selects PLATFORM_USES_FSP2_1, SOC_INTEL_COMMON_SKYLAKE_BASE and SKYLAKE_SOC_PCH_H. 2) Add Amberlake FSP support. If SOC_INTEL_SKYLAKE_LGA1151_V2 is set, use AbmerLakeFspBinPkg instead of KabylakeFspBinPkg. 3) Enable Coffee Lake CPUs support. If SOC_INTEL_SKYLAKE_LGA1151_V2 is set, select MAINBOARD_SUPPORTS_COFFEELAKE_CPU. 4) Increase stack and heap size in CAR. If FSP_USES_CB_STACK is set (it's selected by PLATFORM_USES_FSP2_1), update DCACHE_BSP_STACK_SIZE and FSP_TEMP_RAM_SIZE values. 5) Update maximal number of supported CPUs. If MAINBOARD_SUPPORTS_COFFEELAKE_CPU is set, set MAX_CPUS to 16. Signed-off-by: Timofey Komarov <happycorsair(a)yandex.ru> Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Reviewed-on: https://review.coreboot.org/c/coreboot/+/52692 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/intel/skylake/Kconfig 1 file changed, 26 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index a8f220f..bd4c13e 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -13,6 +13,14 @@ help Intel Kabylake support +config SOC_INTEL_SKYLAKE_LGA1151_V2 + bool + select PLATFORM_USES_FSP2_1 + select SOC_INTEL_COMMON_SKYLAKE_BASE + select SKYLAKE_SOC_PCH_H + help + Selected by mainboards with a LGA1151 v2 socket and a Z370, H310C or B365 PCH + if SOC_INTEL_COMMON_SKYLAKE_BASE config CPU_SPECIFIC_OPTIONS @@ -85,6 +93,7 @@ config MAX_CPUS int + default 16 if MAINBOARD_SUPPORTS_COFFEELAKE_CPU default 8 config FSP_HYPERTHREADING @@ -125,11 +134,21 @@ config DCACHE_BSP_STACK_SIZE hex + default 0x20400 if FSP_USES_CB_STACK default 0x4000 help The amount of anticipated stack usage in CAR by bootblock and other stages. +config FSP_TEMP_RAM_SIZE + hex + depends on FSP_USES_CB_STACK + default 0x10000 + help + The amount of anticipated heap usage in CAR by FSP. + Refer to Platform FSP integration guide document to know + the exact FSP requirement for Heap setup. + config EXCLUDE_NATIVE_SD_INTERFACE bool default n @@ -234,12 +253,14 @@ help Include DSP firmware settings for DA7219 headset codec. +# Use KabylakeFsp for both Skylake and Kabylake as it supports both. +# SkylakeFsp is FSP 1.1 and therefore incompatible. config FSP_HEADER_PATH - # Use KabylakeFsp for both Skylake and Kabylake as it supports both. - # SkylakeFsp is FSP 1.1 and therefore incompatible. + default "3rdparty/fsp/AmberLakeFspBinPkg/Include/" if SOC_INTEL_SKYLAKE_LGA1151_V2 default "3rdparty/fsp/KabylakeFspBinPkg/Include/" config FSP_FD_PATH + default "3rdparty/fsp/AmberLakeFspBinPkg/Fsp.fd" if SOC_INTEL_SKYLAKE_LGA1151_V2 default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" config MAX_ROOT_PORTS @@ -303,16 +324,17 @@ config MAINBOARD_SUPPORTS_SKYLAKE_CPU bool "Board can contain Skylake CPU" - default y + default !SOC_INTEL_SKYLAKE_LGA1151_V2 if SKYLAKE_SOC_PCH_H config MAINBOARD_SUPPORTS_KABYLAKE_CPU bool "Board can contain Kaby Lake CPU" - default y if SOC_INTEL_KABYLAKE + default !SOC_INTEL_SKYLAKE_LGA1151_V2 && SOC_INTEL_KABYLAKE config MAINBOARD_SUPPORTS_COFFEELAKE_CPU bool "Board can contain Coffee Lake CPU" + default y if SOC_INTEL_SKYLAKE_LGA1151_V2 endif -- To view, visit https://review.coreboot.org/c/coreboot/+/52692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Gerrit-Change-Number: 52692 Gerrit-PatchSet: 13 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/skylake: Add microcodes for Coffee Lake CPUs
by Nico Huber (Code Review) 01 May '21

01 May '21

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52693 ) Change subject: soc/intel/skylake: Add microcodes for Coffee Lake CPUs ...................................................................... soc/intel/skylake: Add microcodes for Coffee Lake CPUs The Z370, H310C and B365 PCHs use the same silicon as 200-series PCHs and they are supported by soc/intel/skylake codebase (not by soc/intel/cannonlake). Mentioned PCHs are meant to be paired with Coffee Lake CPUs, so add the corresponding microcodes. Signed-off-by: Timofey Komarov <happycorsair(a)yandex.ru> Change-Id: I479c648e40c4c607d29f8cdd913fdbd6d7d7d991 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52693 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc 2 files changed, 10 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, but someone else must approve Felix Singer: Looks good to me, but someone else must approve Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 5024ef4..a8f220f 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -311,6 +311,9 @@ bool "Board can contain Kaby Lake CPU" default y if SOC_INTEL_KABYLAKE +config MAINBOARD_SUPPORTS_COFFEELAKE_CPU + bool "Board can contain Coffee Lake CPU" + endif if !SKYLAKE_SOC_PCH_H diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 8dbadcc..e88eab5 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -84,6 +84,13 @@ # Kabylake H B0 S0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 endif +# CoffeeLake +ifeq ($(CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU),y) +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d +endif else ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y) # Skylake D0 -- To view, visit https://review.coreboot.org/c/coreboot/+/52693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I479c648e40c4c607d29f8cdd913fdbd6d7d7d991 Gerrit-Change-Number: 52693 Gerrit-PatchSet: 10 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel/skylake: Add Kconfig option for LGA1151v2
by Angel Pons (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52692 ) Change subject: soc/intel/skylake: Add Kconfig option for LGA1151v2 ...................................................................... Patch Set 12: Code-Review+2 (1 comment) File src/soc/intel/skylake/Kconfig: https://review.coreboot.org/c/coreboot/+/52692/comment/70dce092_d3422ce5 PS5, Line 256: # SkylakeFsp is FSP 1.1 and therefore incompatible. > Ack Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/52692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Gerrit-Change-Number: 52692 Gerrit-PatchSet: 12 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 May 2021 17:46:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Timofey Komarov <happycorsair(a)yandex.ru> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Add microcodes for Coffee Lake CPUs
by Nico Huber (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52693 ) Change subject: soc/intel/skylake: Add microcodes for Coffee Lake CPUs ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I479c648e40c4c607d29f8cdd913fdbd6d7d7d991 Gerrit-Change-Number: 52693 Gerrit-PatchSet: 9 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 May 2021 17:19:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Add microcodes for Coffee Lake CPUs
by Nico Huber (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52693 ) Change subject: soc/intel/skylake: Add microcodes for Coffee Lake CPUs ...................................................................... Patch Set 9: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52693/comment/04731cdd_20be8b3d PS5, Line 7: Coffee Lake > The CPUs are Coffee Lake, though. They are not Amber Lake. Ack File src/soc/intel/skylake/Kconfig: https://review.coreboot.org/c/coreboot/+/52693/comment/3832645d_9cc160c5 PS5, Line 314: COFFEELAKE > The CPUs are not Amber Lake. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/52693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I479c648e40c4c607d29f8cdd913fdbd6d7d7d991 Gerrit-Change-Number: 52693 Gerrit-PatchSet: 9 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 May 2021 17:19:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Add Kconfig option for LGA1151v2
by Timofey Komarov (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Angel Pons, Patrick Rudolph. Timofey Komarov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52692 ) Change subject: soc/intel/skylake: Add Kconfig option for LGA1151v2 ...................................................................... Patch Set 12: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52692/comment/22835e76_ce0503e4 PS10, Line 12: As of the year 2021 it's common for motherboards with Z370, H310C or B365 PCHs, > Please reflow the paragraph so it fits in one line (72 chars). Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Gerrit-Change-Number: 52692 Gerrit-PatchSet: 12 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 May 2021 16:47:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Add Kconfig option for LGA1151v2
by Timofey Komarov (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Angel Pons, Patrick Rudolph. Hello Felix Singer, build bot (Jenkins), Nico Huber, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52692 to look at the new patch set (#12). Change subject: soc/intel/skylake: Add Kconfig option for LGA1151v2 ...................................................................... soc/intel/skylake: Add Kconfig option for LGA1151v2 Provide a SOC_INTEL_SKYLAKE_LGA1151_V2 option to select correct defaults for the combination of a Union Point PCH with LGA1151v2. As of the year 2021 it's common for motherboards with Z370, H310C or B365 PCHs, which are meant to be paired with Coffee Lake CPUs. Intel provides AmberLakeFspBinPkg to support this combination, which implements Intel FSP External Architecture Specification v2.1. Details: 1) Provide SOC_INTEL_SKYLAKE_LGA1151_V2 option that selects PLATFORM_USES_FSP2_1, SOC_INTEL_COMMON_SKYLAKE_BASE and SKYLAKE_SOC_PCH_H. 2) Add Amberlake FSP support. If SOC_INTEL_SKYLAKE_LGA1151_V2 is set, use AbmerLakeFspBinPkg instead of KabylakeFspBinPkg. 3) Enable Coffee Lake CPUs support. If SOC_INTEL_SKYLAKE_LGA1151_V2 is set, select MAINBOARD_SUPPORTS_COFFEELAKE_CPU. 4) Increase stack and heap size in CAR. If FSP_USES_CB_STACK is set (it's selected by PLATFORM_USES_FSP2_1), update DCACHE_BSP_STACK_SIZE and FSP_TEMP_RAM_SIZE values. 5) Update maximal number of supported CPUs. If MAINBOARD_SUPPORTS_COFFEELAKE_CPU is set, set MAX_CPUS to 16. Signed-off-by: Timofey Komarov <happycorsair(a)yandex.ru> Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c --- M src/soc/intel/skylake/Kconfig 1 file changed, 26 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/52692/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/52692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Gerrit-Change-Number: 52692 Gerrit-PatchSet: 12 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/skylake: Add Kconfig option for LGA1151v2
by Nico Huber (Code Review) 01 May '21

01 May '21

Attention is currently required from: Timofey Komarov, Felix Singer, Angel Pons, Patrick Rudolph. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52692 ) Change subject: soc/intel/skylake: Add Kconfig option for LGA1151v2 ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b6b9c676da55088cb5a12a218ea58d349ee440c Gerrit-Change-Number: 52692 Gerrit-PatchSet: 11 Gerrit-Owner: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Timofey Komarov <happycorsair(a)yandex.ru> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sat, 01 May 2021 16:43:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021