coreboot-gerrit May 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/sn65dsi86: Switch EDID reading to use "indirect mode"
by Douglas Anderson (Code Review) 06 May '21

06 May '21

Attention is currently required from: Vinod Polimera, Julius Werner, Xuxin Xiong. Douglas Anderson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52959 ) Change subject: drivers/sn65dsi86: Switch EDID reading to use "indirect mode" ...................................................................... Patch Set 2: Code-Review-1 (2 comments) Patchset: PS2: I ran out of time to review this today. :( I'll prioritize tomorrow. It sounds as if testing showed that it had problems though. I _might_ have found the problem looking at the code? File src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c: https://review.coreboot.org/c/coreboot/+/52959/comment/ce1ab89d_81b723eb PS2, Line 201: AUX_CMD_SEND From looking at the kernel code (and the samples in the ti manual IIRC), I believe you can't set this yet. You've got to do the writes first. In the kernel code it actually writes SN_AUX_CMD_REG twice. Once with just the command and then a second time with the command ORed with "SEND". IIRC that's what the manual said, too. -- To view, visit https://review.coreboot.org/c/coreboot/+/52959 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65f80193380d3c3841f9f5c26897ed672f45e15a Gerrit-Change-Number: 52959 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Vinod Polimera <vpolimer(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 06 May 2021 21:57:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Star Labs, Paul Menzel, Tim Wawrzynczak, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52800 to look at the new patch set (#14). Change subject: soc/intel: Allow enable/disable ME via CMOS ...................................................................... soc/intel: Allow enable/disable ME via CMOS Add ME_STATE_BY_CMOS, that will disable the Intel ME. Message is only sent if me_state is set to 1. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 71 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52800/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/52800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20 Gerrit-Change-Number: 52800 Gerrit-PatchSet: 14 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#14). Change subject: soc/mainboard: Add Star Labs labtop series ...................................................................... soc/mainboard: Add Star Labs labtop series Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- M src/ec/starlabs/it8987/ec.c A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c 45 files changed, 2,058 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 14 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/vendorcode/amd/fsp/cezanne/FspmUpd.h: match amd-fsp
by Martin Roth (Code Review) 06 May '21

06 May '21

Attention is currently required from: Raul Rangel, Marshall Dawson, Julian Schroeder. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52909 ) Change subject: src/vendorcode/amd/fsp/cezanne/FspmUpd.h: match amd-fsp ...................................................................... Patch Set 1: (1 comment) File src/vendorcode/amd/fsp/cezanne/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/52909/comment/6a605f91_df8f0765 PS1, Line 112: 6 I commented in FSP too, but as long as we're changing this, let's set it to 0x800 - We just keep adding things right now. -- To view, visit https://review.coreboot.org/c/coreboot/+/52909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib40c30e18878db5604ed1104e1e876986212e67d Gerrit-Change-Number: 52909 Gerrit-PatchSet: 1 Gerrit-Owner: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Comment-Date: Thu, 06 May 2021 20:52:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/vendorcode/amd/fsp/cezanne/FspmUpd.h: match amd-fsp
by Felix Held (Code Review) 06 May '21

06 May '21

Attention is currently required from: Raul Rangel, Martin Roth, Marshall Dawson, Julian Schroeder. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52909 ) Change subject: src/vendorcode/amd/fsp/cezanne/FspmUpd.h: match amd-fsp ...................................................................... Patch Set 1: (2 comments) File src/vendorcode/amd/fsp/cezanne/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/52909/comment/785ba58a_37423a37 PS1, Line 110: /** Offset 0x04D7**/ uint8_t sh_oem_usb_config[100]; > The AGESA people changed the whole USB setup plumbing. […] ah, ok. adding and using the struct definition in coreboot sounds like a good idea then. if the usb-related upds above won't be used, they should be removed on both sides; i'm ok if that's done in some follow-up https://review.coreboot.org/c/coreboot/+/52909/comment/60baf7f1_98847f24 PS1, Line 110: sh_oem > The next patches are going to clean this up. This is really just temporary. […] i only knew how this was done on picasso and seeing this 100 byte array just looked odd. having this 100 byte array and some header file that defines the matching struct seems to be the best way to go here from what i've seen so far. beware of possible issues due to how the bytes get packed into the struct though -- To view, visit https://review.coreboot.org/c/coreboot/+/52909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib40c30e18878db5604ed1104e1e876986212e67d Gerrit-Change-Number: 52909 Gerrit-PatchSet: 1 Gerrit-Owner: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Gerrit-Comment-Date: Thu, 06 May 2021 20:46:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julian Schroeder <julianmarcusschroeder(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: src/intel: Add LOCKDIS to mark SPI as writable in SKL
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52796 to look at the new patch set (#4). Change subject: src/intel: Add LOCKDIS to mark SPI as writable in SKL ...................................................................... src/intel: Add LOCKDIS to mark SPI as writable in SKL Use of CHIPSET_LOCKDOWN_COREBOOT_LOCKDIS to mark SPI as writable. Solves issue where fwupd won't install updates to device that doesn't have writable flag. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I712972428dd22373d8655ce72d36c0957ee9a900 --- M src/soc/intel/common/block/include/intelblocks/cfg.h M src/soc/intel/common/pch/include/intelpch/lockdown.h M src/soc/intel/common/pch/lockdown/lockdown.c M src/soc/intel/skylake/chip.c 4 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/52796/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I712972428dd22373d8655ce72d36c0957ee9a900 Gerrit-Change-Number: 52796 Gerrit-PatchSet: 4 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#11). Change subject: soc/mainboard: Add Star Labs labtop series ...................................................................... soc/mainboard: Add Star Labs labtop series Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c 44 files changed, 2,055 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 11 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#10). Change subject: soc/mainboard: Add Star Labs labtop series ...................................................................... soc/mainboard: Add Star Labs labtop series Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c 44 files changed, 2,055 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 10 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 06 May '21

06 May '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52798 to look at the new patch set (#9). Change subject: soc/mainboard: Add Star Labs labtop series ...................................................................... soc/mainboard: Add Star Labs labtop series Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 --- A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/gskill-F4-3200C22S.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c A src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc A src/mainboard/starlabs/labtop/variants/tgl/board.fmd A src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb A src/mainboard/starlabs/labtop/variants/tgl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/tgl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/tgl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/tgl/romstage.c 51 files changed, 2,636 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/52798/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/52798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37c74d03d86fb124ed96e45d1bf137eb2ec57251 Gerrit-Change-Number: 52798 Gerrit-PatchSet: 9 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in libgfxinit[master]: Add support to switch LSPCON modes
by Nico Huber (Code Review) 06 May '21

06 May '21

Attention is currently required from: Martin Roth, Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/51133 ) Change subject: Add support to switch LSPCON modes ...................................................................... Patch Set 11: Code-Review+2 (4 comments) Commit Message: https://review.coreboot.org/c/libgfxinit/+/51133/comment/f284a55f_2d1d1df7 PS9, Line 11: The chip defaults to LS mode. Maybe explain this, e.g. [...] which means the display engine has to deliver an HDMI-protocol signal which is only shifted to HDMI levels. https://review.coreboot.org/c/libgfxinit/+/51133/comment/8bd86b3d_24944a6f PS9, Line 16: level shifter mode `level-shifter mode` would probably read better, or `LS mode` like above. Patchset: PS11: Looks I forgot to publish some old drafts, sorry. Did you check possible delays for normal DP sinks? IIRC, you mentioned something on IRC, Angel. File common/hw-gfx-dp_dual_mode.adb: https://review.coreboot.org/c/libgfxinit/+/51133/comment/fcdc5d4d_7be83bf1 PS11, Line 87: end case; Could also remove all the pragmas here and put a single one around each call. That would also make the warning justification obsolete, I think. -- To view, visit https://review.coreboot.org/c/libgfxinit/+/51133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-Change-Id: Idfa9bdff47a6591000cd5092d64a4cd4f8dbdc8d Gerrit-Change-Number: 51133 Gerrit-PatchSet: 11 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 06 May 2021 20:05:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021