coreboot-gerrit May 2021

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Change in coreboot[master]: cezanne/psp_verstage: populate a/b firmware
by Kangheui Won (Code Review) 07 May '21

07 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Arthur Heymans, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52961 to look at the new patch set (#2). Change subject: cezanne/psp_verstage: populate a/b firmware ...................................................................... cezanne/psp_verstage: populate a/b firmware Build amdfw_[ab] and put them into CBFS. We can reuse FW_[AB] position from zork since we have same flash layout and size. Signed-off-by: Kangheui Won <khwon(a)chromium.org> Change-Id: Idb31afa7a513f01593b2af75515a170dfca8d360 --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/Makefile.inc 2 files changed, 63 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/52961/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52961 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb31afa7a513f01593b2af75515a170dfca8d360 Gerrit-Change-Number: 52961 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cezanne/psp_verstage: clean up duplicated target
by Kangheui Won (Code Review) 07 May '21

07 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52962 to look at the new patch set (#2). Change subject: cezanne/psp_verstage: clean up duplicated target ...................................................................... cezanne/psp_verstage: clean up duplicated target psp_verstage.bin target is already defined at common/psp_verstage/Makefile.inc, thus removing it here. Signed-off-by: Kangheui Won <khwon(a)chromium.org> Change-Id: Ica4b09282d1c4cfc555c18ba50951458b8580826 --- M src/soc/amd/cezanne/psp_verstage/Makefile.inc 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/52962/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica4b09282d1c4cfc555c18ba50951458b8580826 Gerrit-Change-Number: 52962 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cezanne/psp_verstage: reduce memory usage
by Kangheui Won (Code Review) 07 May '21

07 May '21

Attention is currently required from: Jason Glenesk, Marshall Dawson, Kangheui Won, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52751 to look at the new patch set (#3). Change subject: cezanne/psp_verstage: reduce memory usage ...................................................................... cezanne/psp_verstage: reduce memory usage For now we only have 80KB for psp_verstage in cezanne. (it's 160KB for picasso). So we have to trim down various things to fit into 80KB space. This should be reverted after we have enough space in the PSP since this increases boot time quite a lot. Signed-off-by: Kangheui Won <khwon(a)chromium.org> Change-Id: I30730a6dc53e2449981c635ecfe63029c73e58ee --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/psp_verstage/Makefile.inc 2 files changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/52751/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30730a6dc53e2449981c635ecfe63029c73e58ee Gerrit-Change-Number: 52751 Gerrit-PatchSet: 3 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table
by Felix Held (Code Review) 07 May '21

07 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52911 ) Change subject: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table ...................................................................... Patch Set 3: (1 comment) File src/soc/amd/common/fsp/pci/pci_routing_info.c: https://review.coreboot.org/c/coreboot/+/52911/comment/811571f0_790a066d PS3, Line 79: > probably same here -- To view, visit https://review.coreboot.org/c/coreboot/+/52911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id03d0b74ca12e7bcee11f8d13b0e802861c13923 Gerrit-Change-Number: 52911 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 06 May 2021 22:57:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table
by Felix Held (Code Review) 07 May '21

07 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52911 ) Change subject: soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table ...................................................................... Patch Set 3: (2 comments) File src/soc/amd/common/fsp/pci/pci_routing_info.c: https://review.coreboot.org/c/coreboot/+/52911/comment/02dcca0b_5ac5f796 PS3, Line 44: sizeof(*routing_table) sizeof(pci_routing_info) should also work and i'd find that a bit easier to read https://review.coreboot.org/c/coreboot/+/52911/comment/798d4e6b_82afe60c PS3, Line 76: > this should probably be a >= and not a >, since ARRAY_SIZE(pcie_swizzle_table) is 4, but the maximum array index is 3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52911 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id03d0b74ca12e7bcee11f8d13b0e802861c13923 Gerrit-Change-Number: 52911 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 06 May 2021 22:56:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: vc/amd/fsp/cezanne: Add AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID
by Felix Held (Code Review) 07 May '21

07 May '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52869 ) Change subject: vc/amd/fsp/cezanne: Add AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID ...................................................................... vc/amd/fsp/cezanne: Add AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID This HOB describes the PCI routing table. It will be consumed by coreboot to generate the _PRT ACPI object. BUG=b:184766519, b:184766197 TEST=Build guybrush Cq-Depend: chrome-internal:3794981 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Ib790004b88dfaf7671534f657c7735f6718114db Reviewed-on: https://review.coreboot.org/c/coreboot/+/52869 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Matt Papageorge <matthewpapa07(a)gmail.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/vendorcode/amd/fsp/cezanne/FspGuids.h 1 file changed, 4 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved Matt Papageorge: Looks good to me, but someone else must approve diff --git a/src/vendorcode/amd/fsp/cezanne/FspGuids.h b/src/vendorcode/amd/fsp/cezanne/FspGuids.h index ca8cfc5..50c65ba 100644 --- a/src/vendorcode/amd/fsp/cezanne/FspGuids.h +++ b/src/vendorcode/amd/fsp/cezanne/FspGuids.h @@ -17,4 +17,8 @@ GUID_INIT(0x42494c41, 0x4002, 0x403b, \ 0x87, 0xE1, 0x3F, 0xEB, 0x13, 0xC5, 0x66, 0x9A) +#define AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID \ + GUID_INIT(0x00D54AA7, 0x0002, 0x47F5, \ + 0x00, 0x78, 0x08, 0x57, 0x00, 0x00, 0xA4, 0x11) + #endif /* __FSP_GUIDS__ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib790004b88dfaf7671534f657c7735f6718114db Gerrit-Change-Number: 52869 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: payloads/external/tianocore/Kconfig: elaborate help for TIANOCORE_BOO...
by Stefan Reinauer (Code Review) 07 May '21

07 May '21

Attention is currently required from: Felix Friedlander, Nico Huber, Martin Roth, Matt DeVillier, Paul Menzel. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49233 ) Change subject: payloads/external/tianocore/Kconfig: elaborate help for TIANOCORE_BOOTSPLASH_FILE ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/49233 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4c6666bb0e49369fe8fe2ae3dc12c023f668da0 Gerrit-Change-Number: 49233 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Friedlander <felix(a)ffetc.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Friedlander <felix(a)ffetc.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 06 May 2021 22:52:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms
by Stefan Reinauer (Code Review) 07 May '21

07 May '21

Attention is currently required from: Nico Huber, Martin Roth, Christian Walter. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49461 ) Change subject: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms ...................................................................... Patch Set 2: (2 comments) File payloads/external/Makefile.inc: https://review.coreboot.org/c/coreboot/+/49461/comment/3e1d020e_c50fa1f9 PS2, Line 117: domains Does this scan all PCI domains or all PCI buses? Does it scan bus 255 or everything up to 255? https://review.coreboot.org/c/coreboot/+/49461/comment/92e59daa_8c2f767f PS2, Line 118: 255 > Not sure, but maybe this should match `MAX_SOCKETS - 1`. On my Xeon-SP there are devices on bus 0xff. -- To view, visit https://review.coreboot.org/c/coreboot/+/49461 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a99e1b9b6ea77fede6ed8239016bd92c5291c63 Gerrit-Change-Number: 49461 Gerrit-PatchSet: 2 Gerrit-Owner: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Thu, 06 May 2021 22:51:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/pcengines/apu2/OemCustomize.c: make AGESA AmdInitPost happy
by Felix Held (Code Review) 07 May '21

07 May '21

Attention is currently required from: Michał Żygowski, Piotr Król. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52759 ) Change subject: mb/pcengines/apu2/OemCustomize.c: make AGESA AmdInitPost happy ...................................................................... Patch Set 1: (1 comment) File src/mainboard/pcengines/apu2/OemCustomize.c: https://review.coreboot.org/c/coreboot/+/52759/comment/44d51ee2_fd104762 PS1, Line 92: if (get_spd_offset()) not really related to this patch: get_spd_offset() returns a value between 0 and 3 inclusive, but there are only two dram configurations in the makefile; is this intended? when GPIO_50 is 1 it'll probably call die() in read_ddr3_spd_from_cbfs -- To view, visit https://review.coreboot.org/c/coreboot/+/52759 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I010645f53b404341895d0545855905e81c89165e Gerrit-Change-Number: 52759 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Thu, 06 May 2021 22:48:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: Force resets to be cold
by Marshall Dawson (Code Review) 07 May '21

07 May '21

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52982 ) Change subject: soc/amd/cezanne: Force resets to be cold ...................................................................... soc/amd/cezanne: Force resets to be cold Cezanne must use cold resets. Change the warm reset request to always use cold. Set the ToggleAllPwrGoodOnCf9 after AGESA has cleared it in FSP-S. BUG=b:184281092 TEST=Majolica successfully resets using 0xcf9 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Change-Id: I7d4ca5665335b20100a5c802d12d79c0d0597ad9 --- M src/soc/amd/cezanne/chip.c M src/soc/amd/cezanne/reset.c 2 files changed, 12 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/52982/1 diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 625f46c..22f53bf 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <amdblocks/acpimmio.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -78,11 +79,19 @@ } } +static void force_resets_cold(void) +{ + /* TODO: Modify AGESA to not clear this bit. b/184281092 */ + pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | + TOGGLE_ALL_PWR_GOOD); +} + static void soc_init(void *chip_info) { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables; fsp_silicon_init(); + force_resets_cold(); data_fabric_set_mmio_np(); diff --git a/src/soc/amd/cezanne/reset.c b/src/soc/amd/cezanne/reset.c index aae76bf..a49d1ad 100644 --- a/src/soc/amd/cezanne/reset.c +++ b/src/soc/amd/cezanne/reset.c @@ -7,6 +7,7 @@ #include <amdblocks/acpimmio.h> #include <amdblocks/reset.h> +/* TODO: is NCP_ERR still valid? It appears reserved and always 0xff. b/184281092 */ void set_warm_reset_flag(void) { uint8_t ncp = inw(NCP_ERR); @@ -29,14 +30,11 @@ void do_warm_reset(void) { - set_warm_reset_flag(); - - /* Assert reset signals only. */ - outb(RST_CPU | SYS_RST, RST_CNT); + /* Cold reset is required and warm reset not supported */ + do_cold_reset(); } void do_board_reset(void) { - /* TODO: Would a warm_reset() suffice? */ do_cold_reset(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/52982 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d4ca5665335b20100a5c802d12d79c0d0597ad9 Gerrit-Change-Number: 52982 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit May 2021