coreboot-gerrit May 2021

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Change in coreboot[master]: Update arm-trusted-firmware submodule to upstream master
by Julius Werner (Code Review) 14 May '21

14 May '21

Attention is currently required from: Yu-Ping Wu. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54289 ) Change subject: Update arm-trusted-firmware submodule to upstream master ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I912545022e4320b86ab8a382144c02e315d0c835 Gerrit-Change-Number: 54289 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 14 May 2021 22:14:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vboot/secdata_mock: Make v0 kernel secdata context
by Julius Werner (Code Review) 14 May '21

14 May '21

Attention is currently required from: Furquan Shaikh, Aseda Aboagye. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54304 ) Change subject: vboot/secdata_mock: Make v0 kernel secdata context ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/54304/comment/5d5ce241_48bd8d51 PS1, Line 10: supported on systems which do _NOT_ have a v0 secdata kernel context. Like I mentioned on the bug, it doesn't. It just assumes that secdata is stored between reboots. File src/security/vboot/secdata_mock.c: https://review.coreboot.org/c/coreboot/+/54304/comment/a84a3697_0ab389a6 PS1, Line 31: /* Vboot implicitly assumes that EFS2 (Early Firmware Selection v2) is coreboot multi-line comment styles are either /* * Blank line both above * and below the comment * for longer comments. */ or /* No blank lines and no stars on continuation lines for shorter comments. */ https://review.coreboot.org/c/coreboot/+/54304/comment/ffbf3a71_c262531a PS1, Line 32: * supported on systems which do _NOT_ have a v0 secdata kernel context. (here too) -- To view, visit https://review.coreboot.org/c/coreboot/+/54304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id8e81afcddadf27d9eec274f7f85ff1520315aaa Gerrit-Change-Number: 54304 Gerrit-PatchSet: 1 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Comment-Date: Fri, 14 May 2021 21:26:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by Angel Pons (Code Review) 14 May '21

14 May '21

Attention is currently required from: Tim Wawrzynczak, Stefan Reinauer, Subrata Banik, Angel Pons. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54305 ) Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54305/comment/24f094af_61395c69 PS2, Line 35: TEST > i have tested on all IFDv2 platform and don't see any regression. […] I'll test tomorrow -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Fri, 14 May 2021 21:22:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by Angel Pons (Code Review) 14 May '21

14 May '21

Attention is currently required from: Tim Wawrzynczak, Stefan Reinauer, Angel Pons. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54305 ) Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... Patch Set 2: (4 comments) Patchset: PS2: Thanks for looking into this. File util/ifdtool/ifdtool.h: https://review.coreboot.org/c/coreboot/+/54305/comment/f407454b_0c9d37d7 PS2, Line 38: CHIPSET_N_J_SERIES_APOLLO_GEMINI_LAKE, /* Apollo Lake, Gemini Lake: APL and GLK have different IFDs (e.g. FLCOMP bitfields are different). I'd handle them separately. See CB:54276 for a flashrom patch, which I tested and correctly identifies a GLK IFD. https://review.coreboot.org/c/coreboot/+/54305/comment/7aa5333b_1d0fddfc PS2, Line 60: macros not macros File util/ifdtool/ifdtool.c: https://review.coreboot.org/c/coreboot/+/54305/comment/d716cd4e_5e4d8cd5 PS2, Line 273: read_freq = (fcba->flcomp >> 17) & 7; This bitfield was repurposed in CNP/GLK and newer. It used to be "Read Clock Frequency", but it's "ec_max_freq" on newer platforms. -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Fri, 14 May 2021 21:14:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by Subrata Banik (Code Review) 14 May '21

14 May '21

Attention is currently required from: Tim Wawrzynczak, Stefan Reinauer, Angel Pons. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54305 ) Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/54305/comment/098b255f_9bced5db PS2, Line 35: TEST i have tested on all IFDv2 platform and don't see any regression. Requested Angel to try on Lynx Point if possible. -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Fri, 14 May 2021 21:13:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Identify chipset without platform name
by Subrata Banik (Code Review) 14 May '21

14 May '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44815 ) Change subject: util/ifdtool: Identify chipset without platform name ...................................................................... util/ifdtool: Identify chipset without platform name Able to uniquely identify the chipset without specifying the platform specific quirks (adl/cnl/icl/jsl/tgl etc.). BUG=b:153888802 TEST=Able to dump FD contains correctly without specifying platform quirks on Hatch Platform. > ifdtool -d coreboot.rom Without this CL : ICH Revision: 100 series Sunrise Point With this CL : ICH Revision: 300 series Cannon Point/ 400 series Ice Point Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Change-Id: I83763adb721e069343b19a10e503975ffa6abb24 --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 42 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/44815/1 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index e096864..1880900 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -59,6 +59,7 @@ "ICH8", "ICH9", "ICH10", + "Unknown PCH", "5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point", @@ -68,7 +69,10 @@ "8 series Wellsburg", "9 series Wildcat Point", "9 series Wildcat Point LP", - "100 series Sunrise Point", + "Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx", + "100/200 series Sunrise Point", + "300 series Cannon Point/ 400 series Ice Point", + "500 series Tiger Point", "C620 series Lewisburg", NULL }; @@ -161,14 +165,42 @@ return PTR_IN_RANGE(fmsba, image, size) ? fmsba : NULL; } +static enum ich_chipset guess_ifd_2_chipset(const fpsba_t *fpsba) +{ + uint32_t pchstrp_22 = fpsba->pchstrp[22]; + uint32_t pchstrp_23 = fpsba->pchstrp[23]; + + /* Offset 0x5B is the last PCH descriptor record */ + if (pchstrp_23 == 0xFFFFFFFF) + return CHIPSET_N_J_SERIES; + + /* Offset 0x58 is PCH descriptor record is reserved */ + if (pchstrp_22 == 0x0) + return CHIPSET_300_400_SERIES_CANNON_ICE_POINT; + + /* Offset 0x58 bit [2:0] is reserved 0x4 and 0x5a bit [7:0] is reserved 0x58 */ + if (((pchstrp_22 & 0x07) == 0x4) && + ((pchstrp_22 & 0xFF0000) >> 16 == 0x58)) + return CHIPSET_500_SERIES_TIGER_POINT; + + return CHIPSET_PCH_UNKNOWN; +} + /* port from flashrom */ -static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb) +static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb, const fpsba_t *fpsba) { uint32_t iccriba = (fdb->flmap2 >> 16) & 0xff; uint32_t msl = (fdb->flmap2 >> 8) & 0xff; uint32_t isl = (fdb->flmap1 >> 24); uint32_t nm = (fdb->flmap1 >> 8) & 0x7; + int temp_chipset; + /* Check for IFD2 chipset type */ + temp_chipset = guess_ifd_2_chipset(fpsba); + if (temp_chipset != CHIPSET_PCH_UNKNOWN) + return temp_chipset; + + /* Rest for IFD1 chipset type */ if (iccriba == 0x00) { if (msl == 0 && isl <= 2) return CHIPSET_ICH8; @@ -192,7 +224,7 @@ } else if (nm == 6) { return CHIPSET_C620_SERIES_LEWISBURG; } else { - return CHIPSET_100_SERIES_SUNRISE_POINT; + return CHIPSET_100_200_SERIES_SUNRISE_POINT; } } @@ -232,10 +264,11 @@ int read_freq; const fcba_t *fcba = find_fcba(image, size); const fdbar_t *fdb = find_fd(image, size); + const fpsba_t *fpsba = find_fpsba(image, size); if (!fcba || !fdb) exit(EXIT_FAILURE); - chipset = guess_ich_chipset(fdb); + chipset = guess_ich_chipset(fdb, fpsba); /* TODO: port ifd_version and max_regions * against guess_ich_chipset() */ diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index 840d7fe..a113d29 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -23,6 +23,7 @@ CHIPSET_ICH8, CHIPSET_ICH9, CHIPSET_ICH10, + CHIPSET_PCH_UNKNOWN, CHIPSET_5_SERIES_IBEX_PEAK, CHIPSET_6_SERIES_COUGAR_POINT, CHIPSET_7_SERIES_PANTHER_POINT, @@ -34,9 +35,10 @@ CHIPSET_8_SERIES_WELLSBURG, CHIPSET_9_SERIES_WILDCAT_POINT, CHIPSET_9_SERIES_WILDCAT_POINT_LP, - CHIPSET_100_SERIES_SUNRISE_POINT, /* also 6th/7th gen Core i/o (LP) - * variants - */ + CHIPSET_N_J_SERIES, /* Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx */ + CHIPSET_100_200_SERIES_SUNRISE_POINT, /* 6th-7th gen Core i/o (LP) variants */ + CHIPSET_300_400_SERIES_CANNON_ICE_POINT, /* 8th-10th gen Core i/o (LP) variants */ + CHIPSET_500_SERIES_TIGER_POINT, /* 11th gen Core i/o (LP) variants onwards */ CHIPSET_C620_SERIES_LEWISBURG, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/44815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I83763adb721e069343b19a10e503975ffa6abb24 Gerrit-Change-Number: 44815 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by Subrata Banik (Code Review) 14 May '21

14 May '21

Attention is currently required from: Stefan Reinauer. Hello Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54305 to look at the new patch set (#2). Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets This patch fixes issue reported with CB:44815, where ifdtool is unable to identify Lynx Point and Alder Lake chipsets. Hence, this patch make below changes to fix this issue proper: 1. Refactor chipset name macros to identify chipets more accurately, example: CNP, ICP and JSL chipsets macros are not seperated with proper naming. 2. Use offset FLMAP1 bit 24:31, called PSL (PCH Strap Lenth) to uniquely identify the chipsets without any additional logic. Note: The same offset was known as ISL in IFDv1 hence, used the backward compatibility without additional complexity. +---------+-----------+ | Chipset | PSL Value | +---------+-----------+ | APL/GLK | 0x13 | +---------+-----------+ | JSL | 0x2a | +---------+-----------+ | CNP | 0x45 | +---------+-----------+ | TGP/ADP | 0x46 | +---------+-----------+ | ICP | 0x4a | +---------+-----------+ 3. Remove unused argument 1 from guess_ich_chipset() function. BUG=b:153888802 TEST=Able to dump FD contains correctly without specifying platform quirks on Brya Platform. > ifdtool -d coreboot.rom Without this CL : PCH Revision: 100/200 series Sunrise Point With this CL : PCH Revision: 500 series Tiger Point/ 600 series Alder Point Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Change-Id: I25f69ce775454409974056d8326c02e29038ec8a --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 37 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/54305/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by build bot (Jenkins) (Code Review) 14 May '21

14 May '21

Attention is currently required from: Stefan Reinauer. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54305 ) Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... Patch Set 1: (1 comment) File util/ifdtool/ifdtool.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-119345): https://review.coreboot.org/c/coreboot/+/54305/comment/a415c1ba_61ddc9aa PS1, Line 61: enum pch_strap_lenth { 'lenth' may be misspelled - perhaps 'length'? -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Fri, 14 May 2021 21:03:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 ch...
by Subrata Banik (Code Review) 14 May '21

14 May '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54305 ) Change subject: util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets ...................................................................... util/ifdtool: Use Pch Strap Length(PSL) to uniquely identify IFDv2 chipsets This patch fixes issue reported with CB:44815, where ifdtool is unable to identify Lynx Point and Alder Lake chipsets. Hence, this patch make below changes to fix this issue proper: 1. Refactor chipset name macros to identify chipets more accurately, example: CNP, ICP and JSL chipsets macros are not seperated with proper naming. 2. Use offset FLMAP1 bit 24:31, called PSL (PCH Strap Lenth) to uniquely identify the chipsets without any additional logic. Note: The same offset was known as ISL in IFDv1 hence, used the backward compatibility without additional complexity. +---------+-----------+ | Chipset | PSL Value | +---------+-----------+ | APL/GLK | 0x13 | +---------+-----------+ | JSL | 0x2a | +---------+-----------+ | CNP | 0x45 | +---------+-----------+ | TGP/ADP | 0x46 | +---------+-----------+ | ICP | 0x4a | +---------+-----------+ 3. Remove unused argument 1 from guess_ich_chipset() function. BUG=b:153888802 TEST=Able to dump FD contains correctly without specifying platform quirks on Brya Platform. > ifdtool -d coreboot.rom Without this CL : PCH Revision: 100/200 series Sunrise Point With this CL : PCH Revision: 500 series Tiger Point/ 600 series Alder Point Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> Change-Id: I25f69ce775454409974056d8326c02e29038ec8a --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 37 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/54305/1 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 7dbed66..c0c8812 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -69,9 +69,11 @@ "8 series Wellsburg", "9 series Wildcat Point", "9 series Wildcat Point LP", - "Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx", + "Apollo Lake/Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx", + "Jasper Lake: N6xxx, N51xx, N45xx", "100/200 series Sunrise Point", - "300 series Cannon Point/ 400 series Ice Point", + "300 series Cannon Point", + "400 series Ice Point", "500 series Tiger Point/ 600 series Alder Point", "C620 series Lewisburg", NULL @@ -165,29 +167,26 @@ return PTR_IN_RANGE(fmsba, image, size) ? fmsba : NULL; } -static enum ich_chipset guess_ifd_2_chipset(const fpsba_t *fpsba) +static enum ich_chipset guess_ifd_2_chipset(const uint32_t psl) { - uint32_t pchstrp_22 = fpsba->pchstrp[22]; - uint32_t pchstrp_23 = fpsba->pchstrp[23]; - - /* Offset 0x5B is the last PCH descriptor record */ - if (pchstrp_23 == 0xFFFFFFFF) - return CHIPSET_N_J_SERIES; - - /* Offset 0x58 is PCH descriptor record is reserved */ - if (pchstrp_22 == 0x0) - return CHIPSET_300_400_SERIES_CANNON_ICE_POINT; - - /* Offset 0x58 bit [2:0] is reserved 0x4 and 0x5a bit [7:0] is reserved 0x58 */ - if (((pchstrp_22 & 0x07) == 0x4) && - ((pchstrp_22 & 0xFF0000) >> 16 == 0x58)) + switch (psl) { + case PSL_APL_GLK: + return CHIPSET_N_J_SERIES_APOLLO_GEMINI_LAKE; + case PSL_JSL: + return CHIPSET_N_SERIES_JASPER_LAKE; + case PSL_CNP: + return CHIPSET_300_SERIES_CANNON_POINT; + case PSL_TGP_ADP: return CHIPSET_500_600_SERIES_TIGER_ALDER_POINT; - - return CHIPSET_PCH_UNKNOWN; + case PSL_ICP: + return CHIPSET_400_SERIES_ICE_POINT; + default: + return CHIPSET_PCH_UNKNOWN; + } } /* port from flashrom */ -static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb, const fpsba_t *fpsba) +static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb) { uint32_t iccriba = (fdb->flmap2 >> 16) & 0xff; uint32_t msl = (fdb->flmap2 >> 8) & 0xff; @@ -196,7 +195,7 @@ int temp_chipset; /* Check for IFD2 chipset type */ - temp_chipset = guess_ifd_2_chipset(fpsba); + temp_chipset = guess_ifd_2_chipset(isl); if (temp_chipset != CHIPSET_PCH_UNKNOWN) return temp_chipset; @@ -264,11 +263,10 @@ int read_freq; const fcba_t *fcba = find_fcba(image, size); const fdbar_t *fdb = find_fd(image, size); - const fpsba_t *fpsba = find_fpsba(image, size); - if (!fcba || !fdb || !fpsba) + if (!fcba || !fdb) exit(EXIT_FAILURE); - chipset = guess_ich_chipset(fdb, fpsba); + chipset = guess_ich_chipset(fdb); /* TODO: port ifd_version and max_regions * against guess_ich_chipset() */ diff --git a/util/ifdtool/ifdtool.h b/util/ifdtool/ifdtool.h index ced4f2b..d65c0cd 100644 --- a/util/ifdtool/ifdtool.h +++ b/util/ifdtool/ifdtool.h @@ -35,9 +35,12 @@ CHIPSET_8_SERIES_WELLSBURG, CHIPSET_9_SERIES_WILDCAT_POINT, CHIPSET_9_SERIES_WILDCAT_POINT_LP, - CHIPSET_N_J_SERIES, /* Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx */ + CHIPSET_N_J_SERIES_APOLLO_GEMINI_LAKE, /* Apollo Lake, Gemini Lake: + * N5xxx, J5xxx, N4xxx, J4xxx */ + CHIPSET_N_SERIES_JASPER_LAKE, /* Jasper Lake: N6xxx, N51xx, N45xx */ CHIPSET_100_200_SERIES_SUNRISE_POINT, /* 6th-7th gen Core i/o (LP) variants */ - CHIPSET_300_400_SERIES_CANNON_ICE_POINT, /* 8th-10th gen Core i/o (LP) variants */ + CHIPSET_300_SERIES_CANNON_POINT, /* 8th-9th gen Core i/o (LP) variants */ + CHIPSET_400_SERIES_ICE_POINT, /* 10th gen Core i/o (LP) variants */ CHIPSET_500_600_SERIES_TIGER_ALDER_POINT, /* 11th-12th gen Core i/o (LP) * variants onwards */ CHIPSET_C620_SERIES_LEWISBURG, @@ -54,6 +57,16 @@ PLATFORM_ADL, }; +/* PSL macros for IFDv2 type platform */ +enum pch_strap_lenth { + PSL_APL_GLK = 0x13, + PSL_JSL = 0x2a, + PSL_CNP = 0x45, + PSL_TGP_ADP = 0x46, + PSL_ICP = 0x4a, + /* Add PSL for newer chipset */ +}; + #define LAYOUT_LINELEN 80 enum spi_frequency { -- To view, visit https://review.coreboot.org/c/coreboot/+/54305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25f69ce775454409974056d8326c02e29038ec8a Gerrit-Change-Number: 54305 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vboot/secdata_mock: Make v0 kernel secdata context
by Aaron Durbin (Code Review) 14 May '21

14 May '21

Attention is currently required from: Furquan Shaikh, Aseda Aboagye, Julius Werner. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54304 ) Change subject: vboot/secdata_mock: Make v0 kernel secdata context ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id8e81afcddadf27d9eec274f7f85ff1520315aaa Gerrit-Change-Number: 54304 Gerrit-PatchSet: 1 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 14 May 2021 19:43:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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