coreboot-gerrit December 2021

coreboot-gerrit@coreboot.org

1 participants
5525 discussions

Change in coreboot[master]: mb/google/brya/variants/taniks: Configure GPIOs according to schematics
by Joey Peng (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: YH Lin, Tim Wawrzynczak. Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59938 to look at the new patch set (#3). Change subject: mb/google/brya/variants/taniks: Configure GPIOs according to schematics ...................................................................... mb/google/brya/variants/taniks: Configure GPIOs according to schematics Update initial gpio configuration for taniks BUG=b:209492408 TEST=FW_NAME=taniks emerge-brya coreboot Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: Ic5c4ead4ad59137e1764e1226415ab6041c68aab --- A src/mainboard/google/brya/variants/taniks/Makefile.inc A src/mainboard/google/brya/variants/taniks/gpio.c 2 files changed, 213 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/59938/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59938 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5c4ead4ad59137e1764e1226415ab6041c68aab Gerrit-Change-Number: 59938 Gerrit-PatchSet: 3 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/brya/variant/taniks: Upload memory settings
by Joey Peng (Code Review) 07 Dec '21

07 Dec '21

Joey Peng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59947 ) Change subject: mb/google/brya/variant/taniks: Upload memory settings ...................................................................... mb/google/brya/variant/taniks: Upload memory settings Based on the Taniks's schematic, generate memory settings. BUG=b:209531192 TEST=FW_NAME=taniks emerge-brya coreboot chromeos-bootimage Signed-off-by: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Change-Id: I0c0794fb94d1f6271de604835ae1d2b20696ee70 --- M src/mainboard/google/brya/variants/taniks/Makefile.inc A src/mainboard/google/brya/variants/taniks/memory.c M src/mainboard/google/brya/variants/taniks/memory/Makefile.inc M src/mainboard/google/brya/variants/taniks/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt 5 files changed, 122 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/59947/1 diff --git a/src/mainboard/google/brya/variants/taniks/Makefile.inc b/src/mainboard/google/brya/variants/taniks/Makefile.inc index 9fb63f5..1d38b77 100644 --- a/src/mainboard/google/brya/variants/taniks/Makefile.inc +++ b/src/mainboard/google/brya/variants/taniks/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c +romstage-y += memory.c + ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/taniks/memory.c b/src/mainboard/google/brya/variants/taniks/memory.c new file mode 100644 index 0000000..9a7ef5c --- /dev/null +++ b/src/mainboard/google/brya/variants/taniks/memory.c @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> + +static const struct mb_cfg baseboard_memcfg = { + .type = MEM_TYPE_LP4X, + + .rcomp = { + /* Baseboard uses only 100ohm Rcomp resistors */ + .resistor = 100, + + /* Baseboard Rcomp target values */ + .targets = {40, 30, 30, 30, 30}, + }, + + /* DQ byte map */ + .lpx_dq_map = { + .ddr0 = { + .dq0 = { 9, 11, 8, 10, 12, 14, 13, 15, }, + .dq1 = { 4, 7, 6, 5, 2, 3, 0, 1, }, + }, + .ddr1 = { + .dq0 = { 15, 12, 14, 13, 9, 10, 11, 8, }, + .dq1 = { 0, 1, 3, 2, 7, 5, 4, 6, }, + }, + .ddr2 = { + .dq0 = { 2, 3, 1, 0, 6, 7, 5, 4, }, + .dq1 = { 15, 9, 14, 8, 11, 10, 13, 12, }, + }, + .ddr3 = { + .dq0 = { 3, 1, 2, 0, 4, 6, 7, 5, }, + .dq1 = { 13, 15, 14, 12, 11, 9, 8, 10, }, + }, + .ddr4 = { + .dq0 = { 13, 12, 14, 15, 9, 8, 10, 11, }, + .dq1 = { 4, 7, 5, 6, 1, 2, 0, 3, }, + }, + .ddr5 = { + .dq0 = { 5, 0, 6, 4, 3, 1, 7, 2, }, + .dq1 = { 11, 9, 10, 8, 15, 12, 14, 13, }, + }, + .ddr6 = { + .dq0 = { 15, 12, 14, 13, 10, 9, 11, 8, }, + .dq1 = { 0, 1, 2, 3, 5, 6, 4, 7, }, + }, + .ddr7 = { + .dq0 = { 0, 3, 1, 2, 4, 5, 6, 7, }, + .dq1 = { 11, 8, 13, 14, 9, 12, 15, 10, }, + }, + }, + + /* DQS CPU<>DRAM map */ + .lpx_dqs_map = { + .ddr0 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr1 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr2 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr3 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr4 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr5 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr6 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, + }, + + .ect = 1, /* Enable Early Command Training */ +}; + +const struct mb_cfg *__weak variant_memory_params(void) +{ + return &baseboard_memcfg; +} + +int __weak variant_memory_sku(void) +{ + /* + * Memory configuration board straps + * GPIO_MEM_CONFIG_0 GPP_E11 + * GPIO_MEM_CONFIG_1 GPP_E2 + * GPIO_MEM_CONFIG_2 GPP_E1 + * GPIO_MEM_CONFIG_3 GPP_E12 + */ + gpio_t spd_gpios[] = { + GPP_E11, + GPP_E2, + GPP_E1, + GPP_E12, + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} + +bool __weak variant_is_half_populated(void) +{ + /* GPIO_MEM_CH_SEL GPP_E13 */ + return gpio_get(GPP_E13); +} diff --git a/src/mainboard/google/brya/variants/taniks/memory/Makefile.inc b/src/mainboard/google/brya/variants/taniks/memory/Makefile.inc index 6751a42..e79c23e 100644 --- a/src/mainboard/google/brya/variants/taniks/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/taniks/memory/Makefile.inc @@ -1,5 +1,7 @@ -## SPDX-License-Identifier: GPL-2.0-or-later -## This is an auto-generated file. Do not edit!! -## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taniks/memory src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt -SPD_SOURCES = placeholder +SPD_SOURCES = +SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE, MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL, H54G46CYRBX267 diff --git a/src/mainboard/google/brya/variants/taniks/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/taniks/memory/dram_id.generated.txt index fa24790..9dd8bb8 100644 --- a/src/mainboard/google/brya/variants/taniks/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/taniks/memory/dram_id.generated.txt @@ -1 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/taniks/memory src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt + DRAM Part Name ID to assign +MT53E512M32D2NP-046 WT:E 0 (0000) +K4U6E3S4AA-MGCR 0 (0000) +H9HCNNNBKMMLXR-NEE 0 (0000) +MT53E512M32D1NP-046 WT:B 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) +H54G46CYRBX267 0 (0000) diff --git a/src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt index 9621137..dd80fc8 100644 --- a/src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/taniks/memory/mem_parts_used.txt @@ -1,11 +1,6 @@ -# This is a CSV file containing a list of memory parts used by this variant. -# One part per line with an optional fixed ID in column 2. -# Only include a fixed ID if it is required for legacy reasons! -# Generated IDs are dependent on the order of parts in this file, -# so new parts must always be added at the end of the file! -# -# Generate an updated Makefile.inc and dram_id.generated.txt by running the -# part_id_gen tool from util/spd_tools. -# See util/spd_tools/README.md for more details and instructions. - -# Part Name +MT53E512M32D2NP-046 WT:E +K4U6E3S4AA-MGCR +H9HCNNNBKMMLXR-NEE +MT53E512M32D1NP-046 WT:B +K4U6E3S4AB-MGCL +H54G46CYRBX267 -- To view, visit https://review.coreboot.org/c/coreboot/+/59947 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c0794fb94d1f6271de604835ae1d2b20696ee70 Gerrit-Change-Number: 59947 Gerrit-PatchSet: 1 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/corsola: Pass reset gpio parameter to BL31
by Yu-Ping Wu (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59824 ) Change subject: mb/google/corsola: Pass reset gpio parameter to BL31 ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48d8d004ea92e950d0040a11133c57c121b86af3 Gerrit-Change-Number: 59824 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Dec 2021 06:13:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration
by Yu-Ping Wu (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59823 ) Change subject: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59823 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib23b112a0bf3d056b932a87b86aaff79508ef50c Gerrit-Change-Number: 59823 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Dec 2021 06:12:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/dedede/var/bugzzy: Add SAR sensor
by Gwendal Grignou (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Gwendal Grignou. Hello build bot (Jenkins), SH Kim, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59609 to look at the new patch set (#4). Change subject: mb/google/dedede/var/bugzzy: Add SAR sensor ...................................................................... mb/google/dedede/var/bugzzy: Add SAR sensor Present the Semtech SX9360 SAR sensor that protects the LTE antenna. The sensor is connected to i2c bus I2C1. Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Signed-off-by: Gwendal Grignou <gwendal(a)chromium.org> Change-Id: I9feef9d132c60738bafb22ceb7d3468c798fab9b --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/variants/bugzzy/gpio.c M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb 3 files changed, 23 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/59609/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59609 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9feef9d132c60738bafb22ceb7d3468c798fab9b Gerrit-Change-Number: 59609 Gerrit-PatchSet: 4 Gerrit-Owner: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: driver/i2c: Add sx9360 driver
by Gwendal Grignou (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: SH Kim, Paul Menzel, Tim Wawrzynczak. Hello build bot (Jenkins), Tim Wawrzynczak, SH Kim, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59608 to look at the new patch set (#3). Change subject: driver/i2c: Add sx9360 driver ...................................................................... driver/i2c: Add sx9360 driver Add driver for setting up Semtech sx9360 SAR sensor. Registers are documented in the kernel tree: Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Signed-off-by: Gwendal Grignou <gwendal(a)chromium.org> Change-Id: I0a912f184e6f3501f894cca24c0d71a2c3087516 --- A src/drivers/i2c/sx9360/Kconfig A src/drivers/i2c/sx9360/Makefile.inc A src/drivers/i2c/sx9360/chip.h A src/drivers/i2c/sx9360/sx9360.c 4 files changed, 158 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/59608/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59608 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a912f184e6f3501f894cca24c0d71a2c3087516 Gerrit-Change-Number: 59608 Gerrit-PatchSet: 3 Gerrit-Owner: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: DO-NOT-SUBMIT: MT8186 Corsola review ToT
by Rex-BC Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Rex-BC Chen. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58639 to look at the new patch set (#38). Change subject: DO-NOT-SUBMIT: MT8186 Corsola review ToT ...................................................................... DO-NOT-SUBMIT: MT8186 Corsola review ToT Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I53f304822c426417bb58037daa536bfb8dda1db3 --- M README.md 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/58639/38 -- To view, visit https://review.coreboot.org/c/coreboot/+/58639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53f304822c426417bb58037daa536bfb8dda1db3 Gerrit-Change-Number: 58639 Gerrit-PatchSet: 38 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/corsola: Pass reset gpio parameter to BL31
by Rex-BC Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Paul Menzel. Hello Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59824 to look at the new patch set (#5). Change subject: mb/google/corsola: Pass reset gpio parameter to BL31 ...................................................................... mb/google/corsola: Pass reset gpio parameter to BL31 To support gpio reset SoC, we need to pass the reset gpio parameter to BL31. TEST=build pass BUG=b:202871018 Cq-Depend: chromium:3188686 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I48d8d004ea92e950d0040a11133c57c121b86af3 --- M src/mainboard/google/corsola/mainboard.c 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/59824/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48d8d004ea92e950d0040a11133c57c121b86af3 Gerrit-Change-Number: 59824 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration
by Rex-BC Chen (Code Review) 07 Dec '21

07 Dec '21

Attention is currently required from: Hung-Te Lin, Paul Menzel. Hello Hung-Te Lin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59823 to look at the new patch set (#5). Change subject: soc/mediatek/mt8186: Enable ARM Trusted Firmware integration ...................................................................... soc/mediatek/mt8186: Enable ARM Trusted Firmware integration Enable configuration to build with MT8186 arm-trusted-firmware drivers. TEST=build pass BUG=b:202871018 Cq-Depend: chromium:3189573 Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: Ib23b112a0bf3d056b932a87b86aaff79508ef50c --- M src/soc/mediatek/mt8186/Kconfig M src/soc/mediatek/mt8186/Makefile.inc 2 files changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/59823/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/59823 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib23b112a0bf3d056b932a87b86aaff79508ef50c Gerrit-Change-Number: 59823 Gerrit-PatchSet: 5 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/corsola: revise GPIO set of NOR flash for kingler/krabby
by Rex-BC Chen (Code Review) 07 Dec '21

07 Dec '21

Rex-BC Chen has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/59945 ) Change subject: mb/google/corsola: revise GPIO set of NOR flash for kingler/krabby ...................................................................... mb/google/corsola: revise GPIO set of NOR flash for kingler/krabby Kingler and krabby boards use GPIO_SET1 for NOR flash. Reference document: kingler_mt8186_mt6366_lpddr4x_e.pdf, page 11. crab_proto 0_2021112.pdf, page 11. BUG=b:202871018 TEST=flash verify pass on kingler on bootblock stage Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f --- M src/mainboard/google/corsola/bootblock.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/59945/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/59945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f Gerrit-Change-Number: 59945 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2021