Attention is currently required from: Martin Roth, Stefan Reinauer.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59957 )
Change subject: SeaBIOS: Update stable release to 1.15.0
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Patch Set 1: Code-Review+2
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Kenneth Chan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59839 )
Change subject: mb/google/guybrush/var/dewatt: Add dewatt device config
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Patch Set 3:
(1 comment)
Patchset:
PS3:
> Please split this CL into separate CLs for each functional change […]
Ok. I will split them, thanks.
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Subrata Banik has uploaded a new patch set (#2) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/59976 )
Change subject: mb/intel/adlrvp: Add support for external clock buffer
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mb/intel/adlrvp: Add support for external clock buffer
ADL-P silicon can support 7 SRC CLK's and 10 CLKREQ signals.
Out of 7 SRCCLK's 3 will be used for CPU. Rests CLK SRC's are for PCH.
Now if more than 4 PCH devices connected on the platform, external
differential buffer chip needs to be placed at platform level.
A mainboard designer can choose to add an external clock chip,
and select the SRC CLK using CONFIG_INTERNAL_CLKSRC_BUFFER.
CONFIG_INTERNAL_CLKSRC_BUFFER provides the CLKSRC that feed clock to
discrete buffer for further distribution to platform.
Change-Id: I21f1155374049c90aa45db25d4128b39aa5898bb
Signed-off-by: Subrata Banik <subi.banik(a)gmail.com>
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M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
2 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/59976/2
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