coreboot-gerrit December 2021

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Change in coreboot[master]: mb/google/brya/var/vell: Add AMP driver setting
by build bot (Jenkins) (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60331 ) Change subject: mb/google/brya/var/vell: Add AMP driver setting ...................................................................... Patch Set 2: (5 comments) File src/drivers/i2c/cs35l53/cs35l53.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136149): https://review.coreboot.org/c/coreboot/+/60331/comment/99208844_fdca22ff PS2, Line 70: if ((config->boost_peak_milliamp > 4500) || that open brace { should be on the previous line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136149): https://review.coreboot.org/c/coreboot/+/60331/comment/0fd21fad_616a07e0 PS2, Line 83: acpi_dp_add_integer(dsd, "cirrus,gpio1-polarity-invert", config->gpio1_polarity_invert ? 1 : 0); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136149): https://review.coreboot.org/c/coreboot/+/60331/comment/9c1f5a4c_8bcdf247 PS2, Line 84: acpi_dp_add_integer(dsd, "cirrus,gpio1-output-enable", config->gpio1_output_enable ? 1 : 0); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136149): https://review.coreboot.org/c/coreboot/+/60331/comment/0ec54c51_5de80c10 PS2, Line 86: acpi_dp_add_integer(dsd, "cirrus,gpio2-polarity-invert", config->gpio2_polarity_invert ? 1 : 0); line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136149): https://review.coreboot.org/c/coreboot/+/60331/comment/91cb045f_5a0d4de1 PS2, Line 87: acpi_dp_add_integer(dsd, "cirrus,gpio2-output-enable", config->gpio2_output_enable ? 1 : 0); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/60331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c Gerrit-Change-Number: 60331 Gerrit-PatchSet: 2 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 24 Dec 2021 02:50:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: Add AMP driver setting
by Shon Wang (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Tim Wawrzynczak, Shon Wang. Hello build bot (Jenkins), Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60331 to look at the new patch set (#2). Change subject: mb/google/brya/var/vell: Add AMP driver setting ...................................................................... mb/google/brya/var/vell: Add AMP driver setting update overridetree.cb update Kconfig.name update i2c/C35l53 Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c --- A src/drivers/i2c/cs35l53/Kconfig A src/drivers/i2c/cs35l53/Makefile.inc A src/drivers/i2c/cs35l53/chip.h A src/drivers/i2c/cs35l53/cs35l53.c M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/vell/overridetree.cb 6 files changed, 275 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/60331/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c Gerrit-Change-Number: 60331 Gerrit-PatchSet: 2 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/vell: Add AMP driver setting
by Shon Wang (Code Review) 24 Dec '21

24 Dec '21

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60331 ) Change subject: mb/google/brya/var/vell: Add AMP driver setting ...................................................................... mb/google/brya/var/vell: Add AMP driver setting update overridetree.cb update Kconfig.name Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/vell/overridetree.cb 2 files changed, 20 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/60331/1 diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 1f3078d..fdba2f0 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -131,6 +131,7 @@ select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU + select DRIVERS_I2C_CS35L53 config BOARD_GOOGLE_TANIKS bool "-> Taniks" diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 03d7dae..eede9f2 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -166,34 +166,26 @@ end end device ref i2c0 on - chip drivers/i2c/generic - register "hid" = ""10EC5682"" - register "name" = ""RT58"" - register "desc" = ""Headset Codec"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" - # Set the jd_src to RT5668_JD1 for jack detection - register "property_count" = "1" - register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" - register "property_list[0].name" = ""realtek,jd-src"" - register "property_list[0].integer" = "1" - device i2c 1a on - probe AUDIO MAX98360_ALC5682I_I2S - end + chip drivers/i2c/cs35l53 + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_S1)" + device i2c 0x40 on end end - chip drivers/i2c/generic - register "hid" = ""RTL5682"" - register "name" = ""RT58"" - register "desc" = ""Headset Codec"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)" - # Set the jd_src to RT5668_JD1 for jack detection - register "property_count" = "1" - register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" - register "property_list[0].name" = ""realtek,jd-src"" - register "property_list[0].integer" = "1" - device i2c 1a on - probe AUDIO MAX98360_ALC5682IVS_I2S - end - end +# chip drivers/i2c/cs35l53 +# register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" +# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_S1)" +# device i2c 0x41 on end +# end +# chip drivers/i2c/cs35l53 +# register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" +# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_S1)" +# device i2c 0x42 on end +# end +# chip drivers/i2c/cs35l53 +# register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_D14)" +# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_S1)" +# device i2c 0x43 on end +# end end #I2C0 device ref i2c1 on chip drivers/i2c/generic -- To view, visit https://review.coreboot.org/c/coreboot/+/60331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96d49bd1a2ba061c4fd52b450b31d0885f49552c Gerrit-Change-Number: 60331 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya: Allow variants to choose CAR setup configuration
by EricR Lai (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: David Wu, Subrata Banik, Maulik V Vaghela, Chen Wisley. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59272 ) Change subject: mb/google/brya: Allow variants to choose CAR setup configuration ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe94e6b82739ec65829859271622d904d75e978d Gerrit-Change-Number: 59272 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: David Wu <david_wu(a)quantatw.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: David Wu <david_wu(a)quantatw.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 02:42:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/futility: Ensure futility checks for flashrom as a dep
by Hsuan-ting Chen (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Hung-Te Lin, Martin Roth - Personal, Edward O'Callaghan, Julius Werner. Hsuan-ting Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60236 ) Change subject: util/futility: Ensure futility checks for flashrom as a dep ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Despite the discussion of the default behaviour, two general questions: 1. Will it be more reasonable if we check-flashrom-presence then if support, USE_LIBFLASHROM=1 else 0? IMO always passing USE_LIBFLASHROM=0 is reasonable, but I would like to raise this question to see if it worth discussing. 2. We should also pass USD_LIBFLASHROM=0 in util/cbfstool/Makefile -- To view, visit https://review.coreboot.org/c/coreboot/+/60236 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9744424f75299eb8335c1c0c2aca2808bde829d Gerrit-Change-Number: 60236 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 24 Dec 2021 02:33:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: swap TPM i2c with TS i2c for the next build
by Kevin Chang (Code Review) 24 Dec '21

24 Dec '21

Kevin Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60330 ) Change subject: mb/google/brya/var/taeko: swap TPM i2c with TS i2c for the next build ...................................................................... mb/google/brya/var/taeko: swap TPM i2c with TS i2c for the next build Taeko will exchange i2c port for touchscreen and cr50. BUG=b:211911780 TEST=build pass Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: Ib7273ba107c58e4cd90db00e301a399d7a7df76d --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/taeko/gpio.c M src/mainboard/google/brya/variants/taeko/overridetree.cb 3 files changed, 34 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/60330/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index fa618b9..27174f5 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -85,7 +85,7 @@ default 0x1 if BOARD_GOOGLE_REDRIX default 0x3 if BOARD_GOOGLE_REDRIX4ES default 0x1 if BOARD_GOOGLE_KANO - default 0x3 if BOARD_GOOGLE_TAEKO + default 0x1 if BOARD_GOOGLE_TAEKO default 0x3 if BOARD_GOOGLE_TAEKO4ES default 0x1 if BOARD_GOOGLE_FELWINTER default 0x3 if BOARD_GOOGLE_ANAHERA diff --git a/src/mainboard/google/brya/variants/taeko/gpio.c b/src/mainboard/google/brya/variants/taeko/gpio.c index aa778fc..a390604 100644 --- a/src/mainboard/google/brya/variants/taeko/gpio.c +++ b/src/mainboard/google/brya/variants/taeko/gpio.c @@ -140,10 +140,6 @@ static const struct pad_config early_gpio_table[] = { /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), - /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ - PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2), - /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */ - PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2), /* * D1 : ISH_GP1 ==> FP_RST_ODL * FP_RST_ODL comes out of reset as hi-z and does not have an external pull-down. @@ -163,6 +159,10 @@ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI(GPP_F18, NONE, DEEP), + /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */ + PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + /* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */ + PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */ diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index b82e9de..8a45385 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -79,11 +79,11 @@ #+-------------------+---------------------------+ #| GSPI1 | Fingerprint MCU | #| I2C0 | Audio | - #| I2C1 | Touchscreen | - #| I2C2 | HPS | - #| I2C3 | cr50 TPM. Early init is | + #| I2C1 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | + #| I2C2 | HPS | + #| I2C3 | Touchscreen | #| I2C5 | Trackpad | #+-------------------+---------------------------+ register "common_soc_config" = "{ @@ -91,7 +91,11 @@ .speed = I2C_SPEED_FAST, }, .i2c[1] = { + .early_init = 1, .speed = I2C_SPEED_FAST, + .rise_time_ns = 600, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, .i2c[2] = { .speed = I2C_SPEED_FAST, @@ -272,6 +276,28 @@ end end device ref i2c1 on + chip drivers/i2c/tpm + register "hid" = ""GOOG0005"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" + device i2c 50 on end + end + end + device ref i2c2 on + chip drivers/i2c/generic + register "hid" = ""GOOG0020"" + register "desc" = ""Chrome OS HPS"" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" # EN_HPS_PWR + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" # HPS_INT_ODL + # HPS uses I2C addresses 0x30 and 0x51. + # The address we provide here is not significant because + # neither coreboot nor Linux have a driver for HPS, + # it's only used from userspace. + device i2c 30 on + probe HPS HPS_PRESENT + end + end + end + device ref i2c3 on chip drivers/i2c/hid register "generic.hid" = ""GDIX0000"" register "generic.desc" = ""Goodix Touchscreen"" @@ -312,28 +338,6 @@ device i2c 10 on end end end - device ref i2c2 on - chip drivers/i2c/generic - register "hid" = ""GOOG0020"" - register "desc" = ""Chrome OS HPS"" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" # EN_HPS_PWR - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" # HPS_INT_ODL - # HPS uses I2C addresses 0x30 and 0x51. - # The address we provide here is not significant because - # neither coreboot nor Linux have a driver for HPS, - # it's only used from userspace. - device i2c 30 on - probe HPS HPS_PRESENT - end - end - end - device ref i2c3 on - chip drivers/i2c/tpm - register "hid" = ""GOOG0005"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" - device i2c 50 on end - end - end device ref i2c5 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" -- To view, visit https://review.coreboot.org/c/coreboot/+/60330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib7273ba107c58e4cd90db00e301a399d7a7df76d Gerrit-Change-Number: 60330 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for ...
by Felix Singer (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Tim Wawrzynczak, Nick Vaccaro, Ronak Kanabar, Zhuohao Lee, Patrick Rudolph. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60031 ) Change subject: Revert "Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02"" ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60031 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d858edee2eb24506c3e55a1cb808a1ccbd58da2 Gerrit-Change-Number: 60031 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 24 Dec 2021 02:02:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/futility: Ensure futility checks for flashrom as a dep
by Edward O'Callaghan (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Hung-Te Lin, Martin Roth - Personal, Hsuan-ting Chen, Julius Werner. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60236 ) Change subject: util/futility: Ensure futility checks for flashrom as a dep ...................................................................... Patch Set 5: (1 comment) Patchset: PS3: > You are probably right Julius, I was just looking for a intermediate step as futility needs quite a […] Resolved now. -- To view, visit https://review.coreboot.org/c/coreboot/+/60236 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9744424f75299eb8335c1c0c2aca2808bde829d Gerrit-Change-Number: 60236 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 24 Dec 2021 01:56:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: util/futility: Ensure futility checks for flashrom as a dep
by Edward O'Callaghan (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Martin Roth - Personal, Hsuan-ting Chen, Julius Werner. Hello Martin Roth - Personal, Hsuan-ting Chen, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60236 to look at the new patch set (#5). Change subject: util/futility: Ensure futility checks for flashrom as a dep ...................................................................... util/futility: Ensure futility checks for flashrom as a dep futility actually depends on flashrom. Previously it was of the form of subprocess and now uses the libflashrom API directly. Due to the previous subprocess decoupling it was not obvious that the dependency existed however not the runtime requirement is also a strict buildtime requirement. Therefore update the Makefile accordingly. BUG=b:203715651,b:209702505 TEST=builds Change-Id: Id9744424f75299eb8335c1c0c2aca2808bde829d Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M util/futility/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/60236/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60236 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9744424f75299eb8335c1c0c2aca2808bde829d Gerrit-Change-Number: 60236 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Attention: Hsuan-ting Chen <roccochen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede/var/magolor: Set core display clock to 172.8 MHz
by Ren Kuo (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Nico Huber, Henry Sun, Paul Menzel, Angel Pons, Simon Yang, Kane Chen, Karthik Ramasubramanian. Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60301 ) Change subject: mb/google/dedede/var/magolor: Set core display clock to 172.8 MHz ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60301/comment/20b2b377_dd0899e3 PS6, Line 13: recommendation. (refer to src/soc/intel/jasperlake/chip.h) > What frequency is chosen by default? And why is FSP choosing a higher than […] From CL:60009 's comment: => Is this the default config in FSP? Yes, 0xff is the default value of setting CdClock. => Are you planning to upload a follow-up change for Magolor? No, I will leave it for ODM to adjust it. The default value in FSP is as before,and keep the CdClock=0xff in baseboard devicetree. It will not impact all current dedede projects firmware by the change. For ODM owners, we can overwrite a tuning value in dedede/variant/xxxx devicetree if it's necessary. -- To view, visit https://review.coreboot.org/c/coreboot/+/60301 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ad2bed79b37775184f0bd0a0ef024900cbe34 Gerrit-Change-Number: 60301 Gerrit-PatchSet: 9 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 01:48:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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coreboot-gerrit December 2021