coreboot-gerrit December 2021

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Change in coreboot[master]: mb/google/reef: Drop unnecessary option
by Felix Singer (Code Review) 24 Dec '21

24 Dec '21

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60149 ) Change subject: mb/google/reef: Drop unnecessary option ...................................................................... mb/google/reef: Drop unnecessary option Since all variants select the option `BASEBOARD_REEF_LAPTOP`, drop it and let the common baseboard option select it. Change-Id: I7f2ffd1e7b9ad2fab500b83c4cc56c9fc2d161ab Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60149 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/reef/Kconfig 1 file changed, 2 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index a4bd882..b0d0508 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -20,38 +20,29 @@ select MAINBOARD_HAS_TPM2 select SAR_ENABLE select SOC_INTEL_APOLLOLAKE + select SYSTEM_TYPE_LAPTOP select USE_SAR config BOARD_GOOGLE_REEF - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF config BOARD_GOOGLE_PYRO - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF config BOARD_GOOGLE_SAND - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF config BOARD_GOOGLE_SNAPPY - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF config BOARD_GOOGLE_NASHER - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF config BOARD_GOOGLE_CORAL - select BASEBOARD_REEF_LAPTOP select BOARD_GOOGLE_BASEBOARD_REEF if BOARD_GOOGLE_BASEBOARD_REEF -config BASEBOARD_REEF_LAPTOP - def_bool n - select SYSTEM_TYPE_LAPTOP - config DRIVER_TPM_I2C_BUS hex default 0x2 @@ -67,7 +58,7 @@ config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select HAS_RECOVERY_MRC_CACHE - select VBOOT_LID_SWITCH if BASEBOARD_REEF_LAPTOP + select VBOOT_LID_SWITCH config MAINBOARD_DIR default "google/reef" -- To view, visit https://review.coreboot.org/c/coreboot/+/60149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f2ffd1e7b9ad2fab500b83c4cc56c9fc2d161ab Gerrit-Change-Number: 60149 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: disable unused PCIe clock setting
by Paul Menzel (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Kenneth Chan, Karthik Ramasubramanian. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60328 ) Change subject: mb/google/guybrush/var/dewatt: disable unused PCIe clock setting ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60328/comment/ac5a0f11_36d7f6b3 PS1, Line 9: Disable unused PCIe GPP_CLK1 and GPP_CLK2 for dewatt. Just for correctness, or does this fix some problem? The source is the schematics? https://review.coreboot.org/c/coreboot/+/60328/comment/dcf9fb24_c1b1f3ac PS1, Line 12: TEST=emerge-guybrush coreboot How can this be tested? -- To view, visit https://review.coreboot.org/c/coreboot/+/60328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If449453bc60ed41e104346429babc06a73acef64 Gerrit-Change-Number: 60328 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 16:22:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/cherry: add configuration for dojo
by Hung-Te Lin (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Kevin Chiu. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60313 ) Change subject: mb/google/cherry: add configuration for dojo ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/cherry/Kconfig: https://review.coreboot.org/c/coreboot/+/60313/comment/5ee0760e_2358669c PS2, Line 66: default y if BOARD_GOOGLE_CHERRY || BOARD_GOOGLE_DOJO || BOARD_GOOGLE_TOMATO if all boards so far do use rt1019, can we change these to default y and later if we find a board default n then do default n if BOARD_XXX -- To view, visit https://review.coreboot.org/c/coreboot/+/60313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3bd9803b4e47882df9fe351229478e4cb1630363 Gerrit-Change-Number: 60313 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 14:07:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: disable unused PCIe clock setting
by Rob Barnes (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Kenneth Chan, Karthik Ramasubramanian. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60328 ) Change subject: mb/google/guybrush/var/dewatt: disable unused PCIe clock setting ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: GPP_CLK1 is for SD and GPP_CLK2 is for WWAN on guybrush right? Can you add this to the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/60328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If449453bc60ed41e104346429babc06a73acef64 Gerrit-Change-Number: 60328 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 13:47:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/dewatt: update telemetry value
by Rob Barnes (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Bhanu Prakash Maiya, Kenneth Chan, Karthik Ramasubramanian. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60321 ) Change subject: mb/google/guybrush/var/dewatt: update telemetry value ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60321 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I597a51ca599eff2abc9640aba5f3c804a686f057 Gerrit-Change-Number: 60321 Gerrit-PatchSet: 1 Gerrit-Owner: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 24 Dec 2021 13:33:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Add judgment for PCIE signal switch
by Kevin Chang (Code Review) 24 Dec '21

24 Dec '21

Kevin Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60341 ) Change subject: mb/google/brya/var/taeko: Add judgment for PCIE signal switch ...................................................................... mb/google/brya/var/taeko: Add judgment for PCIE signal switch Taeko will using two PCIE port singal with one slot, one CLK and one CLKREQ that need add judgment in overridetree.cb. BUG=b:211914322 TEST=Test on takeo trace in FSP log can found setting correct Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 --- M src/mainboard/google/brya/variants/taeko/overridetree.cb 1 file changed, 17 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/60341/1 diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index b82e9de..7c93854 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -237,6 +237,7 @@ .clk_req = 0, .clk_src = 0, }" + probe BOOT_NVME_MASK BOOT_NVME_ENABLED end device ref tbt_pcie_rp0 off end device ref tbt_pcie_rp1 off end @@ -391,13 +392,26 @@ end end end - device ref pcie_rp9 on + device ref pcie_rp9 off end + device ref pcie_rp12 on + # Enable NVMe PCIE 12 using clk 0 + register "pch_pcie_rp[PCH_RP(12)]" = "{ + .clk_src = 0, + .clk_req = 0, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + device generic 0 on + probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED + end chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)" - register "srcclk_pin" = "1" - device generic 0 on end + register "srcclk_pin" = "0" + device generic 0 on + probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED + end end + probe BOOT_EMMC_MASK BOOT_EMMC_ENABLED end device ref gspi1 on chip drivers/spi/acpi -- To view, visit https://review.coreboot.org/c/coreboot/+/60341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 Gerrit-Change-Number: 60341 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error
by Felix Held (Code Review) 24 Dec '21

24 Dec '21

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60329 ) Change subject: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Pulling in early to fix build. thanks! -- To view, visit https://review.coreboot.org/c/coreboot/+/60329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Gerrit-Change-Number: 60329 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 24 Dec 2021 12:31:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error
by Nico Huber (Code Review) 24 Dec '21

24 Dec '21

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/60329 ) Change subject: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error ...................................................................... mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error Commit d448f8ce0fe9955e7792f54cc278897152d53590 (drivers/intel/pmc_mux/ conn: Change usb{23}_port_number fields to device pointers) changed the way the pmc_mux/conn driver gets the corresponding USB ports from the devicetree. This change didn't include the corresponding change for the Taniks and Vell variants of the Google Brya project and the Intel adlrvp_n_ext_ec board which probably weren't in the tree at the time the patch referenced above was created. This patch ports the needed change forward to those boards to fix the build of the upstream tree. TEST=None Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Reviewed-on: https://review.coreboot.org/c/coreboot/+/60329 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/mainboard/google/brya/variants/taniks/overridetree.cb M src/mainboard/google/brya/variants/vell/overridetree.cb M src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb 3 files changed, 14 insertions(+), 14 deletions(-) Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index deb31ce..cb8c99a 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -365,13 +365,13 @@ chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port device generic 2 alias conn1 on end end end diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 7595c6f..4f5da7f 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -253,13 +253,13 @@ chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port device generic 1 alias conn1 on end end end diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb index e78d00f..de5471c 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb @@ -34,22 +34,22 @@ chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "1" - register "usb3_port_number" = "1" + use usb2_port1 as usb2_port + use tcss_usb3_port1 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "2" - register "usb3_port_number" = "2" + use usb2_port2 as usb2_port + use tcss_usb3_port2 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end chip drivers/intel/pmc_mux/conn - register "usb2_port_number" = "3" - register "usb3_port_number" = "3" + use usb2_port3 as usb2_port + use tcss_usb3_port3 as usb3_port # SBU is fixed, HSL follows CC register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 2 alias conn2 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/60329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Gerrit-Change-Number: 60329 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error
by Nico Huber (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Tim Crawford, Reka Norman, Tim Wawrzynczak, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60329 ) Change subject: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Pulling in early to fix build. -- To view, visit https://review.coreboot.org/c/coreboot/+/60329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Gerrit-Change-Number: 60329 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 24 Dec 2021 12:14:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error
by Nico Huber (Code Review) 24 Dec '21

24 Dec '21

Attention is currently required from: Tim Crawford, Reka Norman, Tim Wawrzynczak, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60329 ) Change subject: mb/google/taniks,vell;mb/intel/adlrvp_n_ext_ec: fix build error ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/60329 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id295cd11fbbfe038534b154215a6de7c1ac13e0e Gerrit-Change-Number: 60329 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 24 Dec 2021 12:13:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2021