coreboot-gerrit November 2021

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Change in coreboot[master]: arch/x86: Refactor the SMBIOS type 17 write function
by Subrata Banik (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Jason Glenesk, Jakub Czapiga, Marshall Dawson, Tim Wawrzynczak, Angel Pons, Rob Barnes, Patrick Rudolph, Felix Held. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56628 ) Change subject: arch/x86: Refactor the SMBIOS type 17 write function ...................................................................... Patch Set 21: (1 comment) Patchset: PS21: @Tim/Rob: Request you to take a look from Intel and AMD side. Can you please help. -- To view, visit https://review.coreboot.org/c/coreboot/+/56628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Gerrit-Change-Number: 56628 Gerrit-PatchSet: 21 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 04 Nov 2021 18:10:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: lib/hardwaremain: Run timers more frequently
by Raul Rangel (Code Review) 04 Nov '21

04 Nov '21

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58955 ) Change subject: lib/hardwaremain: Run timers more frequently ...................................................................... lib/hardwaremain: Run timers more frequently This change makes it so the timers run after each boot state callback, and after each boot state. This gives coop threads the opportunity to run more frequently and predictably. BUG=b:179699789 TEST=Boot guybrush to OS, see SPI transactions progress faster. Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: I9508e7777d52fe934cc09d486abc0dab5cf7dad8 --- M src/lib/hardwaremain.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/58955/1 diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index fe8e53f..28c2b82 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -290,6 +290,9 @@ mono_time_diff_microseconds(&mt_start, &mt_stop) / USECS_PER_MSEC); } + + bs_run_timers(0); + continue; } @@ -355,6 +358,8 @@ bs_sample_time(state); + bs_run_timers(0); + bs_call_callbacks(state, current_phase.seq); if (CONFIG(DEBUG_BOOT_STATE)) -- To view, visit https://review.coreboot.org/c/coreboot/+/58955 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9508e7777d52fe934cc09d486abc0dab5cf7dad8 Gerrit-Change-Number: 58955 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: treewide: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58910 ) Change subject: treewide: Replace bad uses of `find_resource` ...................................................................... treewide: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: I329efcb42a444b097794fde4f40acf5ececaea8c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58910 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Lance Zhao --- M src/acpi/acpi.c M src/device/azalia_device.c M src/mainboard/siemens/mc_apl1/mainboard.c 3 files changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Lance Zhao: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 282d734..60f8c21 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1248,7 +1248,7 @@ printk(BIOS_INFO, "%s: Device not enabled\n", __func__); return current; } - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) { printk(BIOS_ERR, "%s: Unable to find resource for %s\n", __func__, dev_path(dev)); diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 70f8348..a223e76 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -285,7 +285,7 @@ struct resource *res; u16 codec_mask; - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index 7ac8764..24e61dc 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -229,7 +229,7 @@ dev = pcidev_path_on_root(PCH_DEVFN_SDCARD); if (dev) { uint32_t reg; - struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); + struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/58910 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I329efcb42a444b097794fde4f40acf5ececaea8c Gerrit-Change-Number: 58910 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: superio: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58909 ) Change subject: superio: Replace bad uses of `find_resource` ...................................................................... superio: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: Ic6e28add78f686fc9ab4556eddbedf7828fba9ef Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58909 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/superio/fintek/f71808a/f71808a_hwm.c M src/superio/fintek/f71869ad/f71869ad_hwm.c M src/superio/fintek/f81866d/f81866d_hwm.c M src/superio/fintek/f81866d/f81866d_uart.c M src/superio/ite/it8613e/superio.c M src/superio/ite/it8623e/superio.c M src/superio/ite/it8718f/superio.c M src/superio/ite/it8720f/superio.c M src/superio/ite/it8728f/superio.c M src/superio/ite/it8772f/superio.c M src/superio/ite/it8783ef/superio.c M src/superio/ite/it8786e/superio.c M src/superio/nuvoton/npcd378/superio.c 13 files changed, 14 insertions(+), 14 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved diff --git a/src/superio/fintek/f71808a/f71808a_hwm.c b/src/superio/fintek/f71808a/f71808a_hwm.c index 340bc30..f8c4472 100644 --- a/src/superio/fintek/f71808a/f71808a_hwm.c +++ b/src/superio/fintek/f71808a/f71808a_hwm.c @@ -35,7 +35,7 @@ void f71808a_hwm_init(struct device *dev) { - struct resource *res = find_resource(dev, PNP_IDX_IO0); + struct resource *res = probe_resource(dev, PNP_IDX_IO0); if (!res) { printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n"); diff --git a/src/superio/fintek/f71869ad/f71869ad_hwm.c b/src/superio/fintek/f71869ad/f71869ad_hwm.c index 6333ae1..9add2a7 100644 --- a/src/superio/fintek/f71869ad/f71869ad_hwm.c +++ b/src/superio/fintek/f71869ad/f71869ad_hwm.c @@ -41,7 +41,7 @@ void f71869ad_hwm_init(struct device *dev) { const struct superio_fintek_f71869ad_config *conf = dev->chip_info; - struct resource *res = find_resource(dev, PNP_IDX_IO0); + struct resource *res = probe_resource(dev, PNP_IDX_IO0); if (!res) { printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n"); diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c index a7ed96b..a82adb3 100644 --- a/src/superio/fintek/f81866d/f81866d_hwm.c +++ b/src/superio/fintek/f81866d/f81866d_hwm.c @@ -38,7 +38,7 @@ void f81866d_hwm_init(struct device *dev) { - struct resource *res = find_resource(dev, PNP_IDX_IO0); + struct resource *res = probe_resource(dev, PNP_IDX_IO0); if (!res) { printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n"); diff --git a/src/superio/fintek/f81866d/f81866d_uart.c b/src/superio/fintek/f81866d/f81866d_uart.c index 7d98a7f..f6ebbfc 100644 --- a/src/superio/fintek/f81866d/f81866d_uart.c +++ b/src/superio/fintek/f81866d/f81866d_uart.c @@ -19,7 +19,7 @@ */ void f81866d_uart_init(struct device *dev) { - struct resource *res = find_resource(dev, PNP_IDX_IO0); + struct resource *res = probe_resource(dev, PNP_IDX_IO0); u8 tmp; if (!res) { diff --git a/src/superio/ite/it8613e/superio.c b/src/superio/ite/it8613e/superio.c index 4d12457..c18c3ec 100644 --- a/src/superio/ite/it8613e/superio.c +++ b/src/superio/ite/it8613e/superio.c @@ -19,7 +19,7 @@ switch (dev->path.pnp.device) { case IT8613E_EC: - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8623e/superio.c b/src/superio/ite/it8623e/superio.c index ca3455a..15e0071 100644 --- a/src/superio/ite/it8623e/superio.c +++ b/src/superio/ite/it8623e/superio.c @@ -19,7 +19,7 @@ switch (dev->path.pnp.device) { case IT8623E_EC: - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index aab554f..1243e75 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -24,7 +24,7 @@ break; case IT8718F_EC: conf = dev->chip_info; - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8720f/superio.c b/src/superio/ite/it8720f/superio.c index c63fa9a..75d0be9 100644 --- a/src/superio/ite/it8720f/superio.c +++ b/src/superio/ite/it8720f/superio.c @@ -51,7 +51,7 @@ switch (dev->path.pnp.device) { case IT8720F_EC: conf = dev->chip_info; - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c index 22e6ecb..67ef218 100644 --- a/src/superio/ite/it8728f/superio.c +++ b/src/superio/ite/it8728f/superio.c @@ -20,7 +20,7 @@ switch (dev->path.pnp.device) { /* TODO: Might potentially need code for FDC etc. */ case IT8728F_EC: - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index 6672cdc..82f30fa 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -171,7 +171,7 @@ switch (dev->path.pnp.device) { case IT8772F_EC: - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!res) break; @@ -203,7 +203,7 @@ break; case IT8772F_GPIO: /* Set GPIO output levels */ - res = find_resource(dev, PNP_IDX_IO1); + res = probe_resource(dev, PNP_IDX_IO1); if (res) { if (conf->gpio_set1) outb(conf->gpio_set1, res->base + 0); diff --git a/src/superio/ite/it8783ef/superio.c b/src/superio/ite/it8783ef/superio.c index feb373f..d90ae5f 100644 --- a/src/superio/ite/it8783ef/superio.c +++ b/src/superio/ite/it8783ef/superio.c @@ -20,7 +20,7 @@ switch (dev->path.pnp.device) { case IT8783EF_EC: conf = dev->chip_info; - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/ite/it8786e/superio.c b/src/superio/ite/it8786e/superio.c index 55fff91..8d9ec14 100644 --- a/src/superio/ite/it8786e/superio.c +++ b/src/superio/ite/it8786e/superio.c @@ -20,7 +20,7 @@ switch (dev->path.pnp.device) { case IT8786E_EC: conf = dev->chip_info; - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!conf || !res) break; ite_ec_init(res->base, &conf->ec); diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c index 9889980..f1db509 100644 --- a/src/superio/nuvoton/npcd378/superio.c +++ b/src/superio/nuvoton/npcd378/superio.c @@ -60,7 +60,7 @@ pc_keyboard_init(PROBE_AUX_DEVICE); break; case NPCD378_HWM: - res = find_resource(dev, PNP_IDX_IO0); + res = probe_resource(dev, PNP_IDX_IO0); if (!res || !res->base) { printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", NPCD378_HWM); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/58909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6e28add78f686fc9ab4556eddbedf7828fba9ef Gerrit-Change-Number: 58909 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: drivers: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58908 ) Change subject: drivers: Replace bad uses of `find_resource` ...................................................................... drivers: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: Ia9a4b62c857f7362d67aee4f9de3bb2da1838394 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58908 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/drivers/aspeed/common/ast_mode_corebootfb.c M src/drivers/net/atl1e.c M src/drivers/uart/oxpcie.c M src/drivers/usb/pci_ehci.c 4 files changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/drivers/aspeed/common/ast_mode_corebootfb.c b/src/drivers/aspeed/common/ast_mode_corebootfb.c index b25d742..6c63931 100644 --- a/src/drivers/aspeed/common/ast_mode_corebootfb.c +++ b/src/drivers/aspeed/common/ast_mode_corebootfb.c @@ -22,7 +22,7 @@ struct drm_framebuffer *fb = crtc->primary->fb; /* PCI BAR 0 */ - struct resource *res = find_resource(crtc->dev->pdev, PCI_BASE_ADDRESS_0); + struct resource *res = probe_resource(crtc->dev->pdev, PCI_BASE_ADDRESS_0); if (!res) { printk(BIOS_ERR, "BAR0 resource not found.\n"); return -EIO; diff --git a/src/drivers/net/atl1e.c b/src/drivers/net/atl1e.c index 97ad140..d5e0cdd 100644 --- a/src/drivers/net/atl1e.c +++ b/src/drivers/net/atl1e.c @@ -106,7 +106,7 @@ static void atl1e_init(struct device *dev) { /* Get the resource of the NIC mmio */ - struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0); + struct resource *nic_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (nic_res == NULL) { printk(BIOS_ERR, "atl1e: resource not found\n"); diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c index 8ba39ef..59e8ff2 100644 --- a/src/drivers/uart/oxpcie.c +++ b/src/drivers/uart/oxpcie.c @@ -12,7 +12,7 @@ { printk(BIOS_DEBUG, "Initializing Oxford OXPCIe952\n"); - struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); + struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) { printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n"); return; diff --git a/src/drivers/usb/pci_ehci.c b/src/drivers/usb/pci_ehci.c index d59ca32..8e85426 100644 --- a/src/drivers/usb/pci_ehci.c +++ b/src/drivers/usb/pci_ehci.c @@ -75,7 +75,7 @@ if (ehci_drv_ops->set_resources) ehci_drv_ops->set_resources(dev); - res = find_resource(dev, EHCI_BAR_INDEX); + res = probe_resource(dev, EHCI_BAR_INDEX); if (!res) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/58908 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9a4b62c857f7362d67aee4f9de3bb2da1838394 Gerrit-Change-Number: 58908 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/intel: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58907 ) Change subject: soc/intel: Replace bad uses of `find_resource` ...................................................................... soc/intel: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: I2a57ea1c2f5b156afd0724829e5b1880246f351f Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58907 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/soc/intel/baytrail/gfx.c M src/soc/intel/baytrail/hda.c M src/soc/intel/baytrail/lpe.c M src/soc/intel/baytrail/lpss.c M src/soc/intel/baytrail/scc.c M src/soc/intel/braswell/lpe.c M src/soc/intel/braswell/lpss.c M src/soc/intel/braswell/scc.c M src/soc/intel/broadwell/gma.c M src/soc/intel/broadwell/minihd.c M src/soc/intel/broadwell/pch/adsp.c M src/soc/intel/broadwell/pch/hda.c M src/soc/intel/broadwell/pch/me.c M src/soc/intel/broadwell/pch/serialio.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/thermal/thermal.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/denverton_ns/uart.c M src/soc/intel/jasperlake/xhci.c M src/soc/intel/skylake/graphics.c 22 files changed, 32 insertions(+), 32 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 0ee3cef..2ee2375 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -279,7 +279,7 @@ int divider; struct resource *res; - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res == NULL) return; diff --git a/src/soc/intel/baytrail/hda.c b/src/soc/intel/baytrail/hda.c index db569ec..b582006 100644 --- a/src/soc/intel/baytrail/hda.c +++ b/src/soc/intel/baytrail/hda.c @@ -64,7 +64,7 @@ reg_script_run_on_dev(dev, init_ops); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res == NULL) return; diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index a56ce5b..7192865 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -34,7 +34,7 @@ { struct resource *res; - res = find_resource(dev, index); + res = probe_resource(dev, index); if (res) *field = res->base; } @@ -112,7 +112,7 @@ struct resource *mmio; const struct pattrs *pattrs = pattrs_get(); - res = find_resource(dev, FIRMWARE_PCI_REG_BASE); + res = probe_resource(dev, FIRMWARE_PCI_REG_BASE); if (res == NULL) { printk(BIOS_DEBUG, "LPE Firmware memory not found.\n"); return; diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index 9f309b4..b63576b 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -32,11 +32,11 @@ struct device_nvs *dev_nvs = acpi_get_device_nvs(); /* Save BAR0 and BAR1 to ACPI NVS */ - bar = find_resource(dev, PCI_BASE_ADDRESS_0); + bar = probe_resource(dev, PCI_BASE_ADDRESS_0); if (bar) dev_nvs->lpss_bar0[nvs_index] = (u32)bar->base; - bar = find_resource(dev, PCI_BASE_ADDRESS_1); + bar = probe_resource(dev, PCI_BASE_ADDRESS_1); if (bar) dev_nvs->lpss_bar1[nvs_index] = (u32)bar->base; diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c index a1e8eb7..8892b53 100644 --- a/src/soc/intel/baytrail/scc.c +++ b/src/soc/intel/baytrail/scc.c @@ -83,11 +83,11 @@ struct device_nvs *dev_nvs = acpi_get_device_nvs(); /* Save BAR0 and BAR1 to ACPI NVS */ - bar = find_resource(dev, PCI_BASE_ADDRESS_0); + bar = probe_resource(dev, PCI_BASE_ADDRESS_0); if (bar) dev_nvs->scc_bar0[nvs_index] = (u32)bar->base; - bar = find_resource(dev, PCI_BASE_ADDRESS_1); + bar = probe_resource(dev, PCI_BASE_ADDRESS_1); if (bar) dev_nvs->scc_bar1[nvs_index] = (u32)bar->base; diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index 59cabee..323c9fc 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -35,7 +35,7 @@ { struct resource *res; - res = find_resource(dev, index); + res = probe_resource(dev, index); if (res) *field = res->base; } @@ -109,7 +109,7 @@ struct resource *res; struct resource *mmio; - res = find_resource(dev, FIRMWARE_PCI_REG_BASE); + res = probe_resource(dev, FIRMWARE_PCI_REG_BASE); if (res == NULL) { printk(BIOS_DEBUG, "LPE Firmware memory not found.\n"); return; @@ -162,7 +162,7 @@ { struct resource *res; - res = find_resource(dev, PCI_BASE_ADDRESS_2); + res = probe_resource(dev, PCI_BASE_ADDRESS_2); if (res != NULL) res->flags |= IORESOURCE_STORED; diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c index 93ee3da..5f93e17 100644 --- a/src/soc/intel/braswell/lpss.c +++ b/src/soc/intel/braswell/lpss.c @@ -31,11 +31,11 @@ struct device_nvs *dev_nvs = acpi_get_device_nvs(); /* Save BAR0 and BAR1 to ACPI NVS */ - bar = find_resource(dev, PCI_BASE_ADDRESS_0); + bar = probe_resource(dev, PCI_BASE_ADDRESS_0); if (bar) dev_nvs->lpss_bar0[nvs_index] = (u32)bar->base; - bar = find_resource(dev, PCI_BASE_ADDRESS_1); + bar = probe_resource(dev, PCI_BASE_ADDRESS_1); if (bar) dev_nvs->lpss_bar1[nvs_index] = (u32)bar->base; diff --git a/src/soc/intel/braswell/scc.c b/src/soc/intel/braswell/scc.c index 902ee57..8894aa5 100644 --- a/src/soc/intel/braswell/scc.c +++ b/src/soc/intel/braswell/scc.c @@ -13,10 +13,10 @@ struct device_nvs *dev_nvs = acpi_get_device_nvs(); /* Save BAR0 and BAR1 to ACPI NVS */ - bar = find_resource(dev, PCI_BASE_ADDRESS_0); + bar = probe_resource(dev, PCI_BASE_ADDRESS_0); if (bar) dev_nvs->scc_bar0[nvs_index] = bar->base; - bar = find_resource(dev, PCI_BASE_ADDRESS_2); + bar = probe_resource(dev, PCI_BASE_ADDRESS_2); if (bar) dev_nvs->scc_bar1[nvs_index] = bar->base; diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c index b3e010c..e84d075 100644 --- a/src/soc/intel/broadwell/gma.c +++ b/src/soc/intel/broadwell/gma.c @@ -505,7 +505,7 @@ intel_gma_init_igd_opregion(); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index e373878..a07d9b1 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -52,7 +52,7 @@ int codec_mask, i; /* Find base address */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/soc/intel/broadwell/pch/adsp.c b/src/soc/intel/broadwell/pch/adsp.c index 1ebf922..eaae08b 100644 --- a/src/soc/intel/broadwell/pch/adsp.c +++ b/src/soc/intel/broadwell/pch/adsp.c @@ -25,10 +25,10 @@ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Find BAR0 and BAR1 */ - bar0 = find_resource(dev, PCI_BASE_ADDRESS_0); + bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!bar0) return; - bar1 = find_resource(dev, PCI_BASE_ADDRESS_1); + bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1); if (!bar1) return; diff --git a/src/soc/intel/broadwell/pch/hda.c b/src/soc/intel/broadwell/pch/hda.c index 2e00f79..37f2d9f 100644 --- a/src/soc/intel/broadwell/pch/hda.c +++ b/src/soc/intel/broadwell/pch/hda.c @@ -80,7 +80,7 @@ u32 codec_mask; /* Find base address */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/soc/intel/broadwell/pch/me.c b/src/soc/intel/broadwell/pch/me.c index 22db6a7..95b6d88 100644 --- a/src/soc/intel/broadwell/pch/me.c +++ b/src/soc/intel/broadwell/pch/me.c @@ -709,7 +709,7 @@ struct mei_csr host; /* Find the MMIO base for the ME interface */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res || res->base == 0 || res->size == 0) { printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); return -1; diff --git a/src/soc/intel/broadwell/pch/serialio.c b/src/soc/intel/broadwell/pch/serialio.c index e38de5e..f87217c 100644 --- a/src/soc/intel/broadwell/pch/serialio.c +++ b/src/soc/intel/broadwell/pch/serialio.c @@ -166,10 +166,10 @@ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Find BAR0 and BAR1 */ - bar0 = find_resource(dev, PCI_BASE_ADDRESS_0); + bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!bar0) return; - bar1 = find_resource(dev, PCI_BASE_ADDRESS_1); + bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1); if (!bar1) return; diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 8476b87..e7e96ad 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -100,7 +100,7 @@ { struct resource *gm_res; - gm_res = find_resource(dev, index); + gm_res = probe_resource(dev, index); if (!gm_res) return 0; diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index 90670b6..acc23ab 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -123,7 +123,7 @@ return (uintptr_t)NULL; /* dev -> bar0 */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res) return res->base; diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index d11abee..4a46143 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -46,7 +46,7 @@ ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0); /* Set Receive Slave Address */ - res = find_resource(dev, PCI_BASE_ADDRESS_4); + res = probe_resource(dev, PCI_BASE_ADDRESS_4); if (res) smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); } diff --git a/src/soc/intel/common/block/thermal/thermal.c b/src/soc/intel/common/block/thermal/thermal.c index 13e5285..f886995 100644 --- a/src/soc/intel/common/block/thermal/thermal.c +++ b/src/soc/intel/common/block/thermal/thermal.c @@ -55,7 +55,7 @@ return; } - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) { printk(BIOS_ERR, "ERROR: PCH thermal device not found!\n"); return; diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 9adcbfa..5b19fc9 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -33,7 +33,7 @@ return false; /* Calculate port status register address and read the status */ - res = find_resource(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0); + res = probe_resource(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0); /* If the memory BAR is not allocated for XHCI, leave the devices enabled */ if (!res) return true; diff --git a/src/soc/intel/denverton_ns/uart.c b/src/soc/intel/denverton_ns/uart.c index 8084d26..9d72642 100644 --- a/src/soc/intel/denverton_ns/uart.c +++ b/src/soc/intel/denverton_ns/uart.c @@ -22,13 +22,13 @@ pci_dev_read_resources(dev); if (!CONFIG(LEGACY_UART_MODE)) return; - struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); + struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res == NULL) return; res->size = 0x8; res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; /* Do not configure membar */ - res = find_resource(dev, PCI_BASE_ADDRESS_1); + res = probe_resource(dev, PCI_BASE_ADDRESS_1); if (res != NULL) res->flags = 0; compact_resources(dev); diff --git a/src/soc/intel/jasperlake/xhci.c b/src/soc/intel/jasperlake/xhci.c index 7566379..49f919d 100644 --- a/src/soc/intel/jasperlake/xhci.c +++ b/src/soc/intel/jasperlake/xhci.c @@ -31,7 +31,7 @@ static void set_xhci_lfps_sampling_offtime(struct device *dev, uint8_t time_ms) { void *addr; - const struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0); + const struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 786ba2d..98b469c 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -24,7 +24,7 @@ panel_cfg = &conf->panel_cfg; - mmio_res = find_resource(dev, PCI_BASE_ADDRESS_0); + mmio_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!mmio_res || !mmio_res->base) return; base = (void *)(uintptr_t)mmio_res->base; -- To view, visit https://review.coreboot.org/c/coreboot/+/58907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2a57ea1c2f5b156afd0724829e5b1880246f351f Gerrit-Change-Number: 58907 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Michal Motyl <michalx.motyl(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: [test] fix indirect includes 2
by Kyösti Mälkki (Code Review) 04 Nov '21

04 Nov '21

Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/58950 ) Change subject: [test] fix indirect includes 2 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/58950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib32fac2cfa3f69a89a0c008d0a1169161272ee14 Gerrit-Change-Number: 58950 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

1 0

Change in coreboot[master]: nb/intel: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58906 ) Change subject: nb/intel: Replace bad uses of `find_resource` ...................................................................... nb/intel: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: I617fea8a09049e9a87130640835ea6c3e2faec60 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58906 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/northbridge/intel/gm45/gma.c M src/northbridge/intel/haswell/gma.c M src/northbridge/intel/haswell/minihd.c M src/northbridge/intel/ironlake/gma.c M src/northbridge/intel/sandybridge/gma.c 5 files changed, 6 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 178149d..77bbe3f 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -151,7 +151,7 @@ intel_gma_init_igd_opregion(); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (gtt_res == NULL) return; mmio = res2mmio(gtt_res, 0, 0); diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index ccabb8c..212b395 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -178,7 +178,7 @@ { printk(BIOS_DEBUG, "GT Power Management Init\n"); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c index 1bfbfe5..6896464 100644 --- a/src/northbridge/intel/haswell/minihd.c +++ b/src/northbridge/intel/haswell/minihd.c @@ -51,7 +51,7 @@ int codec_mask, i; /* Find base address */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/northbridge/intel/ironlake/gma.c b/src/northbridge/intel/ironlake/gma.c index 7d08f31..a0325d1 100644 --- a/src/northbridge/intel/ironlake/gma.c +++ b/src/northbridge/intel/ironlake/gma.c @@ -140,7 +140,7 @@ if (!CONFIG(NO_GFX_INIT)) pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; @@ -171,7 +171,7 @@ struct resource *res; /* Set the graphics memory to write combining. */ - res = find_resource(dev, PCI_BASE_ADDRESS_2); + res = probe_resource(dev, PCI_BASE_ADDRESS_2); if (res == NULL) { printk(BIOS_DEBUG, "gma: memory resource not found.\n"); return; diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 38adbce..9d01533 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -308,7 +308,7 @@ printk(BIOS_DEBUG, "GT Power Management Init\n"); - gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); + gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; -- To view, visit https://review.coreboot.org/c/coreboot/+/58906 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I617fea8a09049e9a87130640835ea6c3e2faec60 Gerrit-Change-Number: 58906 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

1 0

Change in coreboot[master]: sb/intel: Replace bad uses of `find_resource`
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58905 ) Change subject: sb/intel: Replace bad uses of `find_resource` ...................................................................... sb/intel: Replace bad uses of `find_resource` The `find_resource` function will never return null (will die instead). In cases where the existing code already accounts for null pointers, it is better to use `probe_resource` instead, which returns a null pointer instead of dying. Change-Id: I13c7ebeba2e5a896d46231b5e176e5470da97343 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58905 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/bd82x6x/me_common.c M src/southbridge/intel/bd82x6x/smbus.c M src/southbridge/intel/bd82x6x/usb_ehci.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801gx/sata.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c M src/southbridge/intel/ibexpeak/me.c M src/southbridge/intel/ibexpeak/smbus.c M src/southbridge/intel/ibexpeak/thermal.c M src/southbridge/intel/ibexpeak/usb_ehci.c M src/southbridge/intel/lynxpoint/azalia.c M src/southbridge/intel/lynxpoint/me.c M src/southbridge/intel/lynxpoint/serialio.c M src/southbridge/intel/lynxpoint/smbus.c 17 files changed, 18 insertions(+), 18 deletions(-) Approvals: build bot (Jenkins): Verified Werner Zeh: Looks good to me, approved diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index 3b07a15..1e58dfd 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -158,7 +158,7 @@ u32 codec_mask; u32 reg32; - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c index 177d581..cf322eb 100644 --- a/src/southbridge/intel/bd82x6x/me_common.c +++ b/src/southbridge/intel/bd82x6x/me_common.c @@ -336,7 +336,7 @@ struct mei_csr host; /* Find the MMIO base for the ME interface */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res || res->base == 0 || res->size == 0) { printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); return -1; diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c index 839b0c3..0ae1f4a 100644 --- a/src/southbridge/intel/bd82x6x/smbus.c +++ b/src/southbridge/intel/bd82x6x/smbus.c @@ -19,7 +19,7 @@ pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ - res = find_resource(dev, PCI_BASE_ADDRESS_4); + res = probe_resource(dev, PCI_BASE_ADDRESS_4); if (res) smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); } diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c index 8bc45f6..2764861 100644 --- a/src/southbridge/intel/bd82x6x/usb_ehci.c +++ b/src/southbridge/intel/bd82x6x/usb_ehci.c @@ -43,7 +43,7 @@ /* Enable writes to protected registers. */ pci_write_config8(dev, 0x80, access_cntl | 1); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res) { /* Number of ports and companion controllers. */ reg32 = read32((void *)(uintptr_t)(res->base + 4)); diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index 0473de6..cc5d345 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -186,7 +186,7 @@ // Docking not supported pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index abb0e2e..d0d8b3b 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -130,7 +130,7 @@ /* Interrupt Pin is set by D31IP.PIP */ pci_write_config8(dev, INTR_LN, 0x0a); - struct resource *ahci_res = find_resource(dev, PCI_BASE_ADDRESS_5); + struct resource *ahci_res = probe_resource(dev, PCI_BASE_ADDRESS_5); if (ahci_res != NULL) /* write AHCI GHC_PI register */ write32(res2mmio(ahci_res, 0xc, 0), config->sata_ports_implemented); diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index 90d784c..2646cbc 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -179,7 +179,7 @@ /* Lock some R/WO bits by writing their current value. */ pci_update_config32(dev, 0x74, ~0, 0); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index 885c332..500c004 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -179,7 +179,7 @@ /* Lock some R/WO bits by writing their current value. */ pci_update_config32(dev, 0x74, ~0, 0); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index 683715f..5eb1ac3 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -158,7 +158,7 @@ u32 reg32; /* Find base address */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 20b8aac..74b3861 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -395,7 +395,7 @@ u16 reg16; /* Find the MMIO base for the ME interface */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res || res->base == 0 || res->size == 0) { printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); return -1; diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c index 12734a0..6652325 100644 --- a/src/southbridge/intel/ibexpeak/smbus.c +++ b/src/southbridge/intel/ibexpeak/smbus.c @@ -19,7 +19,7 @@ pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ - res = find_resource(dev, PCI_BASE_ADDRESS_4); + res = probe_resource(dev, PCI_BASE_ADDRESS_4); if (res) smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); } diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c index 142d3c7..b96833c 100644 --- a/src/southbridge/intel/ibexpeak/thermal.c +++ b/src/southbridge/intel/ibexpeak/thermal.c @@ -14,7 +14,7 @@ u8 *base; printk(BIOS_DEBUG, "Thermal init start.\n"); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c index a2adc5a..3de8c33 100644 --- a/src/southbridge/intel/ibexpeak/usb_ehci.c +++ b/src/southbridge/intel/ibexpeak/usb_ehci.c @@ -36,7 +36,7 @@ /* Enable writes to protected registers. */ pci_write_config8(dev, 0x80, access_cntl | 1); - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (res) { /* Number of ports and companion controllers. */ reg32 = read32((u32 *)(uintptr_t)(res->base + 4)); diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c index 27ee924..fe5c4c9 100644 --- a/src/southbridge/intel/lynxpoint/azalia.c +++ b/src/southbridge/intel/lynxpoint/azalia.c @@ -101,7 +101,7 @@ u32 codec_mask; /* Find base address */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return; diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c index 886fd90..c2f1db2 100644 --- a/src/southbridge/intel/lynxpoint/me.c +++ b/src/southbridge/intel/lynxpoint/me.c @@ -670,7 +670,7 @@ struct mei_csr host; /* Find the MMIO base for the ME interface */ - res = find_resource(dev, PCI_BASE_ADDRESS_0); + res = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!res || res->base == 0 || res->size == 0) { printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); return -1; diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c index 34f8c78..0aa683d 100644 --- a/src/southbridge/intel/lynxpoint/serialio.c +++ b/src/southbridge/intel/lynxpoint/serialio.c @@ -166,10 +166,10 @@ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Find BAR0 and BAR1 */ - bar0 = find_resource(dev, PCI_BASE_ADDRESS_0); + bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0); if (!bar0) return; - bar1 = find_resource(dev, PCI_BASE_ADDRESS_1); + bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1); if (!bar1) return; diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c index d55aa6e..f41e322 100644 --- a/src/southbridge/intel/lynxpoint/smbus.c +++ b/src/southbridge/intel/lynxpoint/smbus.c @@ -18,7 +18,7 @@ pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14))); /* Set Receive Slave Address */ - res = find_resource(dev, PCI_BASE_ADDRESS_4); + res = probe_resource(dev, PCI_BASE_ADDRESS_4); if (res) smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR); } -- To view, visit https://review.coreboot.org/c/coreboot/+/58905 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13c7ebeba2e5a896d46231b5e176e5470da97343 Gerrit-Change-Number: 58905 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: google/guybrush: Move SPI speed override
by Felix Held (Code Review) 04 Nov '21

04 Nov '21

Attention is currently required from: Kyösti Mälkki, Karthik Ramasubramanian. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58945 ) Change subject: google/guybrush: Move SPI speed override ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Actually I think I will want to keep the guard indeed. […] yes, i'd say that the filename describes well what it does -- To view, visit https://review.coreboot.org/c/coreboot/+/58945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie3db89f252af1f44e9539497c05bdf965565a191 Gerrit-Change-Number: 58945 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 04 Nov 2021 17:29:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit November 2021