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Change subject: util/lint/kconfig_lint: Fix off by one error that missed last line
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File util/lint/kconfig_lint:
https://review.coreboot.org/c/coreboot/+/58992/comment/38c63fb9_e2be2b54
PS1, Line 1315: $#wholeconfig
Not an expert, but could we use `< @wholeconfig`? I think that might
be easier to read for C developers.
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Change subject: Documentation/coding_style.md: Avoid weakly linked symbols
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
I really like the idea to document this! But isn't "Coding Style"
the wrong place for it? It's more a guideline or best pratice than
style, isn't it?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58017 )
Change subject: soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL`
......................................................................
Patch Set 23: Code-Review+2
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Change subject: soc/intel: move SGX ACPI code to block/acpi
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
File src/soc/intel/common/block/acpi/sgx.c:
https://review.coreboot.org/c/coreboot/+/58925/comment/d2966bdd_021b9da4
PS3, Line 6: #include <cpu/x86/msr.h>
I don't see anything about MSR in the code?
https://review.coreboot.org/c/coreboot/+/58925/comment/fa56d52b_5a00f23f
PS3, Line 8: #include <intelblocks/msr.h>
I don't see anything about MSR in the code?
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: ChromeOS: Add legacy mainboard_ec_running_ro()
......................................................................
ChromeOS: Add legacy mainboard_ec_running_ro()
TBD: S3 resume path case
Motivation is to have mainboard_chromeos_acpi_generate()
do nothing else than fill ACPI \\OIPG package.
Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/include/bootmode.h
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/stout/chromeos.c
M src/mainboard/samsung/lumpy/chromeos.c
M src/vendorcode/google/chromeos/chromeos.h
M src/vendorcode/google/chromeos/gnvs.c
7 files changed, 34 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/58896/4
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Kyösti Mälkki has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/59000 )
Change subject: mb/google,intel: Add ChromeOS GPIOs to onboard.h
......................................................................
mb/google,intel: Add ChromeOS GPIOs to onboard.h
Change-Id: Ia473596e3c9a75587cd1288c8816bfef66bef82e
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
M src/mainboard/google/auron/chromeos.c
A src/mainboard/google/auron/onboard.h
M src/mainboard/google/butterfly/chromeos.c
M src/mainboard/google/butterfly/onboard.h
M src/mainboard/google/link/chromeos.c
M src/mainboard/google/link/onboard.h
M src/mainboard/google/parrot/chromeos.c
M src/mainboard/google/parrot/onboard.h
M src/mainboard/google/slippy/chromeos.c
M src/mainboard/google/slippy/onboard.h
M src/mainboard/google/stout/chromeos.c
M src/mainboard/google/stout/onboard.h
M src/mainboard/intel/baskingridge/chromeos.c
A src/mainboard/intel/baskingridge/onboard.h
M src/mainboard/intel/emeraldlake2/chromeos.c
A src/mainboard/intel/emeraldlake2/onboard.h
M src/mainboard/intel/strago/chromeos.c
M src/mainboard/intel/strago/onboard.h
18 files changed, 94 insertions(+), 41 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/59000/3
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Hello Shelley Chen, build bot (Jenkins), Furquan Shaikh, Jonathan Zhang, Angel Pons, Arthur Heymans, Kyösti Mälkki, Patrick Rudolph, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Morgan Jang, Tim Chu,
I'd like you to reexamine a change. Please visit
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Change subject: pci_mmio_cfg: Always use pci_s_* functions
......................................................................
pci_mmio_cfg: Always use pci_s_* functions
When MMIO functions are available, the pci_s_* functions do exactly
the same. Drop the redundant pci_mmio_* versions.
Change-Id: I1043cbb9a1823ef94bcbb42169cb7edf282f560b
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M src/include/device/pci_mmio_cfg.h
M src/mainboard/intel/cedarisland_crb/bootblock.c
M src/mainboard/ocp/tiogapass/bootblock.c
M src/soc/intel/xeon_sp/bootblock.c
M src/soc/intel/xeon_sp/nb_acpi.c
M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
M src/soc/intel/xeon_sp/skx/soc_util.c
7 files changed, 30 insertions(+), 65 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/58333/4
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