coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B
by Paul Menzel (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Reka Norman. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59006 ) Change subject: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59006/comment/f2520b9e_7fae94ff PS2, Line 10: copied to CSE_RW, so the sizes of these regions need to match. Why take the smaller value of the two? -- To view, visit https://review.coreboot.org/c/coreboot/+/59006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94e0615088349af34020fb8a126fce9e72df9ee2 Gerrit-Change-Number: 59006 Gerrit-PatchSet: 2 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Tue, 09 Nov 2021 20:01:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640
by Paul Menzel (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Xuxin Xiong. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58994 ) Change subject: google/trogdor: Update the power on sequence of ps8640 ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58994/comment/fc378f55_bd878bab PS3, Line 2: xuxinxiong Please use *Xuxin Xiong* next time. https://review.coreboot.org/c/coreboot/+/58994/comment/5d904e76_49e39c47 PS3, Line 17: xuxinxiong Ditto. -- To view, visit https://review.coreboot.org/c/coreboot/+/58994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Gerrit-Change-Number: 58994 Gerrit-PatchSet: 3 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 20:00:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS
by Raul Rangel (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Julius Werner, Kyösti Mälkki, Rob Barnes, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59021 ) Change subject: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS ...................................................................... Patch Set 2: (1 comment) File src/arch/x86/include/arch/smp/spinlock.h: https://review.coreboot.org/c/coreboot/+/59021/comment/6b677db3_578465d7 PS2, Line 50: thread_coop_disable(); > This function is attributed with __always_inline but got added a function call into it with CB:56320 […] I can remove the __always_inline. Not really sure why we need it. Yeah, if you have two threads trying to print things then we need to serialize the threads. If on the other hand one of the threads is using a DMA controller to perform some operation while the other thread is printing to the console then things are still working in parallel. This is the current goal of coop. The other option is we add a mutex everywhere we have a spinlock. This doesn't really solve the problem though. We still can't yield while holding a spin lock, so we still need to disable threading. -- To view, visit https://review.coreboot.org/c/coreboot/+/59021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea621fcdad8f0367acce4f70be42a4e9a68da938 Gerrit-Change-Number: 59021 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 19:51:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Define ACPI Power Resources for FPMCU
by Raul Rangel (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Rob Barnes, Karthik Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58705 ) Change subject: mb/google/guybrush: Define ACPI Power Resources for FPMCU ...................................................................... Patch Set 5: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/58705/comment/5edb0fc0_ed9483d4 PS4, Line 18: TEST > _OFF method is not called. […] Cool, thanks for checking. -- To view, visit https://review.coreboot.org/c/coreboot/+/58705 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I52322eaecf6961ff9a196ca9ab2d58b7d4599d4f Gerrit-Change-Number: 58705 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-CC: Craig Hesling <hesling(a)chromium.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 09 Nov 2021 19:35:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/cse: Add support to get CSME timestamps
by Bora Guvendik (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Selma Bensaid, Tim Wawrzynczak, Subrata Banik. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58993 ) Change subject: soc/intel/common/cse: Add support to get CSME timestamps ...................................................................... Patch Set 2: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/58993 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6f7962c49b38d458680d51ee1cd709805f73b66 Gerrit-Change-Number: 58993 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 19:21:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B
by Tim Wawrzynczak (Code Review) 09 Nov '21

09 Nov '21

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59006 ) Change subject: mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B ...................................................................... mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B During CSE firmware updates, the CSE RW firmware from ME_RW_A/B is copied to CSE_RW, so the sizes of these regions need to match. BUG=b:189177538 TEST=emerge-brya coreboot chromeos-bootimage Signed-off-by: Reka Norman <rekanorman(a)google.com> Change-Id: I94e0615088349af34020fb8a126fce9e72df9ee2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59006 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/mainboard/intel/adlrvp/chromeos.fmd 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/intel/adlrvp/chromeos.fmd b/src/mainboard/intel/adlrvp/chromeos.fmd index 84adad9..53469de 100644 --- a/src/mainboard/intel/adlrvp/chromeos.fmd +++ b/src/mainboard/intel/adlrvp/chromeos.fmd @@ -15,7 +15,7 @@ VBLOCK_A 64K FW_MAIN_A(CBFS) RW_FWID_A 64 - ME_RW_A(CBFS) 4032K + ME_RW_A(CBFS) 3520K } RW_LEGACY(CBFS) 1M RW_MISC 1M { @@ -39,7 +39,7 @@ VBLOCK_B 64K FW_MAIN_B(CBFS) RW_FWID_B 64 - ME_RW_B(CBFS) 4032K + ME_RW_B(CBFS) 3520K } # Make WP_RO region align with SPI vendor # memory protected range specification. -- To view, visit https://review.coreboot.org/c/coreboot/+/59006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94e0615088349af34020fb8a126fce9e72df9ee2 Gerrit-Change-Number: 59006 Gerrit-PatchSet: 2 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: treewide: Remove unused spinlock functions
by Tim Wawrzynczak (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Nico Huber, Marshall Dawson, Julius Werner, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59020 ) Change subject: treewide: Remove unused spinlock functions ...................................................................... Patch Set 2: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/59020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3e9a742e6b311d972a260039401bfd8f8766dd36 Gerrit-Change-Number: 59020 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 09 Nov 2021 19:18:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640
by Felix Held (Code Review) 09 Nov '21

09 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58994 ) Change subject: google/trogdor: Update the power on sequence of ps8640 ...................................................................... google/trogdor: Update the power on sequence of ps8640 For the Qualcomm PBL configuration of GPIO, we need to initial the GPIOs for VDD33# and RST# at the beginning of coreboot. According to the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#. BUG=b:204637643 BRANCH=trogdor TEST=verified the waveform of ps8640 at coreboot phase. Signed-off-by: xuxinxiong <xuxinxiong(a)huaqin.corp-partner.google.com> Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58994 Reviewed-by: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/trogdor/chromeos.c M src/mainboard/google/trogdor/mainboard.c 2 files changed, 12 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Wentao Qin: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c index 9006000..90de1e4 100644 --- a/src/mainboard/google/trogdor/chromeos.c +++ b/src/mainboard/google/trogdor/chromeos.c @@ -22,6 +22,8 @@ } else { gpio_output(GPIO_EN_PP3300_DX_EDP, 0); gpio_output(GPIO_EDP_BRIDGE_ENABLE, 0); + gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 0); + gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0); } if (CONFIG(TROGDOR_HAS_FINGERPRINT)) { diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 1a60131..5499a07 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -106,12 +106,18 @@ gpio_output(GPIO_EN_PP3300_DX_EDP, 1); gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 1); - gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1); - gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0); /* - * According to ps8640 app note v0.6, wait for 2ms ("t1") after - * VDD33 goes high and then deassert RST. + * According to ps8640 v1.4 spec, and the raise time of vdd33 is a bit + * long, so wait for 4ms after VDD33 goes high and then deassert PD. + */ + mdelay(4); + + gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1); + + /* + * According to ps8640 app note v0.6, wait for 2ms after VDD33 goes + * high and then deassert RST. */ mdelay(2); -- To view, visit https://review.coreboot.org/c/coreboot/+/58994 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0 Gerrit-Change-Number: 58994 Gerrit-PatchSet: 3 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/dedede/var/metaknight: Probe and enable amplifier operation...
by Felix Held (Code Review) 09 Nov '21

09 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58931 ) Change subject: mb/google/dedede/var/metaknight: Probe and enable amplifier operation mode ...................................................................... mb/google/dedede/var/metaknight: Probe and enable amplifier operation mode Probe the fw_config for RT1015 speaker amplifier operation mode and enable it accordingly in the device tree. BUG=none BRANCH=dedede TEST=build pass Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> Change-Id: I2de1487b7f4767e9ba6432174c39feeb25f9534c Reviewed-on: https://review.coreboot.org/c/coreboot/+/58931 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/dedede/variants/metaknight/overridetree.cb 1 file changed, 16 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb index 725750b..bb4762f 100644 --- a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb +++ b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb @@ -243,15 +243,28 @@ register "hid" = ""10EC1015"" register "desc" = ""Realtek SPK AMP L"" register "uid" = "0" - device i2c 28 on end + device i2c 28 on + probe AUDIO_AMP UNPROVISIONED + probe AUDIO_AMP RT1015_I2C + end end chip drivers/i2c/generic register "hid" = ""10EC1015"" register "desc" = ""Realtek SPK AMP R"" register "uid" = "1" - device i2c 29 on end + device i2c 29 on + probe AUDIO_AMP UNPROVISIONED + probe AUDIO_AMP RT1015_I2C + end end end - device pci 1f.3 on end # Intel HDA + device pci 1f.3 on + chip drivers/generic/alc1015 + register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D17)" + device generic 0 on + probe AUDIO_AMP RT1015P_AUTO + end + end + end # Intel HDA end end -- To view, visit https://review.coreboot.org/c/coreboot/+/58931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2de1487b7f4767e9ba6432174c39feeb25f9534c Gerrit-Change-Number: 58931 Gerrit-PatchSet: 2 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/dedede/var/bugzzy: Adjust I2C speed
by Felix Held (Code Review) 09 Nov '21

09 Nov '21

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58965 ) Change subject: mb/google/dedede/var/bugzzy: Adjust I2C speed ...................................................................... mb/google/dedede/var/bugzzy: Adjust I2C speed This change adjusts all I2C speed to lower then 400KHz. The rise_time_ns and fall_time_ns values for each port are capured by a scope. BUG=None BRANCH=dedede TEST=built and verified adjusted I2C speed < 400KHz Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Change-Id: I9504608dd8d9a5f5a3848ef34691557942c21023 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58965 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/dedede/variants/bugzzy/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb index 947fa47..e1318a8 100644 --- a/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb +++ b/src/mainboard/google/dedede/variants/bugzzy/overridetree.cb @@ -63,12 +63,18 @@ }, .i2c[1] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 133, + .fall_time_ns = 29, }, .i2c[2] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 227, + .fall_time_ns = 9, }, .i2c[3] = { .speed = I2C_SPEED_FAST, + .rise_time_ns = 91, + .fall_time_ns = 2, }, .i2c[4] = { .speed = I2C_SPEED_FAST, -- To view, visit https://review.coreboot.org/c/coreboot/+/58965 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9504608dd8d9a5f5a3848ef34691557942c21023 Gerrit-Change-Number: 58965 Gerrit-PatchSet: 2 Gerrit-Owner: shkim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Edward Doan <edoan(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit November 2021