coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS
by Kyösti Mälkki (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Raul Rangel, Julius Werner, Rob Barnes, Karthik Ramasubramanian. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59021 ) Change subject: arch/x86/smp/spinlock: Fix threading when !STAGE_HAS_SPINLOCKS ...................................................................... Patch Set 2: (2 comments) File src/arch/x86/include/arch/smp/spinlock.h: https://review.coreboot.org/c/coreboot/+/59021/comment/4fc0d775_87bb6758 PS2, Line 21: static spinlock_t x = SPIN_LOCK_UNLOCKED; > The lock variable is never accessed, so the compiler just removes it. Thus we don't need a . […] What I meant was that !ROMSTAGE_OR_BEFORE is sort-of wrong guard to use here. With DRAM in your romstage you could have clean spinlock implemented for romstage. https://review.coreboot.org/c/coreboot/+/59021/comment/17405903_4d98405f PS2, Line 50: thread_coop_disable(); > In your first example, there is nothing wrong with disabling threading. […] This function is attributed with __always_inline but got added a function call into it with CB:56320. I wasn't there then for review, but this alone would have gotten -1 from me when such a thing was not argumented at all. There is a (serializing ?) rdmsr instruction in current_thread() implementation for both coop_disable() and coop_enable() which I do not count that as a noop. I find it odd to have spin_lock() implementation that now does not implement the lock but does something else. Let's assume one has a serial console and lots of printk's going on. Majority of the time, co-operative muiltitasking is effectively disabled? -- To view, visit https://review.coreboot.org/c/coreboot/+/59021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iea621fcdad8f0367acce4f70be42a4e9a68da938 Gerrit-Change-Number: 59021 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 18:00:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L
by Rob Barnes (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Kevin Chiu, Raul Rangel, Karthik Ramasubramanian. Hello build bot (Jenkins), Kevin Chiu, Raul Rangel, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59053 to look at the new patch set (#2). Change subject: mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L ...................................................................... mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L In CL:3248796 GPIO_5 was made the default for SD_AUX_RESET_L. No variant is actually using GPIO_5 for SD_AUX_RESET_L. Making GPIO_69 the default and only overriding to GPIO_70 for guybrush bid==1. BUG=b:202992077 BRANCH=None TEST=Build and boot guybrush, SD card works Change-Id: I6546ad9961f6f7146aa3aefc35d39a2eb282a252 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/gpio.c M src/mainboard/google/guybrush/variants/baseboard/helpers.c M src/mainboard/google/guybrush/variants/guybrush/gpio.c M src/mainboard/google/guybrush/variants/guybrush/variant.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/variant.c 6 files changed, 16 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59053/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59053 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6546ad9961f6f7146aa3aefc35d39a2eb282a252 Gerrit-Change-Number: 59053 Gerrit-PatchSet: 2 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: driver/intel/mipi_camera: Add support for _DSC field
by Varshit B Pandya (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Maulik V Vaghela, Tim Wawrzynczak, Paul Menzel, Subrata Banik, Patrick Rudolph. Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58767 ) Change subject: driver/intel/mipi_camera: Add support for _DSC field ...................................................................... Patch Set 7: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/58767/comment/a6db56ec_7e757a61 PS5, Line 27: TEST: > Please use TEST= Done Commit Message: https://review.coreboot.org/c/coreboot/+/58767/comment/ff7ddeba_020e1292 PS6, Line 23: More details can be found here https://lkml.org/lkml/2021/10/25/397 > also I believe this is expected to be added to ACPI 6. […] I am waiting for sakari to comment on that, I am not sure which rev it will be included File src/drivers/intel/mipi_camera/camera.c: https://review.coreboot.org/c/coreboot/+/58767/comment/e0579a3d_806c12dd PS6, Line 850: ( > nit: space after `if` Done https://review.coreboot.org/c/coreboot/+/58767/comment/1ffd754c_f0f656b0 PS6, Line 852: 0x4 > `ACPI_DEVICE_SLEEP_D3_COLD` […] I think you meant defining this in chip.h ? I have update the patch, is this what you meant ? File src/drivers/intel/mipi_camera/chip.h: https://review.coreboot.org/c/coreboot/+/58767/comment/aa23dd4b_b506c192 PS5, Line 260: acpi_dsc; > If the kernel doesn't check for its existence, I don't see how it could be a problem to include it. I think subrata meant to remove the if condition in the camera.c file and have it defined in all devices, CAM, NVM and VCM earlier implementation I had done was more like replacing i2c-low-power-probe and adding only D3cold off but now I have changed it. -- To view, visit https://review.coreboot.org/c/coreboot/+/58767 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5471f144918413a2982f86beaf3dbf7e4e66cc9b Gerrit-Change-Number: 58767 Gerrit-PatchSet: 7 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:53:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Varshit B Pandya <varshit.b.pandya(a)intel.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

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Change in coreboot[master]: driver/intel/mipi_camera: Add support for _DSC field
by Varshit B Pandya (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Varshit B Pandya, Maulik V Vaghela, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58767 to look at the new patch set (#7). Change subject: driver/intel/mipi_camera: Add support for _DSC field ...................................................................... driver/intel/mipi_camera: Add support for _DSC field The _DSC (Device State for Configuration) object evaluates to an integer may be used to tell Linux the highest allowed D state for a device during probe. The support for _DSC requires support from the kernel bus type if the bus driver normally sets the device in D0 state for probe. The D states and thus also the allowed values for _DSC are listed below. Number State Description 0 D0 Device fully powered on 1 D1 2 D2 3 D3hot 4 D3cold Off More details can be found here https://lkml.org/lkml/2021/10/25/397 BUG=none BRANCH=none TEST=Add corresponding field in brya, boot and dump SSDT to check if _DSC field is as per expectation. Name (_ADR, Zero) // _ADR: Address Name (_HID, "OVTI8856") // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_DDN, "Ov 8856 Camera") // _DDN: DOS Device Name Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } Method (_DSC, 0, NotSerialized) { Return (0x04) } Signed-off-by: Varshit B Pandya <varshit.b.pandya(a)intel.com> Change-Id: I5471f144918413a2982f86beaf3dbf7e4e66cc9b --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h 2 files changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/58767/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/58767 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5471f144918413a2982f86beaf3dbf7e4e66cc9b Gerrit-Change-Number: 58767 Gerrit-PatchSet: 7 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-CC: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L
by Rob Barnes (Code Review) 09 Nov '21

09 Nov '21

Rob Barnes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59053 ) Change subject: mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L ...................................................................... mb/google/guybrush: Make GPIO_69 default for SD_AUX_RESET_L In CL:3248796 GPIO_5 was made the default for SD_AUX_RESET_L. No variant is actually using GPIO_5 for SD_AUX_RESET_L. Making GPIO_69 the default and only overriding to GPIO_70 for guybrush bid==1. BUG=b:202992077 BRANCH=None TEST=Build and boot guybrush, SD card works Change-Id: I6546ad9961f6f7146aa3aefc35d39a2eb282a252 Signed-off-by: Rob Barnes <robbarnes(a)google.com> --- M src/mainboard/google/guybrush/variants/baseboard/gpio.c M src/mainboard/google/guybrush/variants/baseboard/helpers.c M src/mainboard/google/guybrush/variants/guybrush/variant.c M src/mainboard/google/guybrush/variants/nipperkin/gpio.c M src/mainboard/google/guybrush/variants/nipperkin/variant.c 5 files changed, 15 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/59053/1 diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c index 66b40be..86ac195 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c +++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c @@ -21,8 +21,8 @@ PAD_GPO(GPIO_3, HIGH), /* SOC_PEN_DETECT_ODL */ PAD_WAKE(GPIO_4, PULL_NONE, EDGE_HIGH, S0i3), - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, HIGH), + /* Unused */ + PAD_NC(GPIO_5), /* EN_PP3300_WLAN */ PAD_GPO(GPIO_6, HIGH), /* EN_PP3300_TCHPAD */ @@ -81,8 +81,8 @@ PAD_GPI(GPIO_67, PULL_NONE), /* EN_PP3300_TCHSCR */ PAD_GPO(GPIO_68, HIGH), - /* Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, HIGH), /* Unused TP27 */ PAD_NC(GPIO_70), /* GPIO_71 - GPIO_73: Not available */ @@ -170,16 +170,16 @@ /* Early GPIO configuration */ static const struct soc_amd_gpio early_gpio_table[] = { /* Assert all AUX reset lines */ - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, LOW), + /* Unused */ + PAD_NC(GPIO_5), /* WWAN_AUX_RESET_L */ PAD_GPO(GPIO_18, LOW), /* WLAN_AUX_RESET (ACTIVE HIGH) */ PAD_GPO(GPIO_29, HIGH), /* SSD_AUX_RESET_L */ PAD_GPO(GPIO_40, LOW), - /* Guybrush BID >= 2: SD_AUX_RESET_L, Other variants: Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, LOW), /* Guybrush BID>1, Other variants : Unused TP27; BID==1: SD_AUX_RESET_L */ PAD_NC(GPIO_70), @@ -275,16 +275,16 @@ /* PCIE_RST needs to be brought high before FSP-M runs */ static const struct soc_amd_gpio pcie_gpio_table[] = { /* Deassert all AUX_RESET lines & PCIE_RST */ - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_5, HIGH), + /* Unused */ + PAD_NC(GPIO_5), /* WWAN_AUX_RESET_L */ PAD_GPO(GPIO_18, HIGH), /* WLAN_AUX_RESET (ACTIVE HIGH) */ PAD_GPO(GPIO_29, LOW), /* SSD_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), - /* Guybrush BID >= 2: SD_AUX_RESET_L, Other variants: Unused */ - PAD_NC(GPIO_69), + /* SD_AUX_RESET_L */ + PAD_GPO(GPIO_69, HIGH), /* Guybrush BID>1, Other variants : Unused TP27; BID==1: SD_AUX_RESET_L */ PAD_NC(GPIO_70), /* PCIE_RST0_L */ diff --git a/src/mainboard/google/guybrush/variants/baseboard/helpers.c b/src/mainboard/google/guybrush/variants/baseboard/helpers.c index 04c05bb..766f4f2 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/helpers.c +++ b/src/mainboard/google/guybrush/variants/baseboard/helpers.c @@ -18,5 +18,5 @@ uint8_t __weak variant_sd_aux_reset_gpio(void) { - return GPIO_5; + return GPIO_69; } diff --git a/src/mainboard/google/guybrush/variants/guybrush/variant.c b/src/mainboard/google/guybrush/variants/guybrush/variant.c index ded1351..54ca6a0 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/variant.c +++ b/src/mainboard/google/guybrush/variants/guybrush/variant.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <baseboard/variants.h> +#include <boardid.h> #include <device/device.h> #include <soc/gpio.h> @@ -11,5 +12,5 @@ uint8_t variant_sd_aux_reset_gpio(void) { - return GPIO_69; + return board_id() == 1 ? GPIO_70 : GPIO_69; } diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 6a12ad3..182578a 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -16,8 +16,6 @@ PAD_NC(GPIO_18), /* LCD_PRIVACY_PCH */ PAD_GPO(GPIO_5, HIGH), - /* SD_AUX_RESET_L */ - PAD_GPO(GPIO_69, HIGH), /* GSC_SOC_INT_L */ PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), /* Unused */ @@ -34,8 +32,6 @@ PAD_NC(GPIO_17), /* LCD_PRIVACY_PCH */ PAD_GPO(GPIO_18, HIGH), - /* Unused */ - PAD_NC(GPIO_69), }; static const struct soc_amd_gpio override_early_gpio_table[] = { diff --git a/src/mainboard/google/guybrush/variants/nipperkin/variant.c b/src/mainboard/google/guybrush/variants/nipperkin/variant.c index 917857c..c53d691 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/variant.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/variant.c @@ -10,10 +10,3 @@ dxio_descriptors[WLAN].link_aspm_L1_1 = false; dxio_descriptors[WLAN].link_aspm_L1_2 = false; } - -uint8_t variant_sd_aux_reset_gpio(void) -{ - uint32_t board_ver = board_id(); - - return (board_ver < 2) ? GPIO_69 : GPIO_5; -} -- To view, visit https://review.coreboot.org/c/coreboot/+/59053 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6546ad9961f6f7146aa3aefc35d39a2eb282a252 Gerrit-Change-Number: 59053 Gerrit-PatchSet: 1 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/spd_tools: Document adding support for a new memory technology
by Karthik Ramasubramanian (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Reka Norman, Nick Vaccaro. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59005 ) Change subject: util/spd_tools: Document adding support for a new memory technology ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie710c1c686ddf5288db35cf43e5f1ac9b1974305 Gerrit-Change-Number: 59005 Gerrit-PatchSet: 4 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:41:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: Update SPKR, SD_AUX_RESET_L GPIO co...
by Rob Barnes (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya, Eric Peers, Karthik Ramasubramanian. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59051 ) Change subject: mb/google/guybrush/var/nipperkin: Update SPKR, SD_AUX_RESET_L GPIO configuration ...................................................................... Patch Set 2: Code-Review-1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59051/comment/489df1a3_157ea780 PS2, Line 12: SD_AUX_RESET_L: GPIO69 > I am not sure if we missed the GPIO change in the hardware build. […] Agree. I'll update with CL in a moment. -- To view, visit https://review.coreboot.org/c/coreboot/+/59051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d82292b116f53d85d9518364ffd2169bd915a7e Gerrit-Change-Number: 59051 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:39:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/nipperkin: Update SPKR, SD_AUX_RESET_L GPIO co...
by Karthik Ramasubramanian (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Kevin Chiu, Bhanu Prakash Maiya, Eric Peers, Rob Barnes. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59051 ) Change subject: mb/google/guybrush/var/nipperkin: Update SPKR, SD_AUX_RESET_L GPIO configuration ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59051/comment/5b8f0381_5d813922 PS2, Line 12: SD_AUX_RESET_L: GPIO69 I am not sure if we missed the GPIO change in the hardware build. Based on my offline discussion with Rob, it seems safe to move to GPIO69 for all the boards. Rob, WDYT? -- To view, visit https://review.coreboot.org/c/coreboot/+/59051 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d82292b116f53d85d9518364ffd2169bd915a7e Gerrit-Change-Number: 59051 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:37:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Enable LAN driver
by Tim Wawrzynczak (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: David Wu, Alan Huang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58105 ) Change subject: mb/google/brya/var/brask: Enable LAN driver ...................................................................... Patch Set 5: (2 comments) File src/drivers/net/r8168.c: PS5: Changes in this file should be split into a separate change that comes before the mainboard changes please File src/mainboard/google/brya/variants/brask/overridetree.cb: https://review.coreboot.org/c/coreboot/+/58105/comment/afcbbb38_4ea1551e PS5, Line 90: register "device_index" = "0" not required, the default value is already `0` -- To view, visit https://review.coreboot.org/c/coreboot/+/58105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2e82dbc1e6c68cbd84b603adc7fdc3ee1d4d3392 Gerrit-Change-Number: 58105 Gerrit-PatchSet: 5 Gerrit-Owner: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:19:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/spd_tools: Document adding support for a new memory technology
by Tim Wawrzynczak (Code Review) 09 Nov '21

09 Nov '21

Attention is currently required from: Reka Norman, Nick Vaccaro, Karthik Ramasubramanian. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59005 ) Change subject: util/spd_tools: Document adding support for a new memory technology ...................................................................... Patch Set 4: Code-Review+2 (1 comment) File util/spd_tools/src/spd_gen/spd_gen.go: https://review.coreboot.org/c/coreboot/+/59005/comment/6eac7c95_8a818244 PS4, Line 54: number of SPD bytes suggestion: `size of an SPD file` -- To view, visit https://review.coreboot.org/c/coreboot/+/59005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie710c1c686ddf5288db35cf43e5f1ac9b1974305 Gerrit-Change-Number: 59005 Gerrit-PatchSet: 4 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 09 Nov 2021 17:15:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021