coreboot-gerrit November 2021

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Change in coreboot[master]: [WIP,RFC] Clean up spinlocks
by Kyösti Mälkki (Code Review) 10 Nov '21

10 Nov '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59094 ) Change subject: [WIP,RFC] Clean up spinlocks ...................................................................... [WIP,RFC] Clean up spinlocks This reverts commit 037ee4b5562099771795d52cf7149ddff8dd3595. TBD: Breaks romstage co-operative threading, since those need implementation of spin_lock() that is not a spinlock. IMO commit a98d302fe9 x86/smp/spinlock: Disable thread coop when taking spinlock is wrong and should be reverted too. Change-Id: Iba52febdeee78294f916775ee9ce8a82d6203570 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/arch/arm/include/armv4/arch/smp/spinlock.h M src/arch/x86/include/arch/smp/spinlock.h M src/include/rules.h M src/include/smp/spinlock.h D src/soc/amd/common/psp_verstage/include/arch/smp/spinlock.h 5 files changed, 11 insertions(+), 43 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/59094/1 diff --git a/src/arch/arm/include/armv4/arch/smp/spinlock.h b/src/arch/arm/include/armv4/arch/smp/spinlock.h deleted file mode 100644 index 0a3a4d4..0000000 --- a/src/arch/arm/include/armv4/arch/smp/spinlock.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _ARCH_SMP_SPINLOCK_H -#define _ARCH_SMP_SPINLOCK_H - -#define DECLARE_SPIN_LOCK(x) -#define spin_is_locked(lock) 0 -#define spin_unlock_wait(lock) do {} while (0) -#define spin_lock(lock) do {} while (0) -#define spin_unlock(lock) do {} while (0) - -#include <smp/node.h> -#define boot_cpu() 1 - -#endif diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index 0c06c22..ba8e928 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -15,10 +15,6 @@ #define SPIN_LOCK_UNLOCKED { 1 } -#define STAGE_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE - -#if STAGE_HAS_SPINLOCKS - #define DECLARE_SPIN_LOCK(x) \ static spinlock_t x = SPIN_LOCK_UNLOCKED; @@ -71,14 +67,6 @@ : "=m" (lock->lock) : : "memory"); } -#else - -#define DECLARE_SPIN_LOCK(x) -#define spin_is_locked(lock) 0 -#define spin_unlock_wait(lock) do {} while (0) -#define spin_lock(lock) do {} while (0) -#define spin_unlock(lock) do {} while (0) - #endif #endif /* ARCH_SMP_SPINLOCK_H */ diff --git a/src/include/rules.h b/src/include/rules.h index ec3d22d..c64062b 100644 --- a/src/include/rules.h +++ b/src/include/rules.h @@ -292,6 +292,16 @@ #define ENV_INITIAL_STAGE ENV_BOOTBLOCK #endif + +#if ENV_X86 +#define STAGE_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE +#elif ENV_RISCV +#define STAGE_HAS_SPINLOCKS 1 +#else +#define STAGE_HAS_SPINLOCKS 0 +#endif +#define ENV_STAGE_SUPPORTS_SMP CONFIG(SMP) && STAGE_HAS_SPINLOCKS + /** * For pre-DRAM stages and post-CAR always build with simple device model, ie. * PCI, PNP and CPU functions operate without use of devicetree. The reason diff --git a/src/include/smp/spinlock.h b/src/include/smp/spinlock.h index 8554aa05..116830c 100644 --- a/src/include/smp/spinlock.h +++ b/src/include/smp/spinlock.h @@ -1,7 +1,7 @@ #ifndef SMP_SPINLOCK_H #define SMP_SPINLOCK_H -#if CONFIG(SMP) +#if ENV_STAGE_SUPPORTS_SMP #include <arch/smp/spinlock.h> #else /* !CONFIG_SMP */ diff --git a/src/soc/amd/common/psp_verstage/include/arch/smp/spinlock.h b/src/soc/amd/common/psp_verstage/include/arch/smp/spinlock.h deleted file mode 100644 index 0a3a4d4..0000000 --- a/src/soc/amd/common/psp_verstage/include/arch/smp/spinlock.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _ARCH_SMP_SPINLOCK_H -#define _ARCH_SMP_SPINLOCK_H - -#define DECLARE_SPIN_LOCK(x) -#define spin_is_locked(lock) 0 -#define spin_unlock_wait(lock) do {} while (0) -#define spin_lock(lock) do {} while (0) -#define spin_unlock(lock) do {} while (0) - -#include <smp/node.h> -#define boot_cpu() 1 - -#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/59094 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iba52febdeee78294f916775ee9ce8a82d6203570 Gerrit-Change-Number: 59094 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Move PSP padding into a loop for combo
by build bot (Jenkins) (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58554 ) Change subject: amdfwtool: Move PSP padding into a loop for combo ...................................................................... Patch Set 18: (1 comment) File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132820): https://review.coreboot.org/c/coreboot/+/58554/comment/521673ff_bd37f7f1 PS18, Line 1564: do { suspect code indent for conditional statements (8, 8) -- To view, visit https://review.coreboot.org/c/coreboot/+/58554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I351192a4bc5ed9ec0bfa3f2073c9633b8b44246d Gerrit-Change-Number: 58554 Gerrit-PatchSet: 18 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Wed, 10 Nov 2021 08:45:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs
by Kane Chen (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Tracy Wu, Tim Wawrzynczak, Patrick Rudolph. Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59081 ) Change subject: soc/intel/common/block/pcie: Add ADL-P CPU PCIe Device IDs ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/59081 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idc8a09b0579e1e6053ed2e35b7556a180a5f0088 Gerrit-Change-Number: 59081 Gerrit-PatchSet: 2 Gerrit-Owner: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 10 Nov 2021 08:34:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: amdfwtool: Put soc name setting to fw.cfg from command line
by build bot (Jenkins) (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58552 ) Change subject: amdfwtool: Put soc name setting to fw.cfg from command line ...................................................................... Patch Set 11: (1 comment) File util/amdfwtool/data_parse.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132816): https://review.coreboot.org/c/coreboot/+/58552/comment/62f230af_3f22d2be PS11, Line 519: cb_config->soc_id = identify_platform(&(oneline[match[2].rm_so])); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/58552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0eead1f2156542ea03d58145f5ad67683bf9b52 Gerrit-Change-Number: 58552 Gerrit-PatchSet: 11 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 10 Nov 2021 08:32:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Fix S0ix regression
by Meera Ravindranath (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Maulik V Vaghela, vagdevi.p(a)intel.com, Ravindra, Archana Patni, Usha P, Baieswara Reddy Sagili. Hello build bot (Jenkins), Sonam Sanju, Maulik V Vaghela, vagdevi.p(a)intel.com, Ravindra, Archana Patni, Usha P, Baieswara Reddy Sagili, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58178 to look at the new patch set (#4). Change subject: mb/intel/adlrvp: Fix S0ix regression ...................................................................... mb/intel/adlrvp: Fix S0ix regression The following changes are needed to fix S0ix regression on RVP 1) Disable Clk src 3 2) Disable Ext FIVR settings TEST=Boot adlrvp to OS, confirm S0ix is working. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b8b76b5527d8b80776cb7588ce6b12281af7882 --- M src/mainboard/intel/adlrvp/devicetree.cb 1 file changed, 0 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/58178/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/58178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b8b76b5527d8b80776cb7588ce6b12281af7882 Gerrit-Change-Number: 58178 Gerrit-PatchSet: 4 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Archana Patni <archana.patni(a)intel.com> Gerrit-Reviewer: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Ravindra <ravindra(a)intel.com> Gerrit-Reviewer: Sonam Sanju <sonam.sanju(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: vagdevi.p(a)intel.com Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: vagdevi.p(a)intel.com Gerrit-Attention: Ravindra <ravindra(a)intel.com> Gerrit-Attention: Archana Patni <archana.patni(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Baieswara Reddy Sagili <baieswara.reddy.sagili(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] util: Add coreboot Configurator
by Sean Rhodes (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Sean Rhodes, Martin Roth, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Angel Pons. Hello build bot (Jenkins), Martin Roth, Matt DeVillier, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58854 to look at the new patch set (#45). Change subject: [WIP] util: Add coreboot Configurator ...................................................................... [WIP] util: Add coreboot Configurator A simple GUI to change settings in coreboot's CBFS, via the nvramtool utility. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ie654f6aca57a792be0c295afc081a95ed4d875d1 --- A util/coreboot-configurator/README.md A util/coreboot-configurator/contrib/PKGBUILD A util/coreboot-configurator/contrib/README.md A util/coreboot-configurator/contrib/debian/changelog A util/coreboot-configurator/contrib/debian/compat A util/coreboot-configurator/contrib/debian/control A util/coreboot-configurator/contrib/debian/files A util/coreboot-configurator/contrib/debian/rules A util/coreboot-configurator/contrib/debian/source/format A util/coreboot-configurator/contrib/flatpak/coreboot-configurator.json A util/coreboot-configurator/contrib/flatpak/org.coreboot.coreboot-configurator.json A util/coreboot-configurator/meson.build A util/coreboot-configurator/meson_options.txt A util/coreboot-configurator/screenshots/coreboot-configurator.gif A util/coreboot-configurator/screenshots/coreboot-configurator.png A util/coreboot-configurator/src/application/aboutwindow.cpp A util/coreboot-configurator/src/application/aboutwindow.h A util/coreboot-configurator/src/application/aboutwindow.ui A util/coreboot-configurator/src/application/categories.yaml A util/coreboot-configurator/src/application/configuration.cpp A util/coreboot-configurator/src/application/configuration.h A util/coreboot-configurator/src/application/corebootconfigurator.cpp A util/coreboot-configurator/src/application/corebootconfigurator.h A util/coreboot-configurator/src/application/corebootconfigurator.ui A util/coreboot-configurator/src/application/images.qrc A util/coreboot-configurator/src/application/main.cpp A util/coreboot-configurator/src/application/meson.build A util/coreboot-configurator/src/application/nvramtoolcli.cpp A util/coreboot-configurator/src/application/nvramtoolcli.h A util/coreboot-configurator/src/application/qtyaml.h A util/coreboot-configurator/src/application/toggle-off.svg A util/coreboot-configurator/src/application/toggle-on.svg A util/coreboot-configurator/src/application/toggleswitch.cpp A util/coreboot-configurator/src/application/toggleswitch.h A util/coreboot-configurator/src/application/util.h A util/coreboot-configurator/src/meson.build A util/coreboot-configurator/src/static/aboutIcon.png A util/coreboot-configurator/src/static/categories.yaml A util/coreboot-configurator/src/static/coreboot-configurator.desktop A util/coreboot-configurator/src/static/coreboot_configurator.svg A util/coreboot-configurator/src/static/meson.build A util/coreboot-configurator/src/static/org.coreboot.nvramtool.policy A util/coreboot-configurator/src/static/org.coreboot.reboot.policy 43 files changed, 3,158 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/58854/45 -- To view, visit https://review.coreboot.org/c/coreboot/+/58854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie654f6aca57a792be0c295afc081a95ed4d875d1 Gerrit-Change-Number: 58854 Gerrit-PatchSet: 45 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] util: Add coreboot Configurator
by Sean Rhodes (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Sean Rhodes, Martin Roth, Matt DeVillier, Paul Menzel, Tim Wawrzynczak, Angel Pons. Hello build bot (Jenkins), Martin Roth, Matt DeVillier, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58854 to look at the new patch set (#44). Change subject: [WIP] util: Add coreboot Configurator ...................................................................... [WIP] util: Add coreboot Configurator A simple GUI to change settings in coreboot's CBFS, via the nvramtool utility. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ie654f6aca57a792be0c295afc081a95ed4d875d1 --- A util/coreboot-configurator/README.md A util/coreboot-configurator/contrib/PKGBUILD A util/coreboot-configurator/contrib/README.md A util/coreboot-configurator/contrib/debian/changelog A util/coreboot-configurator/contrib/debian/compat A util/coreboot-configurator/contrib/debian/control A util/coreboot-configurator/contrib/debian/files A util/coreboot-configurator/contrib/debian/rules A util/coreboot-configurator/contrib/debian/source/format A util/coreboot-configurator/contrib/flatpak/coreboot-configurator.json A util/coreboot-configurator/contrib/flatpak/org.coreboot.coreboot-configurator.json A util/coreboot-configurator/meson.build A util/coreboot-configurator/meson_options.txt A util/coreboot-configurator/screenshots/coreboot-configurator.gif A util/coreboot-configurator/screenshots/coreboot-configurator.png A util/coreboot-configurator/src/application/aboutwindow.cpp A util/coreboot-configurator/src/application/aboutwindow.h A util/coreboot-configurator/src/application/aboutwindow.ui A util/coreboot-configurator/src/application/categories.yaml A util/coreboot-configurator/src/application/configuration.cpp A util/coreboot-configurator/src/application/corebootconfigurator.cpp A util/coreboot-configurator/src/application/corebootconfigurator.h A util/coreboot-configurator/src/application/corebootconfigurator.ui A util/coreboot-configurator/src/application/images.qrc A util/coreboot-configurator/src/application/main.cpp A util/coreboot-configurator/src/application/meson.build A util/coreboot-configurator/src/application/nvramtoolcli.cpp A util/coreboot-configurator/src/application/nvramtoolcli.h A util/coreboot-configurator/src/application/qtyaml.h A util/coreboot-configurator/src/application/toggle-off.svg A util/coreboot-configurator/src/application/toggle-on.svg A util/coreboot-configurator/src/application/toggleswitch.cpp A util/coreboot-configurator/src/application/toggleswitch.h A util/coreboot-configurator/src/application/util.h A util/coreboot-configurator/src/meson.build A util/coreboot-configurator/src/static/aboutIcon.png A util/coreboot-configurator/src/static/categories.yaml A util/coreboot-configurator/src/static/coreboot-configurator.desktop A util/coreboot-configurator/src/static/coreboot_configurator.svg A util/coreboot-configurator/src/static/meson.build A util/coreboot-configurator/src/static/org.coreboot.nvramtool.policy A util/coreboot-configurator/src/static/org.coreboot.reboot.policy 42 files changed, 3,138 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/58854/44 -- To view, visit https://review.coreboot.org/c/coreboot/+/58854 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie654f6aca57a792be0c295afc081a95ed4d875d1 Gerrit-Change-Number: 58854 Gerrit-PatchSet: 44 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: amdfwtool: Set flag comboable as bool type
by Bao Zheng (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/59093 to review the following change. Change subject: amdfwtool: Set flag comboable as bool type ...................................................................... amdfwtool: Set flag comboable as bool type Fix the CL: https://review.coreboot.org/c/coreboot/+/58942 The type comboable was int but set as true. Change-Id: Id2c43378735c089a27a5aa683b55a0f7ec3677de Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/59093/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 3ac0fd3..f81357d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1272,7 +1272,7 @@ char *rom = NULL; embedded_firmware *amd_romsig; psp_directory_table *pspdir; - int comboable = 0; + bool comboable = false; int fuse_defined = 0; int targetfd; char *output = NULL, *config = NULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/59093 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id2c43378735c089a27a5aa683b55a0f7ec3677de Gerrit-Change-Number: 59093 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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Change in coreboot[master]: amdfwtool: Add APCB combo
by Bao Zheng (Code Review) 10 Nov '21

10 Nov '21

1 0

Change in coreboot[master]: amdfwtool: Move PSP padding into a loop for combo
by Bao Zheng (Code Review) 10 Nov '21

10 Nov '21

Attention is currently required from: Zheng Bao. Hello build bot (Jenkins), Zheng Bao, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58554 to look at the new patch set (#18). Change subject: amdfwtool: Move PSP padding into a loop for combo ...................................................................... amdfwtool: Move PSP padding into a loop for combo Move main body of PSP padding into a loop which can add a new combo entry. In the loop, get the FW files from each fw.cfg, create new pack of PSP, and fill the combo header. Now Feature COMBO is fully functional. To add a combo entry, add the command line option "--combo-config1 new_fw.cfg" to amdfwtool. The file is not fully indented. Hopefully it is easy for review . An extra patch can be added for indenting. Tested=Majolica/Cezanne + Majolica/Renoir Change-Id: I351192a4bc5ed9ec0bfa3f2073c9633b8b44246d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 63 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/58554/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/58554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I351192a4bc5ed9ec0bfa3f2073c9633b8b44246d Gerrit-Change-Number: 58554 Gerrit-PatchSet: 18 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2021