coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ec/starlabs: Add standardised ITE EC support
by Angel Pons (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Sean Rhodes, Andy Pont, Paul Menzel. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58343 ) Change subject: ec/starlabs: Add standardised ITE EC support ...................................................................... Patch Set 26: (1 comment) File src/ec/starlabs/merlin/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/58343/comment/a64e1288_9ac77bde PS19, Line 104: // ECWT (Embedded Write Method) > I'll stop being a horder. If it's not used, I'd remove it for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/58343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Gerrit-Change-Number: 58343 Gerrit-PatchSet: 26 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 11 Nov 2021 12:56:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <admin(a)starlabs.systems> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Disable VT-d for early silicons
by Meera Ravindranath (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Hello Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59191 to look at the new patch set (#3). Change subject: soc/intel/alderlake: Disable VT-d for early silicons ...................................................................... soc/intel/alderlake: Disable VT-d for early silicons VT-d needs to disabled for early silicons as it results in a CPU hard hang. BUG=b:197177091 Test=Boot brya to OS with no hang Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/59191/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/59191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 Gerrit-Change-Number: 59191 Gerrit-PatchSet: 3 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Disable VT-d for early silicons
by Meera Ravindranath (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Hello Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59191 to look at the new patch set (#2). Change subject: soc/intel/alderlake: Disable VT-d for early silicons ...................................................................... soc/intel/alderlake: Disable VT-d for early silicons VT-d needs to disabled for early silicons as it results in a CPU hard hang. BUG=b:197177091 Test=Boot brya to OS with no hang Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/59191/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 Gerrit-Change-Number: 59191 Gerrit-PatchSet: 2 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Disable VT-d for early silicons
by Meera Ravindranath (Code Review) 11 Nov '21

11 Nov '21

Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59191 ) Change subject: soc/intel/alderlake: Disable VT-d for early silicons ...................................................................... soc/intel/alderlake: Disable VT-d for early silicons VT-d needs to disabled for early silicons as it results in a CPU hard hang. BUG=b:197177091 Test=Boot brya to OS with no hang Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/59191/1 diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index be71a02..bfca66d 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -3,6 +3,7 @@ #include <assert.h> #include <console/console.h> #include <cpu/x86/msr.h> +#include <cpu/intel/cpu_ids.h> #include <device/device.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> @@ -259,6 +260,11 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_alderlake_config *config) { + + if(cpu_get_cpuid() == CPUID_ALDERLAKE_A0 || CPUID_ALDERLAKE_A1) { + m_cfg->VtdDisable = 1; + return; + } m_cfg->VtdBaseAddress[VTD_GFX] = GFXVT_BASE_ADDRESS; m_cfg->VtdBaseAddress[VTD_IPU] = IPUVT_BASE_ADDRESS; m_cfg->VtdBaseAddress[VTD_VTVCO] = VTVC0_BASE_ADDRESS; -- To view, visit https://review.coreboot.org/c/coreboot/+/59191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b9b76b6527d8b80777cb7588ce6b12282af7882 Gerrit-Change-Number: 59191 Gerrit-PatchSet: 1 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: Makefile.inc: Add a master header pointer as a regular cbfs file
by Arthur Heymans (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Martin Roth, Julius Werner, Yu-Ping Wu. Hello Martin Roth, Patrick Georgi, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59133 to look at the new patch set (#2). Change subject: Makefile.inc: Add a master header pointer as a regular cbfs file ...................................................................... Makefile.inc: Add a master header pointer as a regular cbfs file Change-Id: I99b8d4e2b4e9109b239804c86a1911ba916bd966 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/security/vboot/Makefile.inc 2 files changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/59133/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99b8d4e2b4e9109b239804c86a1911ba916bd966 Gerrit-Change-Number: 59133 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Makefile.inc: Add the x86 bootblock as a regular cbfs file
by Arthur Heymans (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Arthur Heymans, Martin Roth, Julius Werner, Yu-Ping Wu. Arthur Heymans has uploaded a new patch set (#3) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/56122 ) Change subject: Makefile.inc: Add the x86 bootblock as a regular cbfs file ...................................................................... Makefile.inc: Add the x86 bootblock as a regular cbfs file Files of type bootblock are now always top aligned. This assumes only x86 ever uses cbfs file type bootblock. As the cbfs header needs to be at a specific place and it can be updated only later on, use a placeholder cbfs file. Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/arch/x86/Makefile.inc M src/security/vboot/Makefile.inc 3 files changed, 14 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/56122/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56122 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4de9d7fedf1ae5a37a3310dd42eb07b44c030930 Gerrit-Change-Number: 56122 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Makefile.inc: Move updating the master header pointer later
by Arthur Heymans (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Martin Roth. Hello Martin Roth, Patrick Georgi, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59132 to look at the new patch set (#2). Change subject: Makefile.inc: Move updating the master header pointer later ...................................................................... Makefile.inc: Move updating the master header pointer later To keep the master header at the top of cbfs, add a placeholder. Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M Makefile.inc M src/security/vboot/Makefile.inc 2 files changed, 15 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/59132/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ba01be7da1f09a8cac287751497c18cda97d293 Gerrit-Change-Number: 59132 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Makefile.inc: Add a master header pointer as a regular cbfs file
by Arthur Heymans (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Martin Roth, Arthur Heymans. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59133 ) Change subject: Makefile.inc: Add a master header pointer as a regular cbfs file ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Who still needs the master header? It's legacy stuff. > > libpayload is just about to lose the need, so who else? I've send out patches for SeaBIOS to use the coreboot tables but they have not been merged yet. Grub also uses the legacy master header. Can we schedule dropping the master header for the next release? -- To view, visit https://review.coreboot.org/c/coreboot/+/59133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99b8d4e2b4e9109b239804c86a1911ba916bd966 Gerrit-Change-Number: 59133 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 11 Nov 2021 12:12:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <patrick(a)coreboot.org> Gerrit-MessageType: comment

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Change in coreboot[master]: ec/starlabs: Add standardised ITE EC support
by Sean Rhodes (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Andy Pont, Paul Menzel, Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58343 ) Change subject: ec/starlabs: Add standardised ITE EC support ...................................................................... Patch Set 24: (2 comments) File src/ec/starlabs/merlin/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/58343/comment/321b88aa_fab77b95 PS19, Line 101: Local1 > Local1 is not always initialized Done File src/ec/starlabs/merlin/ec.c: https://review.coreboot.org/c/coreboot/+/58343/comment/d26ec434_69496030 PS19, Line 237: .read_resources = noop_read_resources, : .set_resources = noop_set_resources, : }; > I mean something like ec/kontron/it8516e Done -- To view, visit https://review.coreboot.org/c/coreboot/+/58343 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Gerrit-Change-Number: 58343 Gerrit-PatchSet: 24 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 11 Nov 2021 12:05:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Andy Pont <andy.pont(a)sdcsystems.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: move SGX ACPI code to block/acpi
by Angel Pons (Code Review) 11 Nov '21

11 Nov '21

Attention is currently required from: Nico Huber, Michael Niewöhner, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58925 ) Change subject: soc/intel: move SGX ACPI code to block/acpi ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/58925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I089d0ee97c37df2be060b5996183201bfa9b49ca Gerrit-Change-Number: 58925 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Thu, 11 Nov 2021 11:45:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2021