coreboot-gerrit November 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/var/felwinter: Disable PCIE port 6
by Tim Wawrzynczak (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Nick Vaccaro, EricR Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59243 ) Change subject: mb/google/brya/var/felwinter: Disable PCIE port 6 ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59243/comment/d06a95fa_ffdf5fbe PS1, Line 9: as shcematics. `as per schematics` -- To view, visit https://review.coreboot.org/c/coreboot/+/59243 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30fa897c9310c44545e3df670895639a5144e1de Gerrit-Change-Number: 59243 Gerrit-PatchSet: 1 Gerrit-Owner: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 12 Nov 2021 23:36:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/redrix: Use different dsm parameters for L/R speek...
by Tim Wawrzynczak (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Chen Wisley. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59241 ) Change subject: mb/google/brya/var/redrix: Use different dsm parameters for L/R speeker/tweeter ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59241/comment/96c82541_76f759d8 PS1, Line 6: : mb/google/brya/var/redrix: Use different dsm parameters for L/R speeker/tweeter : : For tuning, redrix needs differnet dsm paramters file for L/R speeker/tweeter. 72 characters wide please -- To view, visit https://review.coreboot.org/c/coreboot/+/59241 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f93603a6809f9a5aea9f2e554935de5d0457286 Gerrit-Change-Number: 59241 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-Comment-Date: Fri, 12 Nov 2021 23:36:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/herobrine: Use same I2C/SPI configs for piglin and hoglin
by Julius Werner (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Shelley Chen, Douglas Anderson, mturney mturney, Ravi Kumar Bokka, Sudheer Amrabadi. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59273 ) Change subject: mb/google/herobrine: Use same I2C/SPI configs for piglin and hoglin ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14497a205262ac1081c24631e4fd8d39bb804fce Gerrit-Change-Number: 59273 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Douglas Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Douglas Anderson <dianders(a)chromium.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Comment-Date: Fri, 12 Nov 2021 23:28:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Drop INTEL_CAR_NEM Kconfig select on Brya
by Tim Wawrzynczak (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Maulik V Vaghela, Subrata Banik, EricR Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59272 ) Change subject: mb/google/brya: Drop INTEL_CAR_NEM Kconfig select on Brya ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: This affects all of the variants too, I don't know if they have all stopped using the old silicon revs without enem support (that would hard hang in bootblock when touching the enem MSRs). What about a brya-specific Kconfig here in this file like ``` config USE_ADL_ENEM def_bool n select INTEL_CAR_NEM_ENHANCED help When selected, the variant will use eNEM instead of regular NEM. config USE_ADL_NEM def_bool y select INTEL_CAR_NEM help When selected, the variant will use regular NEM. and then brya0 can deselect USE_ADL_NEM and choose USE_ADL_ENEM ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/59272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe94e6b82739ec65829859271622d904d75e978d Gerrit-Change-Number: 59272 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 12 Nov 2021 23:24:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/herobrine: Use same I2C/SPI configs for piglin and hoglin
by Shelley Chen (Code Review) 13 Nov '21

13 Nov '21

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59273 ) Change subject: mb/google/herobrine: Use same I2C/SPI configs for piglin and hoglin ...................................................................... mb/google/herobrine: Use same I2C/SPI configs for piglin and hoglin As Hoglin variant was recently added, need to make sure that it uses the same configs as piglin. BUG=b:197366666 BRANCH=None TEST=create hoglin image and make sure that it boots on CRD 2.0 Change-Id: I14497a205262ac1081c24631e4fd8d39bb804fce Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/herobrine/mainboard.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/59273/1 diff --git a/src/mainboard/google/herobrine/mainboard.c b/src/mainboard/google/herobrine/mainboard.c index 48beda0..82c5fa9 100644 --- a/src/mainboard/google/herobrine/mainboard.c +++ b/src/mainboard/google/herobrine/mainboard.c @@ -51,7 +51,7 @@ qupv3_se_fw_load_and_init(QUPV3_0_SE2, SE_PROTOCOL_I2C, MIXED); /* Fingerprint SPI */ qupv3_se_fw_load_and_init(QUPV3_1_SE3, SE_PROTOCOL_SPI, MIXED); - } else if (CONFIG(BOARD_GOOGLE_PIGLIN)) { + } else if (CONFIG(BOARD_GOOGLE_PIGLIN) || CONFIG(BOARD_GOOGLE_HOGLIN)) { /* APPS I2C */ qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* ESIM SPI */ -- To view, visit https://review.coreboot.org/c/coreboot/+/59273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14497a205262ac1081c24631e4fd8d39bb804fce Gerrit-Change-Number: 59273 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/brya: add list of gpios to lock
by Nick Vaccaro (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58353 ) Change subject: mb/google/brya: add list of gpios to lock ...................................................................... Patch Set 14: (1 comment) File src/mainboard/google/brya/variants/baseboard/brya/gpio.c: https://review.coreboot.org/c/coreboot/+/58353/comment/08dbb69e_745062aa PS11, Line 466: }; > Also the cr50 bus and IRQ Does the latest update cover it, or have you thought of any others I may have missed / that we should include? -- To view, visit https://review.coreboot.org/c/coreboot/+/58353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idea42a58575c280be0770d38f934acdf5508c45d Gerrit-Change-Number: 58353 Gerrit-PatchSet: 14 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 12 Nov 2021 23:16:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: add list of gpios to lock
by Nick Vaccaro (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Furquan Shaikh. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58353 to look at the new patch set (#14). Change subject: mb/google/brya: add list of gpios to lock ...................................................................... mb/google/brya: add list of gpios to lock Add a list of gpios to lock for brya. This currently includes GPIOs connected to the FPMCU. BUG=b:201430600 TEST='emerge-brya coreboot chromeos-bootimage', flash and verify that brya0 boots successfully to kernel. Change-Id: Idea42a58575c280be0770d38f934acdf5508c45d Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/brya/variants/baseboard/brya/gpio.c 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/58353/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/58353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idea42a58575c280be0770d38f934acdf5508c45d Gerrit-Change-Number: 58353 Gerrit-PatchSet: 14 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: add generic gpio lock mechanism
by Nick Vaccaro (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Bora Guvendik, Caveh Jalali, Selma Bensaid, Maulik V Vaghela, Subrata Banik, Nick Vaccaro, Patrick Rudolph, Karthik Ramasubramanian. Hello Bora Guvendik, build bot (Jenkins), Caveh Jalali, Selma Bensaid, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/58351 to look at the new patch set (#11). Change subject: soc/intel/common: add generic gpio lock mechanism ...................................................................... soc/intel/common: add generic gpio lock mechanism For added security, there are some gpios that an SoC will want to lock once initially configured, such as gpios attached to non-host (x86) controllers, so that they can't be recofigured at a later point in time by rogue code. Likewise, a mainboard may have some gpios connected to secure busses and/or devices that they want to protect from being changed post initial configuration. This change adds a generic gpio locking mechanism that allows the SoC to export a list of GPIOs to be locked down and allows the mainboard to export a list of GPIOs that it wants locked down once initialization is complete. Use the SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADS Kconfig option to enable this feature. BUG=b:201430600 TEST='emerge-brya coreboot chromeos-bootimage', flash and verify brya0 boots successfully to kernel. Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> Change-Id: I42979fb89567d8bcd9392da4fb8c4113ef427b14 --- M src/soc/intel/common/block/gpio/gpio.c M src/soc/intel/common/block/include/intelblocks/gpio.h M src/soc/intel/common/block/smm/Kconfig M src/soc/intel/common/block/smm/smihandler.c 4 files changed, 156 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/58351/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/58351 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I42979fb89567d8bcd9392da4fb8c4113ef427b14 Gerrit-Change-Number: 58351 Gerrit-PatchSet: 11 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Boris Mittelberg <bmbm(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/drivers/intel/fsp2_0: Added FSP_S component to VBOOT Stage Verifi...
by Julius Werner (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Raul Rangel, Amol N Sukerkar. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32155 ) Change subject: src/drivers/intel/fsp2_0: Added FSP_S component to VBOOT Stage Verification. FSP_S component will be verified in RAMSTAGE. ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/32155/comment/cc01db96_de645af7 PS2, Line 14: CONFIG_VBOOT_STAGE_VERIFICATION > This whole patch stack has been abandoned, and CONFIG_CBFS_VERIFICATION is basically the effort that […] Hmm... I can somehow not abandon other people's patches anymore. Strange. I'm pretty sure I used to have that power. Anyway, Amol, maybe you could mark this series as abandoned yourself? -- To view, visit https://review.coreboot.org/c/coreboot/+/32155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifefad96b54388143fecb56f0402c3b627ae6350d Gerrit-Change-Number: 32155 Gerrit-PatchSet: 2 Gerrit-Owner: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Comment-Date: Fri, 12 Nov 2021 22:43:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: src/drivers/intel/fsp2_0: Added FSP_S component to VBOOT Stage Verifi...
by Julius Werner (Code Review) 13 Nov '21

13 Nov '21

Attention is currently required from: Raul Rangel, Amol N Sukerkar. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32155 ) Change subject: src/drivers/intel/fsp2_0: Added FSP_S component to VBOOT Stage Verification. FSP_S component will be verified in RAMSTAGE. ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/32155/comment/ea813037_9341e048 PS2, Line 14: CONFIG_VBOOT_STAGE_VERIFICATION > What is CONFIG_VBOOT_STAGE_VERIFICATION? This whole patch stack has been abandoned, and CONFIG_CBFS_VERIFICATION is basically the effort that came out of this instead. See previous discussions in CB:32159 for historical context. Amol, I hope you won't mind if I abandon these patches to prevent confusion. -- To view, visit https://review.coreboot.org/c/coreboot/+/32155 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifefad96b54388143fecb56f0402c3b627ae6350d Gerrit-Change-Number: 32155 Gerrit-PatchSet: 2 Gerrit-Owner: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Comment-Date: Fri, 12 Nov 2021 22:29:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit November 2021